diff --git a/Platforms/IPSS/ARMCM0/Include/ARMCM0.h b/Platforms/IPSS/ARMCM0/Include/ARMCM0.h new file mode 100755 index 00000000..93881d5e --- /dev/null +++ b/Platforms/IPSS/ARMCM0/Include/ARMCM0.h @@ -0,0 +1,126 @@ +/**************************************************************************//** + * @file ARMCM0.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM0_H +#define ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + + + + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 31 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM0_REV 0x0000U /* Core revision r0p0 */ +#define __MPU_PRESENT 0U /* no MPU present */ +#define __VTOR_PRESENT 0U /* no VTOR present */ +#define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ + +#include "core_cm0.h" /* Processor and core peripherals */ +#include "system_ARMCM0.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM0_H */ diff --git a/Platforms/IPSS/ARMCM0/Include/system_ARMCM0.h b/Platforms/IPSS/ARMCM0/Include/system_ARMCM0.h new file mode 100755 index 00000000..7fe7e914 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/Include/system_ARMCM0.h @@ -0,0 +1,55 @@ +/**************************************************************************//** + * @file system_ARMCM0.h + * @brief CMSIS Device System Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef SYSTEM_ARMCM0_H +#define SYSTEM_ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + + +/** + \brief Setup the microcontroller system. + + Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + + +/** + \brief Update SystemCoreClock variable. + + Updates the SystemCoreClock with current core Clock retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_ARMCM0_H */ diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/AC5/lnk.sct b/Platforms/IPSS/ARMCM0/LinkScripts/AC5/lnk.sct new file mode 100755 index 00000000..18ee8b29 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/LinkScripts/AC5/lnk.sct @@ -0,0 +1,75 @@ +#! armcc -E +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +#include "mem_ARMCM0.h" + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00300000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00200000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE STACK_SIZE +#define __HEAP_SIZE HEAP_SIZE + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundery definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) /* starts at end of RAM */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE (__RAM_BASE ) +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/AC5/mem_ARMCM0.h b/Platforms/IPSS/ARMCM0/LinkScripts/AC5/mem_ARMCM0.h new file mode 100755 index 00000000..21a395ec --- /dev/null +++ b/Platforms/IPSS/ARMCM0/LinkScripts/AC5/mem_ARMCM0.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM0_H +#define __MEM_ARMCM0_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM0_H */ diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/AC6/lnk.sct b/Platforms/IPSS/ARMCM0/LinkScripts/AC6/lnk.sct new file mode 100755 index 00000000..fad866a2 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/LinkScripts/AC6/lnk.sct @@ -0,0 +1,29 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m0 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +#include "mem_ARMCM0.h" + +LOAD_REGION 0x0 +{ + CODE +0 0x0007ffff + { + *.o (RESET, +First) + * (InRoot$$$Sections) + * (+RO) + } + + DATA 0x20000000 0x4000 + { + * (+RW,+ZI) + } + + ARM_LIB_STACK 0x20006000 ALIGN 64 EMPTY -0x00002000 + {} + ARM_LIB_HEAP 0x20006000 ALIGN 64 EMPTY 0x0050000 + {} +} + diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/AC6/mem_ARMCM0.h b/Platforms/IPSS/ARMCM0/LinkScripts/AC6/mem_ARMCM0.h new file mode 100755 index 00000000..a707e5e9 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/LinkScripts/AC6/mem_ARMCM0.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM0_H +#define __MEM_ARMCM0_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/GCC/lnk.ld b/Platforms/IPSS/ARMCM0/LinkScripts/GCC/lnk.ld new file mode 100755 index 00000000..d2485ad7 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/LinkScripts/GCC/lnk.ld @@ -0,0 +1,296 @@ +/****************************************************************************** + * @file gcc_arm.ld + * @brief GNU Linker Script for Cortex-M based device + * @version V2.0.0 + * @date 21. May 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "mem_ARMCM0.h" +/* + *-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- + */ + +/*---------------------- Flash Configuration ---------------------------------- + Flash Configuration + Flash Base Address <0x0-0xFFFFFFFF:8> + Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__ROM_BASE = 0x00000000; +__ROM_SIZE = 0x00400000; + +/*--------------------- Embedded RAM Configuration ---------------------------- + RAM Configuration + RAM Base Address <0x0-0xFFFFFFFF:8> + RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__RAM_BASE = 0x20000000; +__RAM_SIZE = 0x00300000; + +/*--------------------- Stack / Heap Configuration ---------------------------- + Stack / Heap Configuration + Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__STACK_SIZE = STACK_SIZE; +__HEAP_SIZE = HEAP_SIZE; + +/* + *-------------------- <<< end of configuration section >>> ------------------- + */ + +MEMORY +{ + FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE + RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + /* + * SG veneers: + * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address + * must be set, either with the command line option ‘--section-start’ or in a linker script, + * to indicate where to place these veneers in memory. + */ +/* + .gnu.sgstubs : + { + . = ALIGN(32); + } > FLASH +*/ + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + /* Add each additional data section here */ +/* + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) +*/ + __copy_table_end__ = .; + } > FLASH + + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + /* Add each additional bss section here */ +/* + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) +*/ + __zero_table_end__ = .; + } > FLASH + + /** + * Location counter can end up 2byte aligned with narrow Thumb code but + * __etext is assumed by startup code to be the LMA of a section in RAM + * which must be 4byte aligned + */ + __etext = ALIGN (4); + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data) + *(.data.*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + /* + * Secondary data section, optional + * + * Remember to add each additional data section + * to the .copy.table above to asure proper + * initialization during startup. + */ +/* + __etext2 = ALIGN (4); + + .data2 : AT (__etext2) + { + . = ALIGN(4); + __data2_start__ = .; + *(.data2) + *(.data2.*) + . = ALIGN(4); + __data2_end__ = .; + + } > RAM2 +*/ + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM AT > RAM + + /* + * Secondary bss section, optional + * + * Remember to add each additional bss section + * to the .zero.table above to asure proper + * initialization during startup. + */ +/* + .bss2 : + { + . = ALIGN(4); + __bss2_start__ = .; + *(.bss2) + *(.bss2.*) + . = ALIGN(4); + __bss2_end__ = .; + } > RAM2 AT > RAM2 +*/ + + .heap (COPY) : + { + . = ALIGN(8); + __end__ = .; + __HeapBase = .; + PROVIDE(end = .); + . = . + __HEAP_SIZE; + . = ALIGN(8); + __HeapLimit = .; + } > RAM + + .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) : + { + . = ALIGN(8); + __StackLimit = .; + . = . + __STACK_SIZE; + . = ALIGN(8); + __StackTop = .; + } > RAM + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/GCC/mem_ARMCM0.h b/Platforms/IPSS/ARMCM0/LinkScripts/GCC/mem_ARMCM0.h new file mode 100755 index 00000000..b25b6182 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/LinkScripts/GCC/mem_ARMCM0.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM0.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM0_H +#define __MEM_ARMCM0_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/IPSS/ARMCM7/Startup/AC6/startup_ARMCM7.s b/Platforms/IPSS/ARMCM0/Startup/AC5/startup_ARMCM0.s similarity index 99% rename from Platforms/IPSS/ARMCM7/Startup/AC6/startup_ARMCM7.s rename to Platforms/IPSS/ARMCM0/Startup/AC5/startup_ARMCM0.s index 333d3581..cb6ea982 100755 --- a/Platforms/IPSS/ARMCM7/Startup/AC6/startup_ARMCM7.s +++ b/Platforms/IPSS/ARMCM0/Startup/AC5/startup_ARMCM0.s @@ -25,7 +25,7 @@ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -#include "mem_ARMCM7.h" +#include "mem_ARMCM0.h" ; Stack Configuration ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> diff --git a/Platforms/IPSS/ARMCM0/Startup/AC6/startup_ARMCM0.c b/Platforms/IPSS/ARMCM0/Startup/AC6/startup_ARMCM0.c new file mode 100755 index 00000000..ead292d8 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/Startup/AC6/startup_ARMCM0.c @@ -0,0 +1,151 @@ +/****************************************************************************** + * @file startup_ARMCM0.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined (ARMCM0) + #include "ARMCM0.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[48]; + const pFunc __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10..31 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif + diff --git a/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.S b/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.S new file mode 100755 index 00000000..7bbd2dd6 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.S @@ -0,0 +1,179 @@ +/**************************************************************************//** + * @file startup_ARMCM0.S + * @brief CMSIS-Core(M) Device Startup File for Cortex-M0 Device + * @version V2.0.1 + * @date 23. July 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + .syntax unified + .arch armv6-m + + .section .vectors + .align 2 + .globl __Vectors + .globl __Vectors_End + .globl __Vectors_Size +__Vectors: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* -14 NMI Handler */ + .long HardFault_Handler /* -13 Hard Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* -5 SVCall Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long PendSV_Handler /* -2 PendSV Handler */ + .long SysTick_Handler /* -1 SysTick Handler */ + + /* Interrupts */ + .long Interrupt0_Handler /* 0 Interrupt 0 */ + .long Interrupt1_Handler /* 1 Interrupt 1 */ + .long Interrupt2_Handler /* 2 Interrupt 2 */ + .long Interrupt3_Handler /* 3 Interrupt 3 */ + .long Interrupt4_Handler /* 4 Interrupt 4 */ + .long Interrupt5_Handler /* 5 Interrupt 5 */ + .long Interrupt6_Handler /* 6 Interrupt 6 */ + .long Interrupt7_Handler /* 7 Interrupt 7 */ + .long Interrupt8_Handler /* 8 Interrupt 8 */ + .long Interrupt9_Handler /* 9 Interrupt 9 */ + + .space ( 22 * 4) /* Interrupts 10 .. 31 are left out */ +__Vectors_End: + .equ __Vectors_Size, __Vectors_End - __Vectors + .size __Vectors, . - __Vectors + + + .thumb + .section .text + .align 2 + + .thumb_func + .type Reset_Handler, %function + .globl Reset_Handler + .fnstart +Reset_Handler: + bl SystemInit + + ldr r4, =__copy_table_start__ + ldr r5, =__copy_table_end__ + +.L_loop0: + cmp r4, r5 + bge .L_loop0_done + ldr r1, [r4] + ldr r2, [r4, #4] + ldr r3, [r4, #8] + +.L_loop0_0: + subs r3, #4 + blt .L_loop0_0_done + ldr r0, [r1, r3] + str r0, [r2, r3] + b .L_loop0_0 + +.L_loop0_0_done: + adds r4, #12 + b .L_loop0 + +.L_loop0_done: + + ldr r3, =__zero_table_start__ + ldr r4, =__zero_table_end__ + +.L_loop2: + cmp r3, r4 + bge .L_loop2_done + ldr r1, [r3] + ldr r2, [r3, #4] + movs r0, 0 + +.L_loop2_0: + subs r2, #4 + blt .L_loop2_0_done + str r0, [r1, r2] + b .L_loop2_0 +.L_loop2_0_done: + + adds r3, #8 + b .L_loop2 +.L_loop2_done: + + bl _start + + .fnend + .size Reset_Handler, . - Reset_Handler + +/* The default macro is not used for HardFault_Handler + * because this results in a poor debug illusion. + */ + .thumb_func + .type HardFault_Handler, %function + .weak HardFault_Handler + .fnstart +HardFault_Handler: + b . + .fnend + .size HardFault_Handler, . - HardFault_Handler + + .thumb_func + .type Default_Handler, %function + .weak Default_Handler + .fnstart +Default_Handler: + b . + .fnend + .size Default_Handler, . - Default_Handler + +/* Macro to define default exception/interrupt handlers. + * Default handler are weak symbols with an endless loop. + * They can be overwritten by real handlers. + */ + .macro Set_Default_Handler Handler_Name + .weak \Handler_Name + .set \Handler_Name, Default_Handler + .endm + + +/* Default exception/interrupt handler */ + + Set_Default_Handler NMI_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler Interrupt0_Handler + Set_Default_Handler Interrupt1_Handler + Set_Default_Handler Interrupt2_Handler + Set_Default_Handler Interrupt3_Handler + Set_Default_Handler Interrupt4_Handler + Set_Default_Handler Interrupt5_Handler + Set_Default_Handler Interrupt6_Handler + Set_Default_Handler Interrupt7_Handler + Set_Default_Handler Interrupt8_Handler + Set_Default_Handler Interrupt9_Handler + + + .end diff --git a/Platforms/IPSS/ARMCM0/Startup/GCC/support.c b/Platforms/IPSS/ARMCM0/Startup/GCC/support.c new file mode 100755 index 00000000..740f6b08 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/Startup/GCC/support.c @@ -0,0 +1,36 @@ + +#ifdef __cplusplus +extern "C" +{ +#endif + +char * _sbrk(int incr); + +void __malloc_lock() ; +void __malloc_unlock(); + +char __HeapBase, __HeapLimit; // make sure to define these symbols in linker command file +#ifdef __cplusplus +} +#endif + +static int totalBytesProvidedBySBRK = 0; + +//! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file). +char * sbrk(int incr) { + static char *currentHeapEnd = &__HeapBase; + char *previousHeapEnd = currentHeapEnd; + if (currentHeapEnd + incr > &__HeapLimit) { + return (char *)-1; // the malloc-family routine that called sbrk will return 0 + } + currentHeapEnd += incr; + + totalBytesProvidedBySBRK += incr; + + return (char *) previousHeapEnd; +} +//! Synonym for sbrk. +char * _sbrk(int incr) { return sbrk(incr); }; + +void __malloc_lock() { }; +void __malloc_unlock() { }; \ No newline at end of file diff --git a/Platforms/IPSS/ARMCM0/system_ARMCM0.c b/Platforms/IPSS/ARMCM0/system_ARMCM0.c new file mode 100755 index 00000000..6f4a6ab4 --- /dev/null +++ b/Platforms/IPSS/ARMCM0/system_ARMCM0.c @@ -0,0 +1,491 @@ +/**************************************************************************//** + * @file system_ARMCM0.c + * @brief CMSIS Device System Source File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include + +#include "ARMCM0.h" + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + +#define SERIAL_BASE_ADDRESS (0x40000000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + + + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +int stdout_putchar(char txchar) +{ + SERIAL_DATA = txchar; +} + +int stderr_putchar(char txchar) +{ + return stdout_putchar(txchar); +} + +void ttywrch (int ch) +{ + stdout_putchar(ch); +} + +#if __IS_COMPILER_ARM_COMPILER_6__ +__asm(".global __use_no_semihosting\n\t"); +# ifndef __MICROLIB +__asm(".global __ARM_use_no_argv\n\t"); +# endif +#endif + +/** + Writes the character specified by c (converted to an unsigned char) to + the output stream pointed to by stream, at the position indicated by the + associated file position indicator (if defined), and advances the + indicator appropriately. If the file position indicator is not defined, + the character is appended to the output stream. + + \param[in] c Character + \param[in] stream Stream handle + + \return The character written. If a write error occurs, the error + indicator is set and fputc returns EOF. +*/ +__attribute__((weak)) +int fputc (int c, FILE * stream) +{ + if (stream == &__stdout) { + return (stdout_putchar(c)); + } + + if (stream == &__stderr) { + return (stderr_putchar(c)); + } + + return (-1); +} + +/* IO device file handles. */ +#define FH_STDIN 0x8001 +#define FH_STDOUT 0x8002 +#define FH_STDERR 0x8003 + +const char __stdin_name[] = ":STDIN"; +const char __stdout_name[] = ":STDOUT"; +const char __stderr_name[] = ":STDERR"; + +#define RETARGET_SYS 1 +#define RTE_Compiler_IO_STDOUT 1 +#define RTE_Compiler_IO_STDERR 1 +/** + Defined in rt_sys.h, this function opens a file. + + The _sys_open() function is required by fopen() and freopen(). These + functions in turn are required if any file input/output function is to + be used. + The openmode parameter is a bitmap whose bits mostly correspond directly to + the ISO mode specification. Target-dependent extensions are possible, but + freopen() must also be extended. + + \param[in] name File name + \param[in] openmode Mode specification bitmap + + \return The return value is ?1 if an error occurs. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +FILEHANDLE _sys_open (const char *name, int openmode) { +#if (!defined(RTE_Compiler_IO_File)) + (void)openmode; +#endif + + if (name == NULL) { + return (-1); + } + + if (name[0] == ':') { + if (strcmp(name, ":STDIN") == 0) { + return (FH_STDIN); + } + if (strcmp(name, ":STDOUT") == 0) { + return (FH_STDOUT); + } + if (strcmp(name, ":STDERR") == 0) { + return (FH_STDERR); + } + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_open(name, openmode)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function closes a file previously opened + with _sys_open(). + + This function must be defined if any input/output function is to be used. + + \param[in] fh File handle + + \return The return value is 0 if successful. A nonzero value indicates + an error. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_close (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (0); + case FH_STDOUT: + return (0); + case FH_STDERR: + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_close(fh)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function writes the contents of a buffer to a file + previously opened with _sys_open(). + + \note The mode parameter is here for historical reasons. It contains + nothing useful and must be ignored. + + \param[in] fh File handle + \param[in] buf Data buffer + \param[in] len Data length + \param[in] mode Ignore this parameter + + \return The return value is either: + - a positive number representing the number of characters not + written (so any nonzero return value denotes a failure of + some sort) + - a negative number indicating an error. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_write (FILEHANDLE fh, const uint8_t *buf, uint32_t len, int mode) { +#if (defined(RTE_Compiler_IO_STDOUT) || defined(RTE_Compiler_IO_STDERR)) + int ch; +#elif (!defined(RTE_Compiler_IO_File)) + (void)buf; + (void)len; +#endif + (void)mode; + + switch (fh) { + case FH_STDIN: + return (-1); + case FH_STDOUT: +#ifdef RTE_Compiler_IO_STDOUT + for (; len; len--) { + ch = *buf++; + + stdout_putchar(ch); + } +#endif + return (0); + case FH_STDERR: +#ifdef RTE_Compiler_IO_STDERR + for (; len; len--) { + ch = *buf++; + + stderr_putchar(ch); + } +#endif + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_write(fh, buf, len)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function reads the contents of a file into a buffer. + + Reading up to and including the last byte of data does not turn on the EOF + indicator. The EOF indicator is only reached when an attempt is made to read + beyond the last byte of data. The target-independent code is capable of + handling: + - the EOF indicator being returned in the same read as the remaining bytes + of data that precede the EOF + - the EOF indicator being returned on its own after the remaining bytes of + data have been returned in a previous read. + + \note The mode parameter is here for historical reasons. It contains + nothing useful and must be ignored. + + \param[in] fh File handle + \param[in] buf Data buffer + \param[in] len Data length + \param[in] mode Ignore this parameter + + \return The return value is one of the following: + - The number of bytes not read (that is, len - result number of + bytes were read). + - An error indication. + - An EOF indicator. The EOF indication involves the setting of + 0x80000000 in the normal result. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_read (FILEHANDLE fh, uint8_t *buf, uint32_t len, int mode) { +#ifdef RTE_Compiler_IO_STDIN + int ch; +#elif (!defined(RTE_Compiler_IO_File)) + (void)buf; + (void)len; +#endif + (void)mode; + + switch (fh) { + case FH_STDIN: +#ifdef RTE_Compiler_IO_STDIN + ch = stdin_getchar(); + if (ch < 0) { + return ((int)(len | 0x80000000U)); + } + *buf++ = (uint8_t)ch; +#if (STDIN_ECHO != 0) + stdout_putchar(ch); +#endif + len--; + return ((int)(len)); +#else + return ((int)(len | 0x80000000U)); +#endif + case FH_STDOUT: + return (-1); + case FH_STDERR: + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_read(fh, buf, len)); +#endif +#else + return (-1); +#endif +} +#endif + + + + + +/** + Defined in rt_sys.h, this function determines if a file handle identifies + a terminal. + + When a file is connected to a terminal device, this function is used to + provide unbuffered behavior by default (in the absence of a call to + set(v)buf) and to prohibit seeking. + + \param[in] fh File handle + + \return The return value is one of the following values: + - 0: There is no interactive device. + - 1: There is an interactive device. + - other: An error occurred. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_istty (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (1); + case FH_STDOUT: + return (1); + case FH_STDERR: + return (1); + } + + return (0); +} +#endif + + +/** + Defined in rt_sys.h, this function puts the file pointer at offset pos from + the beginning of the file. + + This function sets the current read or write position to the new location pos + relative to the start of the current file fh. + + \param[in] fh File handle + \param[in] pos File pointer offset + + \return The result is: + - non-negative if no error occurs + - negative if an error occurs +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_seek (FILEHANDLE fh, long pos) { +#if (!defined(RTE_Compiler_IO_File)) + (void)pos; +#endif + + switch (fh) { + case FH_STDIN: + return (-1); + case FH_STDOUT: + return (-1); + case FH_STDERR: + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_seek(fh, (uint32_t)pos)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function returns the current length of a file. + + This function is used by _sys_seek() to convert an offset relative to the + end of a file into an offset relative to the beginning of the file. + You do not have to define _sys_flen() if you do not intend to use fseek(). + If you retarget at system _sys_*() level, you must supply _sys_flen(), + even if the underlying system directly supports seeking relative to the + end of a file. + + \param[in] fh File handle + + \return This function returns the current length of the file fh, + or a negative error indicator. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +long _sys_flen (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (0); + case FH_STDOUT: + return (0); + case FH_STDERR: + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_flen(fh)); +#endif +#else + return (0); +#endif +} +#endif + +#define log_str(...) \ + do { \ + const char *pchSrc = __VA_ARGS__; \ + uint_fast16_t hwSize = sizeof(__VA_ARGS__); \ + do { \ + stdout_putchar(*pchSrc++); \ + } while(--hwSize); \ + } while(0) + + +void _sys_exit(int n) +{ + (void)n; + log_str("\n"); + log_str("_[TEST COMPLETE]_________________________________________________\n"); + log_str("\n\n"); + stdout_putchar(4); + while(1); +} + +extern void ttywrch (int ch); +__attribute__((weak)) +void _ttywrch (int ch) +{ + ttywrch(ch); +} diff --git a/Platforms/IPSS/ARMCM33/Include/ARMCM33.h b/Platforms/IPSS/ARMCM33/Include/ARMCM33.h new file mode 100755 index 00000000..9593c61c --- /dev/null +++ b/Platforms/IPSS/ARMCM33/Include/ARMCM33.h @@ -0,0 +1,130 @@ +/**************************************************************************//** + * @file ARMCM33.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM33 Device (configured for ARMCM33 without FPU, without DSP extension, without TrustZone) + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM33_H +#define ARMCM33_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SecureFault_IRQn = -9, /* 7 Secure Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 480 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM33_REV 0x0000U /* Core revision r0p1 */ +#define __SAUREGION_PRESENT 0U /* SAU regions present */ +#define __MPU_PRESENT 1U /* MPU present */ +#define __VTOR_PRESENT 1U /* VTOR present */ +#define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 0U /* no FPU present */ +#define __DSP_PRESENT 0U /* no DSP extension present */ + +#include "core_cm33.h" /* Processor and core peripherals */ +#include "system_ARMCM33.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM33_H */ diff --git a/Platforms/IPSS/ARMCM33/Include/ARMCM33_DSP_FP.h b/Platforms/IPSS/ARMCM33/Include/ARMCM33_DSP_FP.h new file mode 100755 index 00000000..d303bea5 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/Include/ARMCM33_DSP_FP.h @@ -0,0 +1,130 @@ +/**************************************************************************//** + * @file ARMCM33_DSP_FP.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM33 Device (configured for ARMCM33 with FPU, with DSP extension) + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM33_DSP_FP_H +#define ARMCM33_DSP_FP_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SecureFault_IRQn = -9, /* 7 Secure Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 480 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM33_REV 0x0000U /* Core revision r0p1 */ +#define __SAUREGION_PRESENT 0U /* SAU regions present */ +#define __MPU_PRESENT 1U /* MPU present */ +#define __VTOR_PRESENT 1U /* VTOR present */ +#define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /* FPU present */ +#define __DSP_PRESENT 1U /* DSP extension present */ + +#include "core_cm33.h" /* Processor and core peripherals */ +#include "system_ARMCM33.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM33_DSP_FP_H */ diff --git a/Platforms/IPSS/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h b/Platforms/IPSS/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h new file mode 100755 index 00000000..0d78c793 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h @@ -0,0 +1,130 @@ +/**************************************************************************//** + * @file ARMCM33_DSP_FP_TZ.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM33 Device (configured for ARMCM33 with FPU, with DSP extension, with TrustZone) + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM33_DSP_FP_TZ_H +#define ARMCM33_DSP_FP_TZ_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SecureFault_IRQn = -9, /* 7 Secure Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 480 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM33_REV 0x0000U /* Core revision r0p1 */ +#define __SAUREGION_PRESENT 1U /* SAU regions present */ +#define __MPU_PRESENT 1U /* MPU present */ +#define __VTOR_PRESENT 1U /* VTOR present */ +#define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /* FPU present */ +#define __DSP_PRESENT 1U /* DSP extension present */ + +#include "core_cm33.h" /* Processor and core peripherals */ +#include "system_ARMCM33.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM33_DSP_FP_TZ_H */ diff --git a/Platforms/IPSS/ARMCM33/Include/ARMCM33_TZ.h b/Platforms/IPSS/ARMCM33/Include/ARMCM33_TZ.h new file mode 100755 index 00000000..3912a111 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/Include/ARMCM33_TZ.h @@ -0,0 +1,130 @@ +/**************************************************************************//** + * @file ARMCM33_TZ.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM33 Device (configured for ARMCM33 without FPU, without DSP extension, with TrustZone) + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM33_TZ_H +#define ARMCM33_TZ_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SecureFault_IRQn = -9, /* 7 Secure Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 480 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM33_REV 0x0000U /* Core revision r0p1 */ +#define __SAUREGION_PRESENT 1U /* SAU regions present */ +#define __MPU_PRESENT 1U /* MPU present */ +#define __VTOR_PRESENT 1U /* VTOR present */ +#define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 0U /* no FPU present */ +#define __DSP_PRESENT 0U /* no DSP extension present */ + +#include "core_cm33.h" /* Processor and core peripherals */ +#include "system_ARMCM33.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM33_TZ_H */ diff --git a/Platforms/IPSS/ARMCM33/Include/system_ARMCM33.h b/Platforms/IPSS/ARMCM33/Include/system_ARMCM33.h new file mode 100755 index 00000000..42d07ec5 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/Include/system_ARMCM33.h @@ -0,0 +1,55 @@ +/**************************************************************************//** + * @file system_ARMCM33.h + * @brief CMSIS Device System Header File for + * ARMCM33 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef SYSTEM_ARMCM33_H +#define SYSTEM_ARMCM33_H + +#ifdef __cplusplus +extern "C" { +#endif + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + + +/** + \brief Setup the microcontroller system. + + Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + + +/** + \brief Update SystemCoreClock variable. + + Updates the SystemCoreClock with current core Clock retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_ARMCM33_H */ diff --git a/Platforms/IPSS/ARMCM33/LinkScripts/AC6/lnk.sct b/Platforms/IPSS/ARMCM33/LinkScripts/AC6/lnk.sct new file mode 100755 index 00000000..56b3e9be --- /dev/null +++ b/Platforms/IPSS/ARMCM33/LinkScripts/AC6/lnk.sct @@ -0,0 +1,31 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +#include "mem_ARMCM33.h" + +#define __STACK_SIZE STACK_SIZE +#define __HEAP_SIZE HEAP_SIZE + +LOAD_REGION 0x0 +{ + CODE +0 0x0007ffff + { + *.o (RESET, +First) + * (InRoot$$$Sections) + * (+RO) + } + + DATA 0x20000000 0x4000 + { + * (+RW,+ZI) + } + + ARM_LIB_STACK 0x20006000 ALIGN 64 EMPTY -0x00002000 + {} + ARM_LIB_HEAP 0x20006000 ALIGN 64 EMPTY 0x0050000 + {} +} diff --git a/Platforms/IPSS/ARMCM33/LinkScripts/AC6/mem_ARMCM33.h b/Platforms/IPSS/ARMCM33/LinkScripts/AC6/mem_ARMCM33.h new file mode 100755 index 00000000..19ec60e1 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/LinkScripts/AC6/mem_ARMCM33.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM33_H +#define __MEM_ARMCM33_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM33_H */ diff --git a/Platforms/IPSS/ARMCM33/Startup/AC6/startup_ARMCM33.c b/Platforms/IPSS/ARMCM33/Startup/AC6/startup_ARMCM33.c new file mode 100755 index 00000000..6e0e96fd --- /dev/null +++ b/Platforms/IPSS/ARMCM33/Startup/AC6/startup_ARMCM33.c @@ -0,0 +1,189 @@ +/****************************************************************************** + * @file startup_ARMCM33.c + * @brief CMSIS Core Device Startup File for Cortex-M33 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined (ARMCM33) + #include "ARMCM33.h" +#elif defined (ARMCM33_TZ) + #include "ARMCM33_TZ.h" +#elif defined (ARMCM33_DSP_FP) + #include "ARMCM33_DSP_FP.h" +#elif defined (ARMCM33_DSP_FP_TZ) + #include "ARMCM33_DSP_FP_TZ.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; +extern uint32_t __STACK_LIMIT; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +//void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SecureFault_Handler (void) __attribute__ ((weak)); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[496]; + const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + SecureFault_Handler, /* -9 Secure Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 480 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#define SERIAL_BASE_ADDRESS (0x70000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); + + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +extern void __cxa_get_globals(void); +extern void __ARM_exceptions_init(void) +{ + __cxa_get_globals(); +} + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ +SERIAL_DATA='h'; +SERIAL_DATA='\n'; + while(1); +} + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void SecureFault_Handler(void) +{ +SERIAL_DATA='s'; +SERIAL_DATA='\n'; + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif + diff --git a/Platforms/IPSS/ARMCM33/system_ARMCM33.c b/Platforms/IPSS/ARMCM33/system_ARMCM33.c new file mode 100755 index 00000000..69b264f5 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/system_ARMCM33.c @@ -0,0 +1,717 @@ +/**************************************************************************//** + * @file system_ARMCM33.c + * @brief CMSIS Device System Source File for + * ARMCM33 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include + +#if defined (ARMCM33) + #include "ARMCM33.h" +#elif defined (ARMCM33_TZ) + #include "ARMCM33_TZ.h" + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #include "partition_ARMCM33.h" + #endif +#elif defined (ARMCM33_DSP_FP) + #include "ARMCM33_DSP_FP.h" +#elif defined (ARMCM33_DSP_FP_TZ) + #include "ARMCM33_DSP_FP_TZ.h" + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #include "partition_ARMCM33.h" + #endif +#else + #error device not specified! +#endif + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define SERIAL_BASE_ADDRESS (0x70000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + + + +#include "cmsis_compiler.h" + +//! \name The macros to identify the compiler +//! @{ + +//! \note for IAR +#ifdef __IS_COMPILER_IAR__ +# undef __IS_COMPILER_IAR__ +#endif +#if defined(__IAR_SYSTEMS_ICC__) +# define __IS_COMPILER_IAR__ 1 +#endif + + + + +//! \note for arm compiler 5 +#ifdef __IS_COMPILER_ARM_COMPILER_5__ +# undef __IS_COMPILER_ARM_COMPILER_5__ +#endif +#if ((__ARMCC_VERSION >= 5000000) && (__ARMCC_VERSION < 6000000)) +# define __IS_COMPILER_ARM_COMPILER_5__ 1 +#endif +//! @} + +//! \note for arm compiler 6 +#ifdef __IS_COMPILER_ARM_COMPILER_6__ +# undef __IS_COMPILER_ARM_COMPILER_6__ +#endif +#if ((__ARMCC_VERSION >= 6000000) && (__ARMCC_VERSION < 7000000)) +# define __IS_COMPILER_ARM_COMPILER_6__ 1 +#endif + +#ifdef __IS_COMPILER_LLVM__ +# undef __IS_COMPILER_LLVM__ +#endif +#if defined(__clang__) && !__IS_COMPILER_ARM_COMPILER_6__ +# define __IS_COMPILER_LLVM__ 1 +#else +//! \note for gcc +#ifdef __IS_COMPILER_GCC__ +# undef __IS_COMPILER_GCC__ +#endif +#if defined(__GNUC__) && !(__IS_COMPILER_ARM_COMPILER_6__ || __IS_COMPILER_LLVM__) +# define __IS_COMPILER_GCC__ 1 +#endif +//! @} +#endif +//! @} + +#define SAFE_ATOM_CODE(...) \ +{ \ + uint32_t wOrig = __disable_irq(); \ + __VA_ARGS__; \ + __set_PRIMASK(wOrig); \ +} + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M */ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL ( 5000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (5U * XTAL) + +#define DEBUG_DEMCR (*((unsigned int *)0xE000EDFC)) +#define DEBUG_TRCENA (1<<24) //Global debug enable bit + +#define CCR (*((volatile unsigned int *)0xE000ED14)) +#define CCR_DL (1 << 19) + +/*---------------------------------------------------------------------------- + Externals + *----------------------------------------------------------------------------*/ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + extern uint32_t __VECTOR_TABLE; +#endif + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; + + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + UART functions + *----------------------------------------------------------------------------*/ + +/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ +typedef struct +{ + __IOM uint32_t DATA; /* Offset: 0x000 (R/W) Data Register */ + __IOM uint32_t STATE; /* Offset: 0x004 (R/W) Status Register */ + __IOM uint32_t CTRL; /* Offset: 0x008 (R/W) Control Register */ + union { + __IM uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register */ + __OM uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register */ + }; + __IOM uint32_t BAUDDIV; /* Offset: 0x010 (R/W) Baudrate Divider Register */ + +} CMSDK_UART_TypeDef; + +/* CMSDK_UART DATA Register Definitions */ +#define CMSDK_UART_DATA_Pos 0 /* CMSDK_UART_DATA_Pos: DATA Position */ +#define CMSDK_UART_DATA_Msk (0xFFUL /*<< CMSDK_UART_DATA_Pos*/) /* CMSDK_UART DATA: DATA Mask */ + +/* CMSDK_UART STATE Register Definitions */ +#define CMSDK_UART_STATE_RXOR_Pos 3 /* CMSDK_UART STATE: RXOR Position */ +#define CMSDK_UART_STATE_RXOR_Msk (0x1UL << CMSDK_UART_STATE_RXOR_Pos) /* CMSDK_UART STATE: RXOR Mask */ + +#define CMSDK_UART_STATE_TXOR_Pos 2 /* CMSDK_UART STATE: TXOR Position */ +#define CMSDK_UART_STATE_TXOR_Msk (0x1UL << CMSDK_UART_STATE_TXOR_Pos) /* CMSDK_UART STATE: TXOR Mask */ + +#define CMSDK_UART_STATE_RXBF_Pos 1 /* CMSDK_UART STATE: RXBF Position */ +#define CMSDK_UART_STATE_RXBF_Msk (0x1UL << CMSDK_UART_STATE_RXBF_Pos) /* CMSDK_UART STATE: RXBF Mask */ + +#define CMSDK_UART_STATE_TXBF_Pos 0 /* CMSDK_UART STATE: TXBF Position */ +#define CMSDK_UART_STATE_TXBF_Msk (0x1UL /*<< CMSDK_UART_STATE_TXBF_Pos*/) /* CMSDK_UART STATE: TXBF Mask */ + +/* CMSDK_UART CTRL Register Definitions */ +#define CMSDK_UART_CTRL_HSTM_Pos 6 /* CMSDK_UART CTRL: HSTM Position */ +#define CMSDK_UART_CTRL_HSTM_Msk (0x01UL << CMSDK_UART_CTRL_HSTM_Pos) /* CMSDK_UART CTRL: HSTM Mask */ + +#define CMSDK_UART_CTRL_RXORIRQEN_Pos 5 /* CMSDK_UART CTRL: RXORIRQEN Position */ +#define CMSDK_UART_CTRL_RXORIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_RXORIRQEN_Pos) /* CMSDK_UART CTRL: RXORIRQEN Mask */ + +#define CMSDK_UART_CTRL_TXORIRQEN_Pos 4 /* CMSDK_UART CTRL: TXORIRQEN Position */ +#define CMSDK_UART_CTRL_TXORIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_TXORIRQEN_Pos) /* CMSDK_UART CTRL: TXORIRQEN Mask */ + +#define CMSDK_UART_CTRL_RXIRQEN_Pos 3 /* CMSDK_UART CTRL: RXIRQEN Position */ +#define CMSDK_UART_CTRL_RXIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_RXIRQEN_Pos) /* CMSDK_UART CTRL: RXIRQEN Mask */ + +#define CMSDK_UART_CTRL_TXIRQEN_Pos 2 /* CMSDK_UART CTRL: TXIRQEN Position */ +#define CMSDK_UART_CTRL_TXIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_TXIRQEN_Pos) /* CMSDK_UART CTRL: TXIRQEN Mask */ + +#define CMSDK_UART_CTRL_RXEN_Pos 1 /* CMSDK_UART CTRL: RXEN Position */ +#define CMSDK_UART_CTRL_RXEN_Msk (0x01UL << CMSDK_UART_CTRL_RXEN_Pos) /* CMSDK_UART CTRL: RXEN Mask */ + +#define CMSDK_UART_CTRL_TXEN_Pos 0 /* CMSDK_UART CTRL: TXEN Position */ +#define CMSDK_UART_CTRL_TXEN_Msk (0x01UL /*<< CMSDK_UART_CTRL_TXEN_Pos*/) /* CMSDK_UART CTRL: TXEN Mask */ + +#define CMSDK_UART_INTSTATUS_RXORIRQ_Pos 3 /* CMSDK_UART CTRL: RXORIRQ Position */ +#define CMSDK_UART_CTRL_RXORIRQ_Msk (0x01UL << CMSDK_UART_INTSTATUS_RXORIRQ_Pos) /* CMSDK_UART CTRL: RXORIRQ Mask */ + +#define CMSDK_UART_CTRL_TXORIRQ_Pos 2 /* CMSDK_UART CTRL: TXORIRQ Position */ +#define CMSDK_UART_CTRL_TXORIRQ_Msk (0x01UL << CMSDK_UART_CTRL_TXORIRQ_Pos) /* CMSDK_UART CTRL: TXORIRQ Mask */ + +#define CMSDK_UART_CTRL_RXIRQ_Pos 1 /* CMSDK_UART CTRL: RXIRQ Position */ +#define CMSDK_UART_CTRL_RXIRQ_Msk (0x01UL << CMSDK_UART_CTRL_RXIRQ_Pos) /* CMSDK_UART CTRL: RXIRQ Mask */ + +#define CMSDK_UART_CTRL_TXIRQ_Pos 0 /* CMSDK_UART CTRL: TXIRQ Position */ +#define CMSDK_UART_CTRL_TXIRQ_Msk (0x01UL /*<< CMSDK_UART_CTRL_TXIRQ_Pos*/) /* CMSDK_UART CTRL: TXIRQ Mask */ + +/* CMSDK_UART BAUDDIV Register Definitions */ +#define CMSDK_UART_BAUDDIV_Pos 0 /* CMSDK_UART BAUDDIV: BAUDDIV Position */ +#define CMSDK_UART_BAUDDIV_Msk (0xFFFFFUL /*<< CMSDK_UART_BAUDDIV_Pos*/) /* CMSDK_UART BAUDDIV: BAUDDIV Mask */ + + + + + +int stdout_putchar(char txchar) +{ + SERIAL_DATA = txchar; +} + +int stderr_putchar(char txchar) +{ + return stdout_putchar(txchar); +} + +void ttywrch (int ch) +{ + stdout_putchar(ch); +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t)(&__VECTOR_TABLE); +#endif + +#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ + (defined (__MVE_USED) && (__MVE_USED == 1U)) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + TZ_SAU_Setup(); +#endif + + // SystemCoreClock = SYSTEM_CLOCK; + + //Disable debug + // DEBUG_DEMCR &=~ DEBUG_TRCENA; + + // enable DL branch cache + +} + +__attribute__((constructor(255))) +void platform_init(void) +{ + printf("\n_[TEST START]____________________________________________________\n"); +} + + +#if __IS_COMPILER_ARM_COMPILER_6__ +__asm(".global __use_no_semihosting\n\t"); +# ifndef __MICROLIB +__asm(".global __ARM_use_no_argv\n\t"); +# endif +#endif + +/** + Writes the character specified by c (converted to an unsigned char) to + the output stream pointed to by stream, at the position indicated by the + associated file position indicator (if defined), and advances the + indicator appropriately. If the file position indicator is not defined, + the character is appended to the output stream. + + \param[in] c Character + \param[in] stream Stream handle + + \return The character written. If a write error occurs, the error + indicator is set and fputc returns EOF. +*/ +__attribute__((weak)) +int fputc (int c, FILE * stream) +{ + if (stream == &__stdout) { + return (stdout_putchar(c)); + } + + if (stream == &__stderr) { + return (stderr_putchar(c)); + } + + return (-1); +} + +/* IO device file handles. */ +#define FH_STDIN 0x8001 +#define FH_STDOUT 0x8002 +#define FH_STDERR 0x8003 + +const char __stdin_name[] = ":STDIN"; +const char __stdout_name[] = ":STDOUT"; +const char __stderr_name[] = ":STDERR"; + +#define RETARGET_SYS 1 +#define RTE_Compiler_IO_STDOUT 1 +#define RTE_Compiler_IO_STDERR 1 +/** + Defined in rt_sys.h, this function opens a file. + + The _sys_open() function is required by fopen() and freopen(). These + functions in turn are required if any file input/output function is to + be used. + The openmode parameter is a bitmap whose bits mostly correspond directly to + the ISO mode specification. Target-dependent extensions are possible, but + freopen() must also be extended. + + \param[in] name File name + \param[in] openmode Mode specification bitmap + + \return The return value is ?1 if an error occurs. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +FILEHANDLE _sys_open (const char *name, int openmode) { +#if (!defined(RTE_Compiler_IO_File)) + (void)openmode; +#endif + + if (name == NULL) { + return (-1); + } + + if (name[0] == ':') { + if (strcmp(name, ":STDIN") == 0) { + return (FH_STDIN); + } + if (strcmp(name, ":STDOUT") == 0) { + return (FH_STDOUT); + } + if (strcmp(name, ":STDERR") == 0) { + return (FH_STDERR); + } + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_open(name, openmode)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function closes a file previously opened + with _sys_open(). + + This function must be defined if any input/output function is to be used. + + \param[in] fh File handle + + \return The return value is 0 if successful. A nonzero value indicates + an error. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_close (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (0); + case FH_STDOUT: + return (0); + case FH_STDERR: + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_close(fh)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function writes the contents of a buffer to a file + previously opened with _sys_open(). + + \note The mode parameter is here for historical reasons. It contains + nothing useful and must be ignored. + + \param[in] fh File handle + \param[in] buf Data buffer + \param[in] len Data length + \param[in] mode Ignore this parameter + + \return The return value is either: + - a positive number representing the number of characters not + written (so any nonzero return value denotes a failure of + some sort) + - a negative number indicating an error. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_write (FILEHANDLE fh, const uint8_t *buf, uint32_t len, int mode) { +#if (defined(RTE_Compiler_IO_STDOUT) || defined(RTE_Compiler_IO_STDERR)) + int ch; +#elif (!defined(RTE_Compiler_IO_File)) + (void)buf; + (void)len; +#endif + (void)mode; + + switch (fh) { + case FH_STDIN: + return (-1); + case FH_STDOUT: +#ifdef RTE_Compiler_IO_STDOUT + for (; len; len--) { + ch = *buf++; + + stdout_putchar(ch); + } +#endif + return (0); + case FH_STDERR: +#ifdef RTE_Compiler_IO_STDERR + for (; len; len--) { + ch = *buf++; + + stderr_putchar(ch); + } +#endif + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_write(fh, buf, len)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function reads the contents of a file into a buffer. + + Reading up to and including the last byte of data does not turn on the EOF + indicator. The EOF indicator is only reached when an attempt is made to read + beyond the last byte of data. The target-independent code is capable of + handling: + - the EOF indicator being returned in the same read as the remaining bytes + of data that precede the EOF + - the EOF indicator being returned on its own after the remaining bytes of + data have been returned in a previous read. + + \note The mode parameter is here for historical reasons. It contains + nothing useful and must be ignored. + + \param[in] fh File handle + \param[in] buf Data buffer + \param[in] len Data length + \param[in] mode Ignore this parameter + + \return The return value is one of the following: + - The number of bytes not read (that is, len - result number of + bytes were read). + - An error indication. + - An EOF indicator. The EOF indication involves the setting of + 0x80000000 in the normal result. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_read (FILEHANDLE fh, uint8_t *buf, uint32_t len, int mode) { +#ifdef RTE_Compiler_IO_STDIN + int ch; +#elif (!defined(RTE_Compiler_IO_File)) + (void)buf; + (void)len; +#endif + (void)mode; + + switch (fh) { + case FH_STDIN: +#ifdef RTE_Compiler_IO_STDIN + ch = stdin_getchar(); + if (ch < 0) { + return ((int)(len | 0x80000000U)); + } + *buf++ = (uint8_t)ch; +#if (STDIN_ECHO != 0) + stdout_putchar(ch); +#endif + len--; + return ((int)(len)); +#else + return ((int)(len | 0x80000000U)); +#endif + case FH_STDOUT: + return (-1); + case FH_STDERR: + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_read(fh, buf, len)); +#endif +#else + return (-1); +#endif +} +#endif + + + + + +/** + Defined in rt_sys.h, this function determines if a file handle identifies + a terminal. + + When a file is connected to a terminal device, this function is used to + provide unbuffered behavior by default (in the absence of a call to + set(v)buf) and to prohibit seeking. + + \param[in] fh File handle + + \return The return value is one of the following values: + - 0: There is no interactive device. + - 1: There is an interactive device. + - other: An error occurred. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_istty (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (1); + case FH_STDOUT: + return (1); + case FH_STDERR: + return (1); + } + + return (0); +} +#endif + + +/** + Defined in rt_sys.h, this function puts the file pointer at offset pos from + the beginning of the file. + + This function sets the current read or write position to the new location pos + relative to the start of the current file fh. + + \param[in] fh File handle + \param[in] pos File pointer offset + + \return The result is: + - non-negative if no error occurs + - negative if an error occurs +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_seek (FILEHANDLE fh, long pos) { +#if (!defined(RTE_Compiler_IO_File)) + (void)pos; +#endif + + switch (fh) { + case FH_STDIN: + return (-1); + case FH_STDOUT: + return (-1); + case FH_STDERR: + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_seek(fh, (uint32_t)pos)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function returns the current length of a file. + + This function is used by _sys_seek() to convert an offset relative to the + end of a file into an offset relative to the beginning of the file. + You do not have to define _sys_flen() if you do not intend to use fseek(). + If you retarget at system _sys_*() level, you must supply _sys_flen(), + even if the underlying system directly supports seeking relative to the + end of a file. + + \param[in] fh File handle + + \return This function returns the current length of the file fh, + or a negative error indicator. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +long _sys_flen (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (0); + case FH_STDOUT: + return (0); + case FH_STDERR: + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_flen(fh)); +#endif +#else + return (0); +#endif +} +#endif + +#define log_str(...) \ + do { \ + const char *pchSrc = __VA_ARGS__; \ + uint_fast16_t hwSize = sizeof(__VA_ARGS__); \ + do { \ + stdout_putchar(*pchSrc++); \ + } while(--hwSize); \ + } while(0) + + +void _sys_exit(int n) +{ + (void)n; + log_str("\n"); + log_str("_[TEST COMPLETE]_________________________________________________\n"); + log_str("\n\n"); + *((volatile unsigned *) (SERIAL_BASE_ADDRESS-0x10000)) = 0xa; + while(1); +} + +extern void ttywrch (int ch); +__attribute__((weak)) +void _ttywrch (int ch) +{ + ttywrch(ch); +} + diff --git a/Platforms/IPSS/ARMCM4/Include/ARMCM4.h b/Platforms/IPSS/ARMCM4/Include/ARMCM4.h new file mode 100755 index 00000000..c1a98777 --- /dev/null +++ b/Platforms/IPSS/ARMCM4/Include/ARMCM4.h @@ -0,0 +1,127 @@ +/**************************************************************************//** + * @file ARMCM4.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM4 Device (configured for CM4 without FPU) + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM4_H +#define ARMCM4_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 224 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM4_REV 0x0001U /* Core revision r0p1 */ +#define __MPU_PRESENT 1U /* MPU present */ +#define __VTOR_PRESENT 1U /* VTOR present */ +#define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 0U /* no FPU present */ + +#include "core_cm4.h" /* Processor and core peripherals */ +#include "system_ARMCM4.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM4_H */ diff --git a/Platforms/IPSS/ARMCM4/Include/ARMCM4_FP.h b/Platforms/IPSS/ARMCM4/Include/ARMCM4_FP.h new file mode 100755 index 00000000..6e53824c --- /dev/null +++ b/Platforms/IPSS/ARMCM4/Include/ARMCM4_FP.h @@ -0,0 +1,127 @@ +/**************************************************************************//** + * @file ARMCM4_FP.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM4 Device (configured for CM4 with FPU) + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM4_FP_H +#define ARMCM4_FP_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 224 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM4_REV 0x0001U /* Core revision r0p1 */ +#define __MPU_PRESENT 1U /* MPU present */ +#define __VTOR_PRESENT 1U /* VTOR present */ +#define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /* FPU present */ + +#include "core_cm4.h" /* Processor and core peripherals */ +#include "system_ARMCM4.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM4_FP_H */ diff --git a/Platforms/IPSS/ARMCM4/Include/system_ARMCM4.h b/Platforms/IPSS/ARMCM4/Include/system_ARMCM4.h new file mode 100755 index 00000000..25573902 --- /dev/null +++ b/Platforms/IPSS/ARMCM4/Include/system_ARMCM4.h @@ -0,0 +1,55 @@ +/**************************************************************************//** + * @file system_ARMCM4.h + * @brief CMSIS Device System Header File for + * ARMCM4 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef SYSTEM_ARMCM4_H +#define SYSTEM_ARMCM4_H + +#ifdef __cplusplus +extern "C" { +#endif + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + + +/** + \brief Setup the microcontroller system. + + Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + + +/** + \brief Update SystemCoreClock variable. + + Updates the SystemCoreClock with current core Clock retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_ARMCM4_H */ diff --git a/Platforms/IPSS/ARMCM4/LinkScripts/AC6/lnk.sct b/Platforms/IPSS/ARMCM4/LinkScripts/AC6/lnk.sct new file mode 100755 index 00000000..7f26d631 --- /dev/null +++ b/Platforms/IPSS/ARMCM4/LinkScripts/AC6/lnk.sct @@ -0,0 +1,29 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m4 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +#include "mem_ARMCM4.h" + +LOAD_REGION 0x0 +{ + CODE +0 0x0007ffff + { + *.o (RESET, +First) + * (InRoot$$$Sections) + * (+RO) + } + + DATA 0x20000000 0x4000 + { + * (+RW,+ZI) + } + + ARM_LIB_STACK 0x20006000 ALIGN 64 EMPTY -0x00002000 + {} + ARM_LIB_HEAP 0x20006000 ALIGN 64 EMPTY 0x0050000 + {} +} + diff --git a/Platforms/IPSS/ARMCM4/LinkScripts/AC6/mem_ARMCM4.h b/Platforms/IPSS/ARMCM4/LinkScripts/AC6/mem_ARMCM4.h new file mode 100755 index 00000000..84a1ff1d --- /dev/null +++ b/Platforms/IPSS/ARMCM4/LinkScripts/AC6/mem_ARMCM4.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM7_H +#define __MEM_ARMCM7_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/IPSS/ARMCM4/Startup/AC6/startup_ARMCM4.c b/Platforms/IPSS/ARMCM4/Startup/AC6/startup_ARMCM4.c new file mode 100644 index 00000000..ccbacd40 --- /dev/null +++ b/Platforms/IPSS/ARMCM4/Startup/AC6/startup_ARMCM4.c @@ -0,0 +1,165 @@ +/****************************************************************************** + * @file startup_ARMCM4.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined (ARMCM4) + #include "ARMCM4.h" +#elif defined (ARMCM4_FP) + #include "ARMCM4_FP.h" +#else + #error device not specified! +#endif + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[240]; + const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 223 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#define SERIAL_BASE_ADDRESS (0x40000000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + SERIAL_DATA = 'h'; +SERIAL_DATA = '\n'; + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif + diff --git a/Platforms/IPSS/ARMCM4/system_ARMCM4.c b/Platforms/IPSS/ARMCM4/system_ARMCM4.c new file mode 100755 index 00000000..b31bae24 --- /dev/null +++ b/Platforms/IPSS/ARMCM4/system_ARMCM4.c @@ -0,0 +1,525 @@ +/**************************************************************************//** + * @file system_ARMCM4.c + * @brief CMSIS Device System Source File for + * ARMCM4 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include + +#if defined (ARMCM4) + #include "ARMCM4.h" +#elif defined (ARMCM4_FP) + #include "ARMCM4_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + + +#define SERIAL_BASE_ADDRESS (0x40000000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + + + + + + +/*---------------------------------------------------------------------------- + Externals + *----------------------------------------------------------------------------*/ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + extern uint32_t __VECTOR_TABLE; +#endif + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + +int stdout_putchar(char txchar) +{ + SERIAL_DATA = txchar; +} + +int stderr_putchar(char txchar) +{ + return stdout_putchar(txchar); +} + +void ttywrch (int ch) +{ + stdout_putchar(ch); +} + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ + + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t) &__VECTOR_TABLE; +#endif + + +#if defined (__FPU_USED) && (__FPU_USED == 1U) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + + SystemCoreClock = SYSTEM_CLOCK; + +} + + +#if __IS_COMPILER_ARM_COMPILER_6__ +__asm(".global __use_no_semihosting\n\t"); +# ifndef __MICROLIB +__asm(".global __ARM_use_no_argv\n\t"); +# endif +#endif + +/** + Writes the character specified by c (converted to an unsigned char) to + the output stream pointed to by stream, at the position indicated by the + associated file position indicator (if defined), and advances the + indicator appropriately. If the file position indicator is not defined, + the character is appended to the output stream. + + \param[in] c Character + \param[in] stream Stream handle + + \return The character written. If a write error occurs, the error + indicator is set and fputc returns EOF. +*/ +__attribute__((weak)) +int fputc (int c, FILE * stream) +{ + if (stream == &__stdout) { + return (stdout_putchar(c)); + } + + if (stream == &__stderr) { + return (stderr_putchar(c)); + } + + return (-1); +} + +/* IO device file handles. */ +#define FH_STDIN 0x8001 +#define FH_STDOUT 0x8002 +#define FH_STDERR 0x8003 + +const char __stdin_name[] = ":STDIN"; +const char __stdout_name[] = ":STDOUT"; +const char __stderr_name[] = ":STDERR"; + +#define RETARGET_SYS 1 +#define RTE_Compiler_IO_STDOUT 1 +#define RTE_Compiler_IO_STDERR 1 +/** + Defined in rt_sys.h, this function opens a file. + + The _sys_open() function is required by fopen() and freopen(). These + functions in turn are required if any file input/output function is to + be used. + The openmode parameter is a bitmap whose bits mostly correspond directly to + the ISO mode specification. Target-dependent extensions are possible, but + freopen() must also be extended. + + \param[in] name File name + \param[in] openmode Mode specification bitmap + + \return The return value is ?1 if an error occurs. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +FILEHANDLE _sys_open (const char *name, int openmode) { +#if (!defined(RTE_Compiler_IO_File)) + (void)openmode; +#endif + + if (name == NULL) { + return (-1); + } + + if (name[0] == ':') { + if (strcmp(name, ":STDIN") == 0) { + return (FH_STDIN); + } + if (strcmp(name, ":STDOUT") == 0) { + return (FH_STDOUT); + } + if (strcmp(name, ":STDERR") == 0) { + return (FH_STDERR); + } + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_open(name, openmode)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function closes a file previously opened + with _sys_open(). + + This function must be defined if any input/output function is to be used. + + \param[in] fh File handle + + \return The return value is 0 if successful. A nonzero value indicates + an error. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_close (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (0); + case FH_STDOUT: + return (0); + case FH_STDERR: + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_close(fh)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function writes the contents of a buffer to a file + previously opened with _sys_open(). + + \note The mode parameter is here for historical reasons. It contains + nothing useful and must be ignored. + + \param[in] fh File handle + \param[in] buf Data buffer + \param[in] len Data length + \param[in] mode Ignore this parameter + + \return The return value is either: + - a positive number representing the number of characters not + written (so any nonzero return value denotes a failure of + some sort) + - a negative number indicating an error. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_write (FILEHANDLE fh, const uint8_t *buf, uint32_t len, int mode) { +#if (defined(RTE_Compiler_IO_STDOUT) || defined(RTE_Compiler_IO_STDERR)) + int ch; +#elif (!defined(RTE_Compiler_IO_File)) + (void)buf; + (void)len; +#endif + (void)mode; + + switch (fh) { + case FH_STDIN: + return (-1); + case FH_STDOUT: +#ifdef RTE_Compiler_IO_STDOUT + for (; len; len--) { + ch = *buf++; + + stdout_putchar(ch); + } +#endif + return (0); + case FH_STDERR: +#ifdef RTE_Compiler_IO_STDERR + for (; len; len--) { + ch = *buf++; + + stderr_putchar(ch); + } +#endif + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_write(fh, buf, len)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function reads the contents of a file into a buffer. + + Reading up to and including the last byte of data does not turn on the EOF + indicator. The EOF indicator is only reached when an attempt is made to read + beyond the last byte of data. The target-independent code is capable of + handling: + - the EOF indicator being returned in the same read as the remaining bytes + of data that precede the EOF + - the EOF indicator being returned on its own after the remaining bytes of + data have been returned in a previous read. + + \note The mode parameter is here for historical reasons. It contains + nothing useful and must be ignored. + + \param[in] fh File handle + \param[in] buf Data buffer + \param[in] len Data length + \param[in] mode Ignore this parameter + + \return The return value is one of the following: + - The number of bytes not read (that is, len - result number of + bytes were read). + - An error indication. + - An EOF indicator. The EOF indication involves the setting of + 0x80000000 in the normal result. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_read (FILEHANDLE fh, uint8_t *buf, uint32_t len, int mode) { +#ifdef RTE_Compiler_IO_STDIN + int ch; +#elif (!defined(RTE_Compiler_IO_File)) + (void)buf; + (void)len; +#endif + (void)mode; + + switch (fh) { + case FH_STDIN: +#ifdef RTE_Compiler_IO_STDIN + ch = stdin_getchar(); + if (ch < 0) { + return ((int)(len | 0x80000000U)); + } + *buf++ = (uint8_t)ch; +#if (STDIN_ECHO != 0) + stdout_putchar(ch); +#endif + len--; + return ((int)(len)); +#else + return ((int)(len | 0x80000000U)); +#endif + case FH_STDOUT: + return (-1); + case FH_STDERR: + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_read(fh, buf, len)); +#endif +#else + return (-1); +#endif +} +#endif + + + + + +/** + Defined in rt_sys.h, this function determines if a file handle identifies + a terminal. + + When a file is connected to a terminal device, this function is used to + provide unbuffered behavior by default (in the absence of a call to + set(v)buf) and to prohibit seeking. + + \param[in] fh File handle + + \return The return value is one of the following values: + - 0: There is no interactive device. + - 1: There is an interactive device. + - other: An error occurred. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_istty (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (1); + case FH_STDOUT: + return (1); + case FH_STDERR: + return (1); + } + + return (0); +} +#endif + + +/** + Defined in rt_sys.h, this function puts the file pointer at offset pos from + the beginning of the file. + + This function sets the current read or write position to the new location pos + relative to the start of the current file fh. + + \param[in] fh File handle + \param[in] pos File pointer offset + + \return The result is: + - non-negative if no error occurs + - negative if an error occurs +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +int _sys_seek (FILEHANDLE fh, long pos) { +#if (!defined(RTE_Compiler_IO_File)) + (void)pos; +#endif + + switch (fh) { + case FH_STDIN: + return (-1); + case FH_STDOUT: + return (-1); + case FH_STDERR: + return (-1); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_seek(fh, (uint32_t)pos)); +#endif +#else + return (-1); +#endif +} +#endif + + +/** + Defined in rt_sys.h, this function returns the current length of a file. + + This function is used by _sys_seek() to convert an offset relative to the + end of a file into an offset relative to the beginning of the file. + You do not have to define _sys_flen() if you do not intend to use fseek(). + If you retarget at system _sys_*() level, you must supply _sys_flen(), + even if the underlying system directly supports seeking relative to the + end of a file. + + \param[in] fh File handle + + \return This function returns the current length of the file fh, + or a negative error indicator. +*/ +#ifdef RETARGET_SYS +__attribute__((weak)) +long _sys_flen (FILEHANDLE fh) { + + switch (fh) { + case FH_STDIN: + return (0); + case FH_STDOUT: + return (0); + case FH_STDERR: + return (0); + } + +#ifdef RTE_Compiler_IO_File +#ifdef RTE_Compiler_IO_File_FS + return (__sys_flen(fh)); +#endif +#else + return (0); +#endif +} +#endif + +#define log_str(...) \ + do { \ + const char *pchSrc = __VA_ARGS__; \ + uint_fast16_t hwSize = sizeof(__VA_ARGS__); \ + do { \ + stdout_putchar(*pchSrc++); \ + } while(--hwSize); \ + } while(0) + + +void _sys_exit(int n) +{ + (void)n; + log_str("\n"); + log_str("_[TEST COMPLETE]_________________________________________________\n"); + log_str("\n\n"); + stdout_putchar(4); + while(1); +} + +extern void ttywrch (int ch); +__attribute__((weak)) +void _ttywrch (int ch) +{ + ttywrch(ch); +} diff --git a/Platforms/IPSS/ARMCM7/LinkScripts/GCC/lnk.ld b/Platforms/IPSS/ARMCM7/LinkScripts/GCC/lnk.ld new file mode 100755 index 00000000..5b1c56a5 --- /dev/null +++ b/Platforms/IPSS/ARMCM7/LinkScripts/GCC/lnk.ld @@ -0,0 +1,296 @@ +/****************************************************************************** + * @file gcc_arm.ld + * @brief GNU Linker Script for Cortex-M based device + * @version V2.0.0 + * @date 21. May 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "mem_ARMCM7.h" +/* + *-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- + */ + +/*---------------------- Flash Configuration ---------------------------------- + Flash Configuration + Flash Base Address <0x0-0xFFFFFFFF:8> + Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__ROM_BASE = 0x00000000; +__ROM_SIZE = 0x00400000; + +/*--------------------- Embedded RAM Configuration ---------------------------- + RAM Configuration + RAM Base Address <0x0-0xFFFFFFFF:8> + RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__RAM_BASE = 0x20000000; +__RAM_SIZE = 0x00300000; + +/*--------------------- Stack / Heap Configuration ---------------------------- + Stack / Heap Configuration + Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__STACK_SIZE = STACK_SIZE; +__HEAP_SIZE = HEAP_SIZE; + +/* + *-------------------- <<< end of configuration section >>> ------------------- + */ + +MEMORY +{ + FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE + RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + /* + * SG veneers: + * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address + * must be set, either with the command line option ‘--section-start’ or in a linker script, + * to indicate where to place these veneers in memory. + */ +/* + .gnu.sgstubs : + { + . = ALIGN(32); + } > FLASH +*/ + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + /* Add each additional data section here */ +/* + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) +*/ + __copy_table_end__ = .; + } > FLASH + + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + /* Add each additional bss section here */ +/* + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) +*/ + __zero_table_end__ = .; + } > FLASH + + /** + * Location counter can end up 2byte aligned with narrow Thumb code but + * __etext is assumed by startup code to be the LMA of a section in RAM + * which must be 4byte aligned + */ + __etext = ALIGN (4); + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data) + *(.data.*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + /* + * Secondary data section, optional + * + * Remember to add each additional data section + * to the .copy.table above to asure proper + * initialization during startup. + */ +/* + __etext2 = ALIGN (4); + + .data2 : AT (__etext2) + { + . = ALIGN(4); + __data2_start__ = .; + *(.data2) + *(.data2.*) + . = ALIGN(4); + __data2_end__ = .; + + } > RAM2 +*/ + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM AT > RAM + + /* + * Secondary bss section, optional + * + * Remember to add each additional bss section + * to the .zero.table above to asure proper + * initialization during startup. + */ +/* + .bss2 : + { + . = ALIGN(4); + __bss2_start__ = .; + *(.bss2) + *(.bss2.*) + . = ALIGN(4); + __bss2_end__ = .; + } > RAM2 AT > RAM2 +*/ + + .heap (COPY) : + { + . = ALIGN(8); + __end__ = .; + __HeapBase = .; + PROVIDE(end = .); + . = . + __HEAP_SIZE; + . = ALIGN(8); + __HeapLimit = .; + } > RAM + + .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) : + { + . = ALIGN(8); + __StackLimit = .; + . = . + __STACK_SIZE; + . = ALIGN(8); + __StackTop = .; + } > RAM + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/Platforms/IPSS/ARMCM7/LinkScripts/GCC/mem_ARMCM7.h b/Platforms/IPSS/ARMCM7/LinkScripts/GCC/mem_ARMCM7.h new file mode 100755 index 00000000..84a1ff1d --- /dev/null +++ b/Platforms/IPSS/ARMCM7/LinkScripts/GCC/mem_ARMCM7.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM7_H +#define __MEM_ARMCM7_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/IPSS/ARMCM7/Startup/AC6/startup_ARMCM7.c b/Platforms/IPSS/ARMCM7/Startup/AC6/startup_ARMCM7.c new file mode 100644 index 00000000..18f56516 --- /dev/null +++ b/Platforms/IPSS/ARMCM7/Startup/AC6/startup_ARMCM7.c @@ -0,0 +1,159 @@ +/****************************************************************************** + * @file startup_ARMCM7.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined (ARMCM7) + #include "ARMCM7.h" +#elif defined (ARMCM7_SP) + #include "ARMCM7_SP.h" +#elif defined (ARMCM7_DP) + #include "ARMCM7_DP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[240]; + const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 223 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif + diff --git a/Testing/FrameworkInclude/Test.h b/Testing/FrameworkInclude/Test.h index 65ca3170..699d4bf0 100644 --- a/Testing/FrameworkInclude/Test.h +++ b/Testing/FrameworkInclude/Test.h @@ -570,7 +570,15 @@ private: return(v->run(this)); } + // Check if, for benchmark, we want to run the code once + // before benchmarking it, to force it to be in the I-cache. + bool isForcedInCache(); + + // Change the status of the forceInCache mode. + void setForceInCache(bool); + private: + bool m_forcedInCache=false; // List of tests std::vector m_tests; // List of tests IDs (since they are not contiguous diff --git a/Testing/FrameworkSource/IORunner.cpp b/Testing/FrameworkSource/IORunner.cpp index d195dc25..b975cdef 100644 --- a/Testing/FrameworkSource/IORunner.cpp +++ b/Testing/FrameworkSource/IORunner.cpp @@ -206,7 +206,17 @@ Otherwise, the calibration is measured below. // and do specific initialization for the tests s->setUp(m_io->CurrentTestID(),params,m_mgr); - // Run the test + // Run the test once to force the code to be in cache. + // By default it is disabled in the suite. + if (s->isForcedInCache()) + { + if (!m_mgr->HasMemError()) + { + (s->*t)(); + } + } + + // Run the test cycleMeasurementStart(); #ifdef EXTBENCH startSection(); diff --git a/Testing/FrameworkSource/Test.cpp b/Testing/FrameworkSource/Test.cpp index 41c80f85..69a6215c 100644 --- a/Testing/FrameworkSource/Test.cpp +++ b/Testing/FrameworkSource/Test.cpp @@ -70,6 +70,15 @@ namespace Client return(m_tests.size()); } + bool Suite::isForcedInCache() + { + return(m_forcedInCache); + } + + void Suite::setForceInCache(bool status) + { + m_forcedInCache = status; + } diff --git a/Testing/FrameworkSource/Timing.cpp b/Testing/FrameworkSource/Timing.cpp index b51be60a..ccf7c139 100644 --- a/Testing/FrameworkSource/Timing.cpp +++ b/Testing/FrameworkSource/Timing.cpp @@ -69,7 +69,7 @@ unsigned long sectionCounter=0; void initCycleMeasurement() { #ifdef CORTEXM - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk; + SysTick->CTRL = 0; SysTick->LOAD = SYSTICK_INITIAL_VALUE; #endif @@ -106,17 +106,15 @@ void cycleMeasurementStart() { #ifndef EXTBENCH #ifdef CORTEXM - /* - TODO: - This code is likely to be wrong. Don't rely on it for benchmarks. - - */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk; + + SysTick->CTRL = 0; SysTick->LOAD = SYSTICK_INITIAL_VALUE; + SysTick->VAL = 0; SysTick->CTRL = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk; while(SysTick->VAL == 0); + startCycles = SysTick->VAL; @@ -138,7 +136,7 @@ void cycleMeasurementStop() { #ifndef EXTBENCH #ifdef CORTEXM - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk; + SysTick->CTRL = 0; SysTick->LOAD = SYSTICK_INITIAL_VALUE; #endif #endif @@ -148,7 +146,16 @@ Testing::cycles_t getCycles() { #ifdef CORTEXM uint32_t v = SysTick->VAL; - return(startCycles - v); + Testing::cycles_t result; + if (v < startCycles) + { + result = startCycles - v; + } + else + { + result = SYSTICK_INITIAL_VALUE - (v - startCycles); + } + return(result); #endif #ifdef CORTEXA diff --git a/Testing/TestScripts/Regression/Commands.py b/Testing/TestScripts/Regression/Commands.py index a9e94c85..128fdb6d 100755 --- a/Testing/TestScripts/Regression/Commands.py +++ b/Testing/TestScripts/Regression/Commands.py @@ -8,6 +8,7 @@ from contextlib import contextmanager import shutil import glob from pathlib import Path +import sys DEBUGMODE = False KEEPBUILDFOLDER = False @@ -141,9 +142,9 @@ class BuildConfig: with open(os.path.join(self.archiveLogPath(),"makelog_%s.txt" % test),"w") as makelog: with open(os.path.join(self.archiveErrorPath(),"makeerror_%s.txt" % test),"w") as makeerr: if DEBUGMODE: - completed=subprocess.run(["make","-j8","VERBOSE=1"],timeout=3600) + completed=subprocess.run(["make","-j4","VERBOSE=1"],timeout=3600) else: - completed=subprocess.run(["make","-j8","VERBOSE=1"],stdout=makelog,stderr=makeerr,timeout=3600) + completed=subprocess.run(["make","-j4","VERBOSE=1"],stdout=makelog,stderr=makeerr,timeout=3600) # Restore environment variables self.restoreEnv() check(completed) @@ -281,7 +282,7 @@ class Test: # Process a test from the test description file def processTest(self): - completed=subprocess.run(["python","processTests.py","-e",self.testName()],timeout=3600) + completed=subprocess.run([sys.executable,"processTests.py","-e",self.testName()],timeout=3600) check(completed) def getResultPath(self): @@ -309,7 +310,7 @@ class Test: def processResult(self): msg(" Parse result for %s\n" % self.testName()) with open(os.path.join(self.buildConfig().archiveResultPath(),"processedResult_%s.txt" % self.testName()),"w") as presult: - completed=subprocess.run(["python","processResult.py","-e","-r",self.getResultPath()],stdout=presult,timeout=3600) + completed=subprocess.run([sys.executable,"processResult.py","-e","-r",self.getResultPath()],stdout=presult,timeout=3600) # When a test fail, the regression is continuing but we # track that a test has failed if completed.returncode==0: @@ -345,14 +346,14 @@ class Test: # Preprocess the test description def preprocess(desc): msg("Process test description file %s\n" % desc) - completed = subprocess.run(["python", "preprocess.py","-f",desc],timeout=3600) + completed = subprocess.run([sys.executable, "preprocess.py","-f",desc],timeout=3600) check(completed) # Generate all missing C code by using all classes in the # test description file def generateAllCCode(): msg("Generate all missing C files\n") - completed = subprocess.run(["python","processTests.py", "-e"],timeout=3600) + completed = subprocess.run([sys.executable,"processTests.py", "-e"],timeout=3600) check(completed) diff --git a/Testing/main.cpp b/Testing/main.cpp index d9de3636..49990479 100644 --- a/Testing/main.cpp +++ b/Testing/main.cpp @@ -1,5 +1,7 @@ +#include extern int testmain(); + int main() { return(testmain()); diff --git a/Testing/testmain.cpp b/Testing/testmain.cpp index a7ff79c4..14293c64 100644 --- a/Testing/testmain.cpp +++ b/Testing/testmain.cpp @@ -27,9 +27,6 @@ int testmain() { char *memoryBuf=NULL; - - - memoryBuf = (char*)malloc(MEMSIZE); if (memoryBuf !=NULL) { diff --git a/configBoot.cmake b/configBoot.cmake index b2fb3bf5..2a22665c 100755 --- a/configBoot.cmake +++ b/configBoot.cmake @@ -55,10 +55,18 @@ function(configboot PROJECT_NAME ROOT PLATFORMFOLDER) # Cortex M # # C startup for M55 boot code - if (ARM_CPU MATCHES "^[cC]ortex-[mM]55([^0-9].*)?$") - cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} ON) - elseif (ARM_CPU MATCHES "^[cC]ortex-[Mm].*$") - cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} OFF) + if (${PLATFORMID} STREQUAL "IPSS") + if (GCC) + cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} OFF) + else() + cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} ON) + endif() + else() + if (ARM_CPU MATCHES "^[cC]ortex-[mM]55([^0-9].*)?$") + cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} ON) + elseif (ARM_CPU MATCHES "^[cC]ortex-[Mm].*$") + cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} OFF) + endif() endif() diff --git a/configPlatform.cmake b/configPlatform.cmake index 1b6514e7..5427a4f9 100644 --- a/configPlatform.cmake +++ b/configPlatform.cmake @@ -3,6 +3,7 @@ option(SEMIHOSTING "Test trace using printf" ON) if (PLATFORM STREQUAL "FVP") SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/FVP) SET(PLATFORMID "FVP") +SET(PLATFORMOPT "-DFVP") list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/FVP) endif() @@ -142,6 +143,7 @@ endfunction() function(core_includes PROJECTNAME) target_include_directories(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/Include) + target_compile_options(${PROJECTNAME} PRIVATE ${PLATFORMOPT}) endfunction() function (configplatformForLib PROJECTNAME ROOT)