diff --git a/Include/arm_helium_utils.h b/Include/arm_helium_utils.h index bbde9593..4041c987 100755 --- a/Include/arm_helium_utils.h +++ b/Include/arm_helium_utils.h @@ -219,4 +219,4 @@ __STATIC_INLINE q15x8_t FAST_VSQRT_Q15(q15x8_t vecIn) #endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI) */ -#endif \ No newline at end of file +#endif diff --git a/Include/arm_math.h b/Include/arm_math.h index a1d39552..092bcbb8 100644 --- a/Include/arm_math.h +++ b/Include/arm_math.h @@ -992,7 +992,7 @@ MSVC is not going to be used to cross-compile to ARM. So, having a MSVC compiler file in Core or Core_A would not make sense. */ -#if defined ( _MSC_VER ) || (__GNUC_PYTHON__) +#if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data) { if (data == 0U) { return 32U; } @@ -1247,11 +1247,11 @@ __STATIC_INLINE float32_t arm_exponent_f32(float32_t x, int32_t nb) * @param[out] normalized is the 32-bit normalized value * @param[out] norm is norm scale */ -__STATIC_INLINE void arm_norm_64_to_32u(uint64_t in, q31_t * normalized, int *norm) +__STATIC_INLINE void arm_norm_64_to_32u(uint64_t in, int32_t * normalized, int32_t *norm) { - q31_t n1; - q31_t hi = (q31_t) (in >> 32); - q31_t lo = (q31_t) ((in << 32) >> 32); + int32_t n1; + int32_t hi = (int32_t) (in >> 32); + int32_t lo = (int32_t) ((in << 32) >> 32); n1 = __CLZ(hi) - 32; if (!n1) @@ -1266,7 +1266,7 @@ __STATIC_INLINE void arm_norm_64_to_32u(uint64_t in, q31_t * normalized, int *n * MSB set, need to scale down by 1 */ *norm = -1; - *normalized = (((unsigned long) lo) >> 1); + *normalized = (((uint32_t) lo) >> 1); } else { if (n1 == 32) @@ -1295,16 +1295,16 @@ __STATIC_INLINE void arm_norm_64_to_32u(uint64_t in, q31_t * normalized, int *n /* * 64 bit normalization */ - *normalized = (((unsigned long) lo) >> n1) | (hi << (32 - n1)); + *normalized = (((uint32_t) lo) >> n1) | (hi << (32 - n1)); } } __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) { q31_t result; - q63_t absNum; - q31_t normalized; - q31_t norm; + uint64_t absNum; + int32_t normalized; + int32_t norm; /* * if sum fits in 32bits @@ -8425,7 +8425,7 @@ float32_t arm_yule_distance(const uint32_t *pA, const uint32_t *pB, uint32_t num #define IAR_ONLY_LOW_OPTIMIZATION_ENTER #define IAR_ONLY_LOW_OPTIMIZATION_EXIT -#elif defined ( _MSC_VER ) || (__GNUC_PYTHON__) +#elif defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) #define LOW_OPTIMIZATION_ENTER #define LOW_OPTIMIZATION_EXIT #define IAR_ONLY_LOW_OPTIMIZATION_ENTER diff --git a/Platforms/FVP/ARMCA5/LinkScripts/AC5/lnk.sct b/Platforms/FVP/ARMCA5/LinkScripts/AC5/lnk.sct new file mode 100755 index 00000000..41e562cb --- /dev/null +++ b/Platforms/FVP/ARMCA5/LinkScripts/AC5/lnk.sct @@ -0,0 +1,77 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-a5 -xc +;************************************************** +; Copyright (c) 2017 ARM Ltd. All rights reserved. +;************************************************** + +; Scatter-file for RTX Example on Versatile Express + +; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map. + +; This platform has 2GB SDRAM starting at 0x80000000. + +#include "mem_ARMCA5.h" + +SDRAM __ROM_BASE __ROM_SIZE ; load region size_region +{ + VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address + { + * (RESET, +FIRST) ; Vector table and other startup code + * (InRoot$$Sections) ; All (library) code that must be in a root region + * (+RO-CODE) ; Application RO code (.text) + * (+RO-DATA) ; Application RO data (.constdata) + } + + RW_DATA __RAM_BASE __RW_DATA_SIZE + { * (+RW) } ; Application RW data (.data) + + ZI_DATA (__RAM_BASE+ + __RW_DATA_SIZE) __ZI_DATA_SIZE + { * (+ZI) } ; Application ZI data (.bss) + + ARM_LIB_HEAP (__RAM_BASE + +__RW_DATA_SIZE + +__ZI_DATA_SIZE) EMPTY __HEAP_SIZE ; Heap region growing up + { } + + ARM_LIB_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE + -__IRQ_STACK_SIZE + -__SVC_STACK_SIZE + -__ABT_STACK_SIZE + -__UND_STACK_SIZE) EMPTY -__STACK_SIZE ; Stack region growing down + { } + + UND_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE + -__IRQ_STACK_SIZE + -__SVC_STACK_SIZE + -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack + { } + + ABT_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE + -__IRQ_STACK_SIZE + -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack + { } + + SVC_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE + -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack + { } + + IRQ_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack + { } + + FIQ_STACK (__RAM_BASE + +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack + { } + + TTB __TTB_BASE EMPTY __TTB_SIZE ; Level-1 Translation Table for MMU + { } +} diff --git a/Platforms/FVP/ARMCA5/LinkScripts/AC5/mem_ARMCA5.h b/Platforms/FVP/ARMCA5/LinkScripts/AC5/mem_ARMCA5.h new file mode 100755 index 00000000..55badff8 --- /dev/null +++ b/Platforms/FVP/ARMCA5/LinkScripts/AC5/mem_ARMCA5.h @@ -0,0 +1,101 @@ +/**************************************************************************//** + * @file mem_ARMCA5.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCA5_H +#define __MEM_ARMCA5_H + +/*---------------------------------------------------------------------------- + User Stack & Heap size definition + *----------------------------------------------------------------------------*/ +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/*--------------------- ROM Configuration ------------------------------------ +// +// ROM Configuration +// For compatibility with MMU config the sections must be multiple of 1MB +// ROM Base Address <0x0-0xFFFFFFFF:0x100000> +// ROM Size (in Bytes) <0x0-0xFFFFFFFF:0x100000> +// + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x80000000 +#define __ROM_SIZE 0x00400000 + +/*--------------------- RAM Configuration ----------------------------------- +// RAM Configuration +// For compatibility with MMU config the sections must be multiple of 1MB +// RAM Base Address <0x0-0xFFFFFFFF:0x100000> +// RAM Total Size (in Bytes) <0x0-0xFFFFFFFF:0x100000> +// Data Sections +// RW_DATA Size (in Bytes) <0x0-0xFFFFFFFF:8> +// ZI_DATA Size (in Bytes) <0x0-0xFFFFFFFF:8> +// +// Stack / Heap Configuration +// Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +// Exceptional Modes +// UND Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// ABT Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// SVC Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// IRQ Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// FIQ Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// +// +// + *----------------------------------------------------------------------------*/ +//#define __RAM_BASE 0x80200000# +#define __RAM_BASE 0x80600000 +#define __RAM_SIZE 0x00700000 + +#define __RW_DATA_SIZE 0x00200000 +#define __ZI_DATA_SIZE 0x00200000 + +#define __STACK_SIZE 0x00007000 +#define __HEAP_SIZE 0x00200000 + +#define __UND_STACK_SIZE 0x00000100 +#define __ABT_STACK_SIZE 0x00000100 +#define __SVC_STACK_SIZE 0x00000100 +#define __IRQ_STACK_SIZE 0x00000100 +#define __FIQ_STACK_SIZE 0x00000100 + +/*----------------------------------------------------------------------------*/ + +/*--------------------- TTB Configuration ------------------------------------ +// +// TTB Configuration +// The TLB L1 contains 4096 32-bit entries and must be 16kB aligned +// The TLB L2 entries are placed after the L1 in the MMU config +// TTB Base Address <0x0-0xFFFFFFFF:0x4000> +// TTB Size (in Bytes) <0x0-0xFFFFFFFF:8> +// + *----------------------------------------------------------------------------*/ +#define __TTB_BASE 0x80500000 +#define __TTB_SIZE 0x00005000 + +#endif /* __MEM_ARMCA5_H */ diff --git a/Platforms/FVP/ARMCA5/LinkScripts/AC5/system_ARMCA5.h b/Platforms/FVP/ARMCA5/LinkScripts/AC5/system_ARMCA5.h new file mode 100755 index 00000000..6a2a6dad --- /dev/null +++ b/Platforms/FVP/ARMCA5/LinkScripts/AC5/system_ARMCA5.h @@ -0,0 +1,65 @@ +/****************************************************************************** + * @file system_ARMCA5.h + * @brief CMSIS Device System Header File for Arm Cortex-A5 Device Series + * @version V1.00 + * @date 10. January 2018 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __SYSTEM_ARMCA5_H +#define __SYSTEM_ARMCA5_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + \brief Setup the microcontroller system. + + Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + + +/** + \brief Update SystemCoreClock variable. + + Updates the SystemCoreClock with current core Clock retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +/** + \brief Create Translation Table. + + Creates Memory Management Unit Translation Table. + */ +extern void MMU_CreateTranslationTable(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __SYSTEM_ARMCA5_H */ diff --git a/Platforms/FVP/ARMCA5/Startup/AC5/startup_ARMCA5.c b/Platforms/FVP/ARMCA5/Startup/AC5/startup_ARMCA5.c new file mode 100755 index 00000000..535a2005 --- /dev/null +++ b/Platforms/FVP/ARMCA5/Startup/AC5/startup_ARMCA5.c @@ -0,0 +1,138 @@ +/****************************************************************************** + * @file startup_ARMCA5.c + * @brief CMSIS Device System Source File for Arm Cortex-A5 Device Series + * @version V1.00 + * @date 10. January 2018 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +/*---------------------------------------------------------------------------- + Definitions + *----------------------------------------------------------------------------*/ +#define USR_MODE 0x10 // User mode +#define FIQ_MODE 0x11 // Fast Interrupt Request mode +#define IRQ_MODE 0x12 // Interrupt Request mode +#define SVC_MODE 0x13 // Supervisor mode +#define ABT_MODE 0x17 // Abort mode +#define UND_MODE 0x1B // Undefined Instruction mode +#define SYS_MODE 0x1F // System mode + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +void Vectors (void) __attribute__ ((naked, section("RESET"))); +void Reset_Handler (void) __attribute__ ((naked)); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +void Undef_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PAbt_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DAbt_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void FIQ_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector Table + *----------------------------------------------------------------------------*/ +void Vectors(void) { + __ASM volatile( + "LDR PC, =Reset_Handler \n" + "LDR PC, =Undef_Handler \n" + "LDR PC, =SVC_Handler \n" + "LDR PC, =PAbt_Handler \n" + "LDR PC, =DAbt_Handler \n" + "NOP \n" + "LDR PC, =IRQ_Handler \n" + "LDR PC, =FIQ_Handler \n" + ); +} + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +void Reset_Handler(void) { + __ASM volatile( + + // Mask interrupts + "CPSID if \n" + + // Put any cores other than 0 to sleep + "MRC p15, 0, R0, c0, c0, 5 \n" // Read MPIDR + "ANDS R0, R0, #3 \n" + "goToSleep: \n" + "WFINE \n" + "BNE goToSleep \n" + + // Reset SCTLR Settings + "MRC p15, 0, R0, c1, c0, 0 \n" // Read CP15 System Control register + "BIC R0, R0, #(0x1 << 12) \n" // Clear I bit 12 to disable I Cache + "BIC R0, R0, #(0x1 << 2) \n" // Clear C bit 2 to disable D Cache + "BIC R0, R0, #0x1 \n" // Clear M bit 0 to disable MMU + "BIC R0, R0, #(0x1 << 11) \n" // Clear Z bit 11 to disable branch prediction + "BIC R0, R0, #(0x1 << 13) \n" // Clear V bit 13 to disable hivecs + "MCR p15, 0, R0, c1, c0, 0 \n" // Write value back to CP15 System Control register + "ISB \n" + + // Configure ACTLR + "MRC p15, 0, r0, c1, c0, 1 \n" // Read CP15 Auxiliary Control Register + "ORR r0, r0, #(1 << 1) \n" // Enable L2 prefetch hint (UNK/WI since r4p1) + "MCR p15, 0, r0, c1, c0, 1 \n" // Write CP15 Auxiliary Control Register + + // Set Vector Base Address Register (VBAR) to point to this application's vector table + "LDR R0, =Vectors \n" + "MCR p15, 0, R0, c12, c0, 0 \n" + + // Setup Stack for each exceptional mode + "CPS #0x11 \n" + "LDR SP, =Image$$FIQ_STACK$$ZI$$Limit \n" + "CPS #0x12 \n" + "LDR SP, =Image$$IRQ_STACK$$ZI$$Limit \n" + "CPS #0x13 \n" + "LDR SP, =Image$$SVC_STACK$$ZI$$Limit \n" + "CPS #0x17 \n" + "LDR SP, =Image$$ABT_STACK$$ZI$$Limit \n" + "CPS #0x1B \n" + "LDR SP, =Image$$UND_STACK$$ZI$$Limit \n" + "CPS #0x1F \n" + "LDR SP, =Image$$ARM_LIB_STACK$$ZI$$Limit \n" + + // Call SystemInit + "BL SystemInit \n" + + // Unmask interrupts + "CPSIE if \n" + + // Call __main + "BL __main \n" + ); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) { + while(1); +} diff --git a/Platforms/FVP/ARMCM0/LinkScripts/AC5/lnk.sct b/Platforms/FVP/ARMCM0/LinkScripts/AC5/lnk.sct new file mode 100755 index 00000000..37072231 --- /dev/null +++ b/Platforms/FVP/ARMCM0/LinkScripts/AC5/lnk.sct @@ -0,0 +1,75 @@ +#! armcc -E +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +#include "mem_ARMCM0.h" + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00200000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00200000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE STACK_SIZE +#define __HEAP_SIZE HEAP_SIZE + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundery definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) /* starts at end of RAM */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE (__RAM_BASE ) +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/Platforms/FVP/ARMCM0/LinkScripts/AC5/mem_ARMCM0.h b/Platforms/FVP/ARMCM0/LinkScripts/AC5/mem_ARMCM0.h new file mode 100755 index 00000000..21a395ec --- /dev/null +++ b/Platforms/FVP/ARMCM0/LinkScripts/AC5/mem_ARMCM0.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM0_H +#define __MEM_ARMCM0_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM0_H */ diff --git a/Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct b/Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct index 2c858e2e..12700611 100755 --- a/Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct +++ b/Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct @@ -14,7 +14,7 @@ ; *----------------------------------------------------------------------------*/ #define __ROM_BASE 0x00000000 -#define __ROM_SIZE 0x00100000 +#define __ROM_SIZE 0x00200000 /*--------------------- Embedded RAM Configuration --------------------------- ; RAM Configuration diff --git a/Platforms/FVP/ARMCM0/Startup/AC5/startup_ARMCM0.s b/Platforms/FVP/ARMCM0/Startup/AC5/startup_ARMCM0.s new file mode 100755 index 00000000..cb6ea982 --- /dev/null +++ b/Platforms/FVP/ARMCM0/Startup/AC5/startup_ARMCM0.s @@ -0,0 +1,168 @@ +;/**************************************************************************//** +; * @file startup_ARMCM7.s +; * @brief CMSIS Core Device Startup File for +; * ARMCM7 Device +; * @version V5.4.0 +; * @date 12. December 2018 +; ******************************************************************************/ +;/* +; * Copyright (c) 2009-2018 Arm Limited. All rights reserved. +; * +; * SPDX-License-Identifier: Apache-2.0 +; * +; * Licensed under the Apache License, Version 2.0 (the License); you may +; * not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an AS IS BASIS, WITHOUT +; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; */ + +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + +#include "mem_ARMCM0.h" + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU STACK_SIZE + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +__stack_limit +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU HEAP_SIZE + + IF Heap_Size != 0 ; Heap is provided + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + ENDIF + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; -14 NMI Handler + DCD HardFault_Handler ; -13 Hard Fault Handler + DCD MemManage_Handler ; -12 MPU Fault Handler + DCD BusFault_Handler ; -11 Bus Fault Handler + DCD UsageFault_Handler ; -10 Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; -5 SVCall Handler + DCD DebugMon_Handler ; -4 Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; -2 PendSV Handler + DCD SysTick_Handler ; -1 SysTick Handler + + ; Interrupts + DCD Interrupt0_Handler ; 0 Interrupt 0 + DCD Interrupt1_Handler ; 1 Interrupt 1 + DCD Interrupt2_Handler ; 2 Interrupt 2 + DCD Interrupt3_Handler ; 3 Interrupt 3 + DCD Interrupt4_Handler ; 4 Interrupt 4 + DCD Interrupt5_Handler ; 5 Interrupt 5 + DCD Interrupt6_Handler ; 6 Interrupt 6 + DCD Interrupt7_Handler ; 7 Interrupt 7 + DCD Interrupt8_Handler ; 8 Interrupt 8 + DCD Interrupt9_Handler ; 9 Interrupt 9 + + SPACE (214 * 4) ; Interrupts 10 .. 224 are left out +__Vectors_End +__Vectors_Size EQU __Vectors_End - __Vectors + + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Macro to define default exception/interrupt handlers. +; Default handler are weak symbols with an endless loop. +; They can be overwritten by real handlers. + MACRO + Set_Default_Handler $Handler_Name +$Handler_Name PROC + EXPORT $Handler_Name [WEAK] + B . + ENDP + MEND + + +; Default exception/interrupt handler + + Set_Default_Handler NMI_Handler + Set_Default_Handler HardFault_Handler + Set_Default_Handler MemManage_Handler + Set_Default_Handler BusFault_Handler + Set_Default_Handler UsageFault_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler DebugMon_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler Interrupt0_Handler + Set_Default_Handler Interrupt1_Handler + Set_Default_Handler Interrupt2_Handler + Set_Default_Handler Interrupt3_Handler + Set_Default_Handler Interrupt4_Handler + Set_Default_Handler Interrupt5_Handler + Set_Default_Handler Interrupt6_Handler + Set_Default_Handler Interrupt7_Handler + Set_Default_Handler Interrupt8_Handler + Set_Default_Handler Interrupt9_Handler + + ALIGN + + +; User setup Stack & Heap + + IF :LNOT::DEF:__MICROLIB + IMPORT __use_two_region_memory + ENDIF + + EXPORT __stack_limit + EXPORT __initial_sp + IF Heap_Size != 0 ; Heap is provided + EXPORT __heap_base + EXPORT __heap_limit + ENDIF + + END diff --git a/Source/BasicMathFunctions/arm_dot_prod_f32.c b/Source/BasicMathFunctions/arm_dot_prod_f32.c index 58bdcb08..ef0e2aa0 100644 --- a/Source/BasicMathFunctions/arm_dot_prod_f32.c +++ b/Source/BasicMathFunctions/arm_dot_prod_f32.c @@ -131,7 +131,6 @@ void arm_dot_prod_f32( #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) f32x4_t vec1; f32x4_t vec2; - f32x4_t res; f32x4_t accum = vdupq_n_f32(0); /* Compute 4 outputs at a time */ diff --git a/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c b/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c index 9f7cee81..545f02f5 100755 --- a/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c +++ b/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c @@ -55,7 +55,7 @@ uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_ins const float32_t * in, float32_t *pBuffer) { - int nbClass; + uint32_t nbClass; const float32_t *pTheta = S->theta; const float32_t *pSigma = S->sigma; float32_t *buffer = pBuffer; @@ -79,7 +79,7 @@ uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_ins vacc1 = vdupq_n_f32(0); vacc2 = vdupq_n_f32(0); - int32_t blkCnt =S->vectorDimension >> 2; + uint32_t blkCnt =S->vectorDimension >> 2; while (blkCnt > 0U) { f32x4_t vinvSigma, vtmp; @@ -145,8 +145,7 @@ uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_ins const float32_t * in, float32_t *pBuffer) { - int nbClass; - int nbDim; + const float32_t *pPrior = S->classPriors; const float32_t *pTheta = S->theta; @@ -338,8 +337,8 @@ uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_ins const float32_t * in, float32_t *pBuffer) { - int nbClass; - int nbDim; + uint32_t nbClass; + uint32_t nbDim; const float32_t *pPrior = S->classPriors; const float32_t *pTheta = S->theta; const float32_t *pSigma = S->sigma; diff --git a/Source/CommonTables/arm_common_tables.c b/Source/CommonTables/arm_common_tables.c index 95d44936..9c9cccf2 100644 --- a/Source/CommonTables/arm_common_tables.c +++ b/Source/CommonTables/arm_common_tables.c @@ -57375,4 +57375,4 @@ const float32_t __logf_lut_f32[8] = { // Lookup table that store the reverse of each table const unsigned char hwLUT[256] = { B6(0), B6(1), B6(1), B6(2) }; -#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */ \ No newline at end of file +#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */ diff --git a/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c index e880735b..4e74bccd 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c +++ b/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c @@ -76,8 +76,8 @@ void arm_cmplx_conj_f32( uint32_t numSamples) { static const float32_t cmplx_conj_sign[4] = { 1.0f, -1.0f, 1.0f, -1.0f }; - int32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; f32x4_t vecSrc; f32x4_t vecSign; diff --git a/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c index 65eb910c..8c1644be 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c +++ b/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c @@ -56,8 +56,8 @@ void arm_cmplx_conj_q15( q15_t * pDst, uint32_t numSamples) { - int32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; q31_t in1; q15x8_t vecSrc; diff --git a/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c index b8f5dc26..75bdddbc 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c +++ b/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c @@ -57,8 +57,8 @@ void arm_cmplx_conj_q31( uint32_t numSamples) { - int32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; q31x4_t vecSrc; q31x4_t vecSign; q31_t in; /* Temporary input variable */ diff --git a/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c index 59076f45..1f747ae9 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c +++ b/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c @@ -83,8 +83,8 @@ void arm_cmplx_dot_prod_f32( float32_t * realResult, float32_t * imagResult) { - int32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; float32_t real_sum, imag_sum; f32x4_t vecSrcA, vecSrcB; f32x4_t vec_acc = vdupq_n_f32(0.0f); diff --git a/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c index 5fe5f0af..5502a48a 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c +++ b/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c @@ -63,8 +63,8 @@ void arm_cmplx_dot_prod_q15( q31_t * imagResult) { - int32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; q15_t a0,b0,c0,d0; q63_t accReal = 0LL; q63_t accImag = 0LL; diff --git a/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c index 821c6f3b..5e086eca 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c +++ b/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c @@ -64,8 +64,8 @@ void arm_cmplx_dot_prod_q31( q63_t * realResult, q63_t * imagResult) { - int32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; q31x4_t vecSrcA, vecSrcB; q63_t accReal = 0LL; q63_t accImag = 0LL; diff --git a/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c index 1de597db..3352032e 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c +++ b/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c @@ -76,8 +76,8 @@ void arm_cmplx_mult_cmplx_f32( float32_t * pDst, uint32_t numSamples) { - int32_t blkCnt; /* loop counters */ - int32_t blockSize = numSamples; /* loop counters */ + uint32_t blkCnt; /* loop counters */ + uint32_t blockSize = numSamples; /* loop counters */ float32_t a, b, c, d; /* Temporary variables to store real and imaginary values */ f32x4x2_t vecA; @@ -140,7 +140,6 @@ void arm_cmplx_mult_cmplx_f32( #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) float32x4x2_t va, vb; - float32x4_t real, imag; float32x4x2_t outCplx; /* Compute 4 outputs at a time */ diff --git a/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c index 6650179d..310ed98a 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c +++ b/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c @@ -57,8 +57,8 @@ void arm_cmplx_mult_cmplx_q15( q15_t * pDst, uint32_t numSamples) { - int32_t blkCnt; /* loop counters */ - int32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; /* loop counters */ + uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ q15_t a, b, c, d; q15x8_t vecA; diff --git a/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c index dbf7e2bd..a14decf5 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c +++ b/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c @@ -58,8 +58,8 @@ void arm_cmplx_mult_cmplx_q31( uint32_t numSamples) { - int32_t blkCnt; /* loop counters */ - int32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; /* loop counters */ + uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ q31x4_t vecA; q31x4_t vecB; q31x4_t vecDst; diff --git a/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c index 6e556b56..25d60a5c 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c +++ b/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c @@ -79,8 +79,8 @@ void arm_cmplx_mult_real_f32( { const static uint32_t stride_cmplx_x_real_32[4] = { 0, 0, 1, 1 }; - int32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; f32x4_t rVec; f32x4_t cmplxVec; f32x4_t dstVec; diff --git a/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c index 854d9a6b..8175938e 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c +++ b/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c @@ -64,8 +64,8 @@ void arm_cmplx_mult_real_q15( q15x8_t cmplxVec; q15x8_t dstVec; uint16x8_t strideVec; - int32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; q15_t in; /* diff --git a/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c index 7125cc87..bc9ba69f 100644 --- a/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c +++ b/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c @@ -65,8 +65,8 @@ void arm_cmplx_mult_real_q31( q31x4_t cmplxVec; q31x4_t dstVec; uint32x4_t strideVec; - int32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ - int32_t blkCnt; + uint32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ + uint32_t blkCnt; q31_t in; /* diff --git a/Source/DistanceFunctions/arm_boolean_distance_template.h b/Source/DistanceFunctions/arm_boolean_distance_template.h index c6eeb274..f54adecf 100755 --- a/Source/DistanceFunctions/arm_boolean_distance_template.h +++ b/Source/DistanceFunctions/arm_boolean_distance_template.h @@ -103,7 +103,7 @@ void FUNC(EXT)(const uint32_t *pA const uint8_t *pB8 = (const uint8_t *) pB; /* handle vector blocks */ - int32_t blkCnt = numberOfBools / 128; + uint32_t blkCnt = numberOfBools / 128; diff --git a/Source/DistanceFunctions/arm_braycurtis_distance_f32.c b/Source/DistanceFunctions/arm_braycurtis_distance_f32.c index d41836ec..154827ed 100755 --- a/Source/DistanceFunctions/arm_braycurtis_distance_f32.c +++ b/Source/DistanceFunctions/arm_braycurtis_distance_f32.c @@ -63,7 +63,7 @@ float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { float32_t accumDiff = 0.0f, accumSum = 0.0f; - int32_t blkCnt; + uint32_t blkCnt; f32x4_t a, b, c, accumDiffV, accumSumV; @@ -118,8 +118,8 @@ float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, u float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { - float32_t accumDiff=0.0f, accumSum=0.0f, tmp; - uint32_t i,blkCnt; + float32_t accumDiff=0.0f, accumSum=0.0f; + uint32_t blkCnt; float32x4_t a,b,c,accumDiffV, accumSumV; float32x2_t accumV2; diff --git a/Source/DistanceFunctions/arm_canberra_distance_f32.c b/Source/DistanceFunctions/arm_canberra_distance_f32.c index 29e7ed1a..219d2bba 100755 --- a/Source/DistanceFunctions/arm_canberra_distance_f32.c +++ b/Source/DistanceFunctions/arm_canberra_distance_f32.c @@ -57,8 +57,8 @@ float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { - float32_t accum = 0.0f; - int32_t blkCnt; + float32_t accum = 0.0f; + uint32_t blkCnt; f32x4_t a, b, c, accumV; accumV = vdupq_n_f32(0.0f); @@ -132,8 +132,8 @@ float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uin float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { float32_t accum=0.0f, tmpA, tmpB,diff,sum; - uint32_t i,blkCnt; - float32x4_t a,b,c,d,accumV; + uint32_t blkCnt; + float32x4_t a,b,c,accumV; float32x2_t accumV2; int32x4_t isZeroV; float32x4_t zeroV = vdupq_n_f32(0.0f); diff --git a/Source/DistanceFunctions/arm_chebyshev_distance_f32.c b/Source/DistanceFunctions/arm_chebyshev_distance_f32.c index cf3c2e95..349158ac 100755 --- a/Source/DistanceFunctions/arm_chebyshev_distance_f32.c +++ b/Source/DistanceFunctions/arm_chebyshev_distance_f32.c @@ -52,7 +52,7 @@ float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ f32x4_t vecA, vecB; f32x4_t vecDiff = vdupq_n_f32(0.0); float32_t maxValue = 0.0; @@ -104,7 +104,7 @@ float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, ui float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { float32_t diff=0.0f, maxVal=0.0f, tmpA, tmpB; - uint32_t i,blkCnt; + uint32_t blkCnt; float32x4_t a,b,diffV, maxValV; float32x2_t maxValV2; diff --git a/Source/DistanceFunctions/arm_cityblock_distance_f32.c b/Source/DistanceFunctions/arm_cityblock_distance_f32.c index 038647f9..88173fa8 100755 --- a/Source/DistanceFunctions/arm_cityblock_distance_f32.c +++ b/Source/DistanceFunctions/arm_cityblock_distance_f32.c @@ -50,7 +50,7 @@ float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { - int32_t blkCnt; + uint32_t blkCnt; f32x4_t a, b, accumV, tempV; accumV = vdupq_n_f32(0.0f); @@ -93,8 +93,8 @@ float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, ui float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { - float32_t diff=0.0f, accum=0.0f, tmpA, tmpB; - uint32_t i,blkCnt; + float32_t accum=0.0f, tmpA, tmpB; + uint32_t blkCnt; float32x4_t a,b,accumV, tempV; float32x2_t accumV2; diff --git a/Source/DistanceFunctions/arm_euclidean_distance_f32.c b/Source/DistanceFunctions/arm_euclidean_distance_f32.c index b85d911f..af59ffbe 100755 --- a/Source/DistanceFunctions/arm_euclidean_distance_f32.c +++ b/Source/DistanceFunctions/arm_euclidean_distance_f32.c @@ -51,7 +51,7 @@ #include "arm_vec_math.h" float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { - int32_t blkCnt; + uint32_t blkCnt; float32_t tmp; f32x4_t a, b, accumV, tempV; @@ -96,7 +96,7 @@ float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, ui float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { float32_t accum=0.0f,tmp; - uint32_t i,blkCnt; + uint32_t blkCnt; float32x4_t a,b,accumV; float32x2_t accumV2; diff --git a/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c b/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c index 696257d3..3c3a4fac 100755 --- a/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c +++ b/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c @@ -30,17 +30,19 @@ #include +/** + @addtogroup FloatDist + @{ + */ + +#if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) __STATIC_INLINE float32_t rel_entr(float32_t x, float32_t y) { return (x * logf(x / y)); } +#endif -/** - @addtogroup FloatDist - @{ - */ - #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" @@ -48,7 +50,7 @@ __STATIC_INLINE float32_t rel_entr(float32_t x, float32_t y) float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { - int32_t blkCnt; + uint32_t blkCnt; float32_t tmp; f32x4_t a, b, t, tmpV, accumV; @@ -134,7 +136,7 @@ float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) { float32_t accum, result, tmp,a,b; - uint32_t i, blkCnt; + uint32_t blkCnt; float32x4_t aV,bV,t, tmpV, accumV; float32x2_t accumV2; diff --git a/Source/DistanceFunctions/arm_minkowski_distance_f32.c b/Source/DistanceFunctions/arm_minkowski_distance_f32.c index 418a1224..bf30fe55 100755 --- a/Source/DistanceFunctions/arm_minkowski_distance_f32.c +++ b/Source/DistanceFunctions/arm_minkowski_distance_f32.c @@ -54,7 +54,7 @@ float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize) { - int32_t blkCnt; + uint32_t blkCnt; f32x4_t a, b, tmpV, accumV, sumV; sumV = vdupq_n_f32(0.0f); @@ -100,8 +100,8 @@ float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, in float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize) { - float32_t sum,diff; - uint32_t i, blkCnt; + float32_t sum; + uint32_t blkCnt; float32x4_t sumV,aV,bV, tmpV, n; float32x2_t sumV2; diff --git a/Source/FastMathFunctions/arm_vexp_f32.c b/Source/FastMathFunctions/arm_vexp_f32.c index 1a29d238..197890e3 100755 --- a/Source/FastMathFunctions/arm_vexp_f32.c +++ b/Source/FastMathFunctions/arm_vexp_f32.c @@ -94,4 +94,4 @@ void arm_vexp_f32( /* Decrement loop counter */ blkCnt--; } -} \ No newline at end of file +} diff --git a/Source/FastMathFunctions/arm_vlog_f32.c b/Source/FastMathFunctions/arm_vlog_f32.c index 6c92b846..1ad6094b 100755 --- a/Source/FastMathFunctions/arm_vlog_f32.c +++ b/Source/FastMathFunctions/arm_vlog_f32.c @@ -94,4 +94,4 @@ void arm_vlog_f32( /* Decrement loop counter */ blkCnt--; } -} \ No newline at end of file +} diff --git a/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c index 596b434b..6de89c94 100644 --- a/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c +++ b/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c @@ -65,12 +65,6 @@ void arm_biquad_cascade_df2T_f32( uint32_t sample, stageCnt,stage = S->numStages; /* loop counters */ - float32_t Xn2, Xn3, Xn4; /* Input State variables */ - float32_t acc2, acc3, acc4; /* accumulator */ - - - float32_t p0, p1, p2, p3, p4, A1; - float32x4_t XnV, YnV; float32x4x2_t dV; float32x4_t zeroV = vdupq_n_f32(0.0); diff --git a/Source/FilteringFunctions/arm_conv_f32.c b/Source/FilteringFunctions/arm_conv_f32.c index 8fa13085..0fbd0423 100644 --- a/Source/FilteringFunctions/arm_conv_f32.c +++ b/Source/FilteringFunctions/arm_conv_f32.c @@ -103,8 +103,7 @@ void arm_conv_f32( float32_t * pDst) { -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) +#if defined(ARM_MATH_DSP) const float32_t *pIn1; /* InputA pointer */ const float32_t *pIn2; /* InputB pointer */ @@ -116,9 +115,11 @@ void arm_conv_f32( uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ uint32_t j, k, count, blkCnt; /* Loop counters */ -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - float32_t acc0, acc1, acc2, acc3; /* Accumulators */ - float32_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ +#if defined (ARM_MATH_LOOPUNROLL) + float32_t acc0, acc1, acc2, acc3, c0; /* Accumulators */ +#if !defined(ARM_MATH_NEON) + float32_t x0, x1, x2, x3; /* Temporary variables to hold state and coefficient values */ +#endif #endif /* The algorithm implementation is based on the lengths of the inputs. */ @@ -259,7 +260,7 @@ void arm_conv_f32( #endif /* #if defined(ARM_MATH_NEON) */ -#else +#else /* defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ /* Initialize k with number of samples */ k = count; @@ -322,9 +323,6 @@ void arm_conv_f32( float32x4_t c; float32x4_t x1v; float32x4_t x2v; - uint32x4_t x1v_u; - uint32x4_t x2v_u; - uint32x4_t x_u; float32x4_t x; float32x4_t res = vdupq_n_f32(0) ; #endif /* #if defined(ARM_MATH_NEON) */ diff --git a/Source/FilteringFunctions/arm_conv_partial_f32.c b/Source/FilteringFunctions/arm_conv_partial_f32.c index e25f9ab3..179b6dd0 100644 --- a/Source/FilteringFunctions/arm_conv_partial_f32.c +++ b/Source/FilteringFunctions/arm_conv_partial_f32.c @@ -86,10 +86,7 @@ arm_status arm_conv_partial_f32( uint32_t firstIndex, uint32_t numPoints) { - -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - +#if defined (ARM_MATH_DSP) const float32_t *pIn1 = pSrcA; /* InputA pointer */ const float32_t *pIn2 = pSrcB; /* InputB pointer */ float32_t *pOut = pDst; /* Output pointer */ @@ -98,7 +95,7 @@ arm_status arm_conv_partial_f32( const float32_t *pSrc1, *pSrc2; /* Intermediate pointers */ float32_t sum; /* Accumulator */ uint32_t j, k, count, blkCnt, check; - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ + uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ arm_status status; /* Status of Partial convolution */ #if defined (ARM_MATH_LOOPUNROLL) @@ -667,8 +664,7 @@ arm_status arm_conv_partial_f32( /* Return to application */ return (status); -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - +#endif /* defined(ARM_MATH_DSP) */ } /** diff --git a/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/Source/FilteringFunctions/arm_conv_partial_fast_q31.c index f232d51f..9d934f65 100644 --- a/Source/FilteringFunctions/arm_conv_partial_fast_q31.c +++ b/Source/FilteringFunctions/arm_conv_partial_fast_q31.c @@ -71,7 +71,7 @@ arm_status arm_conv_partial_fast_q31( const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ q31_t sum; /* Accumulators */ uint32_t j, k, count, check, blkCnt; - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ + uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ arm_status status; /* Status of Partial convolution */ #if defined (ARM_MATH_LOOPUNROLL) diff --git a/Source/FilteringFunctions/arm_conv_partial_q15.c b/Source/FilteringFunctions/arm_conv_partial_q15.c index 55272ead..b8a965be 100644 --- a/Source/FilteringFunctions/arm_conv_partial_q15.c +++ b/Source/FilteringFunctions/arm_conv_partial_q15.c @@ -76,7 +76,7 @@ arm_status arm_conv_partial_q15( const q15_t *py; /* Intermediate inputB pointer */ const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ q31_t x0, x1, x2, x3, c0; /* Temporary input variables to hold state and coefficient values */ - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ + uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ uint32_t j, k, count, blkCnt, check; arm_status status; /* Status of Partial convolution */ diff --git a/Source/FilteringFunctions/arm_conv_partial_q31.c b/Source/FilteringFunctions/arm_conv_partial_q31.c index d0f0122d..388ef6e7 100644 --- a/Source/FilteringFunctions/arm_conv_partial_q31.c +++ b/Source/FilteringFunctions/arm_conv_partial_q31.c @@ -64,8 +64,7 @@ arm_status arm_conv_partial_q31( uint32_t numPoints) { -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) +#if defined(ARM_MATH_DSP) const q31_t *pIn1; /* InputA pointer */ const q31_t *pIn2; /* InputB pointer */ @@ -75,7 +74,7 @@ arm_status arm_conv_partial_q31( const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ q63_t sum; /* Accumulator */ uint32_t j, k, count, blkCnt, check; - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ + uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ arm_status status; /* Status of Partial convolution */ #if defined (ARM_MATH_LOOPUNROLL) diff --git a/Source/FilteringFunctions/arm_conv_partial_q7.c b/Source/FilteringFunctions/arm_conv_partial_q7.c index 9b0228cb..1123591c 100644 --- a/Source/FilteringFunctions/arm_conv_partial_q7.c +++ b/Source/FilteringFunctions/arm_conv_partial_q7.c @@ -64,8 +64,7 @@ arm_status arm_conv_partial_q7( uint32_t numPoints) { -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) +#if ARM_MATH_DSP const q7_t *pIn1; /* InputA pointer */ const q7_t *pIn2; /* InputB pointer */ @@ -75,7 +74,7 @@ arm_status arm_conv_partial_q7( const q7_t *pSrc1, *pSrc2; /* Intermediate pointers */ q31_t sum; /* Accumulator */ uint32_t j, k, count, blkCnt, check; /* Loop counters */ - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ + uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ arm_status status; /* Status of Partial convolution */ #if defined (ARM_MATH_LOOPUNROLL) diff --git a/Source/FilteringFunctions/arm_correlate_f32.c b/Source/FilteringFunctions/arm_correlate_f32.c index 908bc2fd..d57fac6d 100644 --- a/Source/FilteringFunctions/arm_correlate_f32.c +++ b/Source/FilteringFunctions/arm_correlate_f32.c @@ -101,8 +101,7 @@ void arm_correlate_f32( float32_t * pDst) { -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) +#if defined(ARM_MATH_DSP) const float32_t *pIn1; /* InputA pointer */ const float32_t *pIn2; /* InputB pointer */ @@ -116,9 +115,11 @@ void arm_correlate_f32( uint32_t outBlockSize; /* Loop counter */ int32_t inc = 1; /* Destination address modifier */ -#if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON) - float32_t acc0, acc1, acc2, acc3; /* Accumulators */ - float32_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */ +#if defined (ARM_MATH_LOOPUNROLL) + float32_t acc0, acc1, acc2, acc3,c0; /* Accumulators */ +#if !defined(ARM_MATH_NEON) + float32_t x0, x1, x2, x3; /* temporary variables for holding input and coefficient values */ +#endif #endif /* The algorithm implementation is based on the lengths of the inputs. */ @@ -343,10 +344,7 @@ void arm_correlate_f32( float32x4_t c; float32x4_t x1v; float32x4_t x2v; - uint32x4_t x1v_u; - uint32x4_t x2v_u; float32x4_t x; - uint32x4_t x_u; float32x4_t res = vdupq_n_f32(0) ; #endif /* #if defined(ARM_MATH_NEON) */ diff --git a/Source/FilteringFunctions/arm_fir_decimate_f32.c b/Source/FilteringFunctions/arm_fir_decimate_f32.c index 218ca34f..6ebbe49e 100644 --- a/Source/FilteringFunctions/arm_fir_decimate_f32.c +++ b/Source/FilteringFunctions/arm_fir_decimate_f32.c @@ -144,7 +144,6 @@ void arm_fir_decimate_f32( uint32_t blkCntN4; float32_t *px0, *px1, *px2, *px3; - float32_t acc0, acc1, acc2, acc3; float32_t x1, x2, x3; float32x4_t accv,acc0v,acc1v,acc2v,acc3v; diff --git a/Source/FilteringFunctions/arm_fir_f32.c b/Source/FilteringFunctions/arm_fir_f32.c index 0531cfeb..4be110f3 100644 --- a/Source/FilteringFunctions/arm_fir_f32.c +++ b/Source/FilteringFunctions/arm_fir_f32.c @@ -132,8 +132,7 @@ uint32_t blockSize) uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ uint32_t i, tapCnt, blkCnt; /* Loop counters */ - float32x4_t accv0,accv1,samples0,samples1,x0,x1,x2,xa,xb,x,b,accv; - uint32x4_t x0_u,x1_u,x2_u,xa_u,xb_u; + float32x4_t accv0,accv1,samples0,samples1,x0,x1,x2,xa,xb,b; float32_t acc; /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ diff --git a/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/Source/FilteringFunctions/arm_fir_interpolate_f32.c index ee0ed270..23ba08d7 100644 --- a/Source/FilteringFunctions/arm_fir_interpolate_f32.c +++ b/Source/FilteringFunctions/arm_fir_interpolate_f32.c @@ -141,18 +141,15 @@ void arm_fir_interpolate_f32( float32_t *ptr1; /* Temporary pointers for state buffer */ const float32_t *ptr2; /* Temporary pointers for coefficient buffer */ float32_t sum0; /* Accumulators */ - float32_t x0, c0; /* Temporary variables to hold state and coefficient values */ + float32_t c0; /* Temporary variables to hold state and coefficient values */ uint32_t i, blkCnt, j; /* Loop counters */ uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ - float32_t acc0, acc1, acc2, acc3; - float32_t x1, x2, x3; uint32_t blkCntN4; float32_t c1, c2, c3; float32x4_t sum0v; - float32x4_t accV,accV0,accV1; + float32x4_t accV0,accV1; float32x4_t x0v,x1v,x2v,xa,xb; - uint32x4_t x0v_u,x1v_u,x2v_u,xa_u,xb_u; float32x2_t tempV; /* S->pState buffer contains previous frame (phaseLen - 1) samples */ diff --git a/Source/MatrixFunctions/arm_mat_add_f32.c b/Source/MatrixFunctions/arm_mat_add_f32.c index 8e1246c0..945be18a 100644 --- a/Source/MatrixFunctions/arm_mat_add_f32.c +++ b/Source/MatrixFunctions/arm_mat_add_f32.c @@ -75,7 +75,6 @@ arm_status arm_mat_add_f32( float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */ uint32_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ diff --git a/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c b/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c index 8e2af317..1cd65827 100644 --- a/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c +++ b/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c @@ -75,7 +75,6 @@ arm_status arm_mat_cmplx_mult_f32( uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ float32_t sumReal1, sumImag1; /* accumulator */ - float32_t a0, b0, c0, d0; float32_t a1, a1B,b1, b1B, c1, d1; float32_t sumReal2, sumImag2; /* accumulator */ diff --git a/Source/MatrixFunctions/arm_mat_mult_f32.c b/Source/MatrixFunctions/arm_mat_mult_f32.c index ffddf999..7f567e51 100644 --- a/Source/MatrixFunctions/arm_mat_mult_f32.c +++ b/Source/MatrixFunctions/arm_mat_mult_f32.c @@ -82,7 +82,6 @@ arm_status arm_mat_mult_f32( uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - float32_t in1, in2, in3, in4; uint16_t col, i = 0U, j, row = numRowsA, rowCnt, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ diff --git a/Source/MatrixFunctions/arm_mat_mult_q15.c b/Source/MatrixFunctions/arm_mat_mult_q15.c index 1d2b69c3..9a5041e5 100644 --- a/Source/MatrixFunctions/arm_mat_mult_q15.c +++ b/Source/MatrixFunctions/arm_mat_mult_q15.c @@ -266,6 +266,7 @@ arm_status arm_mat_mult_q15( uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ arm_status status; /* Status of matrix multiplication */ + (void)pState; #ifdef ARM_MATH_MATRIX_CHECK diff --git a/Source/MatrixFunctions/arm_mat_sub_f32.c b/Source/MatrixFunctions/arm_mat_sub_f32.c index cb576477..62176ce3 100644 --- a/Source/MatrixFunctions/arm_mat_sub_f32.c +++ b/Source/MatrixFunctions/arm_mat_sub_f32.c @@ -69,9 +69,6 @@ arm_status arm_mat_sub_f32( float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */ - - uint32_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix subtraction */ diff --git a/Source/SVMFunctions/arm_svm_linear_predict_f32.c b/Source/SVMFunctions/arm_svm_linear_predict_f32.c index 74c7a51c..d9c9ffd6 100755 --- a/Source/SVMFunctions/arm_svm_linear_predict_f32.c +++ b/Source/SVMFunctions/arm_svm_linear_predict_f32.c @@ -59,8 +59,8 @@ void arm_svm_linear_predict_f32( const float32_t *pSrcA = pSupport; const float32_t *pInA0; const float32_t *pInA1; - int32_t row; - int32_t blkCnt; /* loop counters */ + uint32_t row; + uint32_t blkCnt; /* loop counters */ const float32_t *pDualCoef = S->dualCoefficients; float32_t sum = S->intercept; row = numRows; @@ -431,12 +431,13 @@ void arm_svm_linear_predict_f32( { float32_t sum=S->intercept; float32_t dot=0; + uint32_t i,j; const float32_t *pSupport = S->supportVectors; - for(int i=0; i < S->nbOfSupportVectors; i++) + for(i=0; i < S->nbOfSupportVectors; i++) { dot=0; - for(int j=0; j < S->vectorDimension; j++) + for(j=0; j < S->vectorDimension; j++) { dot = dot + in[j]* *pSupport++; } diff --git a/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c b/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c index 245aeddc..703ab243 100755 --- a/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c +++ b/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c @@ -64,8 +64,8 @@ void arm_svm_polynomial_predict_f32( const float32_t *pSrcA = pSupport; const float32_t *pInA0; const float32_t *pInA1; - int32_t row; - int32_t blkCnt; /* loop counters */ + uint32_t row; + uint32_t blkCnt; /* loop counters */ const float32_t *pDualCoef = S->dualCoefficients; float32_t sum = S->intercept; f32x4_t vSum = vdupq_n_f32(0.0f); @@ -464,12 +464,13 @@ void arm_svm_polynomial_predict_f32( { float32_t sum=S->intercept; float32_t dot=0; + uint32_t i,j; const float32_t *pSupport = S->supportVectors; - for(int i=0; i < S->nbOfSupportVectors; i++) + for(i=0; i < S->nbOfSupportVectors; i++) { dot=0; - for(int j=0; j < S->vectorDimension; j++) + for(j=0; j < S->vectorDimension; j++) { dot = dot + in[j]* *pSupport++; } diff --git a/Source/SVMFunctions/arm_svm_rbf_predict_f32.c b/Source/SVMFunctions/arm_svm_rbf_predict_f32.c index 66017e2b..a4fa0318 100755 --- a/Source/SVMFunctions/arm_svm_rbf_predict_f32.c +++ b/Source/SVMFunctions/arm_svm_rbf_predict_f32.c @@ -61,8 +61,8 @@ void arm_svm_rbf_predict_f32( const float32_t *pSrcA = pSupport; const float32_t *pInA0; const float32_t *pInA1; - int32_t row; - int32_t blkCnt; /* loop counters */ + uint32_t row; + uint32_t blkCnt; /* loop counters */ const float32_t *pDualCoef = S->dualCoefficients; float32_t sum = S->intercept; f32x4_t vSum = vdupq_n_f32(0); @@ -496,12 +496,13 @@ void arm_svm_rbf_predict_f32( { float32_t sum=S->intercept; float32_t dot=0; + uint32_t i,j; const float32_t *pSupport = S->supportVectors; - for(int i=0; i < S->nbOfSupportVectors; i++) + for(i=0; i < S->nbOfSupportVectors; i++) { dot=0; - for(int j=0; j < S->vectorDimension; j++) + for(j=0; j < S->vectorDimension; j++) { dot = dot + SQ(in[j] - *pSupport); pSupport++; diff --git a/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c b/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c index bd85275e..9be478a0 100755 --- a/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c +++ b/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c @@ -61,8 +61,8 @@ void arm_svm_sigmoid_predict_f32( const float32_t *pSrcA = pSupport; const float32_t *pInA0; const float32_t *pInA1; - int32_t row; - int32_t blkCnt; /* loop counters */ + uint32_t row; + uint32_t blkCnt; /* loop counters */ const float32_t *pDualCoef = S->dualCoefficients; float32_t sum = S->intercept; f32x4_t vSum = vdupq_n_f32(0.0f); @@ -462,12 +462,13 @@ void arm_svm_sigmoid_predict_f32( { float32_t sum=S->intercept; float32_t dot=0; + uint32_t i,j; const float32_t *pSupport = S->supportVectors; - for(int i=0; i < S->nbOfSupportVectors; i++) + for(i=0; i < S->nbOfSupportVectors; i++) { dot=0; - for(int j=0; j < S->vectorDimension; j++) + for(j=0; j < S->vectorDimension; j++) { dot = dot + in[j]* *pSupport++; } diff --git a/Source/StatisticsFunctions/arm_entropy_f32.c b/Source/StatisticsFunctions/arm_entropy_f32.c index 8fb513c9..9b0b02e9 100755 --- a/Source/StatisticsFunctions/arm_entropy_f32.c +++ b/Source/StatisticsFunctions/arm_entropy_f32.c @@ -51,7 +51,7 @@ float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize) { - int32_t blkCnt; + uint32_t blkCnt; float32_t accum=0.0f,p; diff --git a/Source/StatisticsFunctions/arm_logsumexp_f32.c b/Source/StatisticsFunctions/arm_logsumexp_f32.c index 23dae6b2..2170ad99 100755 --- a/Source/StatisticsFunctions/arm_logsumexp_f32.c +++ b/Source/StatisticsFunctions/arm_logsumexp_f32.c @@ -125,7 +125,6 @@ float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize) float32_t maxVal; float32_t tmp; float32x4_t tmpV, tmpVb; - float32x2_t tmpV2; float32x4_t maxValV; uint32x4_t idxV; float32x4_t accumV; diff --git a/Source/StatisticsFunctions/arm_max_f32.c b/Source/StatisticsFunctions/arm_max_f32.c index bb791e4e..18520cdf 100644 --- a/Source/StatisticsFunctions/arm_max_f32.c +++ b/Source/StatisticsFunctions/arm_max_f32.c @@ -149,7 +149,7 @@ void arm_max_f32( float32_t * pResult, uint32_t * pIndex) { - float32_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */ + float32_t maxVal1, out; /* Temporary variables to store the output value. */ uint32_t blkCnt, outIndex, count; /* loop counter */ float32x4_t outV, srcV; diff --git a/Source/StatisticsFunctions/arm_max_q15.c b/Source/StatisticsFunctions/arm_max_q15.c index b09811b8..569e1143 100644 --- a/Source/StatisticsFunctions/arm_max_q15.c +++ b/Source/StatisticsFunctions/arm_max_q15.c @@ -55,7 +55,7 @@ void arm_max_q15( q15_t * pResult, uint32_t * pIndex) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q15x8_t vecSrc; q15x8_t curExtremValVec = vdupq_n_s16(Q15_MIN); q15_t maxValue = Q15_MIN, temp; diff --git a/Source/StatisticsFunctions/arm_max_q31.c b/Source/StatisticsFunctions/arm_max_q31.c index bb5ce933..8d26d061 100644 --- a/Source/StatisticsFunctions/arm_max_q31.c +++ b/Source/StatisticsFunctions/arm_max_q31.c @@ -55,7 +55,7 @@ void arm_max_q31( q31_t * pResult, uint32_t * pIndex) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q31x4_t vecSrc; q31x4_t curExtremValVec = vdupq_n_s32( Q31_MIN); q31_t maxValue = Q31_MIN; diff --git a/Source/StatisticsFunctions/arm_max_q7.c b/Source/StatisticsFunctions/arm_max_q7.c index 0e7309ef..6dc72ff2 100644 --- a/Source/StatisticsFunctions/arm_max_q7.c +++ b/Source/StatisticsFunctions/arm_max_q7.c @@ -55,9 +55,9 @@ static void arm_small_blk_max_q7( q7_t * pResult, uint32_t * pIndex) { - int32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7x16_t curExtremValVec = vdupq_n_s8( Q7_MIN); + uint32_t blkCnt; /* loop counters */ + q7x16_t vecSrc; + q7x16_t curExtremValVec = vdupq_n_s8( Q7_MIN); q7_t maxValue = Q7_MIN, temp; uint32_t idx = blockSize; uint8x16_t indexVec; diff --git a/Source/StatisticsFunctions/arm_mean_f32.c b/Source/StatisticsFunctions/arm_mean_f32.c index 6a8d5c9d..909e392a 100644 --- a/Source/StatisticsFunctions/arm_mean_f32.c +++ b/Source/StatisticsFunctions/arm_mean_f32.c @@ -66,7 +66,7 @@ void arm_mean_f32( uint32_t blockSize, float32_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ f32x4_t vecSrc; f32x4_t sumVec = vdupq_n_f32(0.0f); float32_t sum = 0.0f; diff --git a/Source/StatisticsFunctions/arm_mean_q15.c b/Source/StatisticsFunctions/arm_mean_q15.c index 61ad8354..69208696 100644 --- a/Source/StatisticsFunctions/arm_mean_q15.c +++ b/Source/StatisticsFunctions/arm_mean_q15.c @@ -59,7 +59,7 @@ void arm_mean_q15( uint32_t blockSize, q15_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q15x8_t vecSrc; q31_t sum = 0L; diff --git a/Source/StatisticsFunctions/arm_mean_q31.c b/Source/StatisticsFunctions/arm_mean_q31.c index ff1abd0b..2694ef5c 100644 --- a/Source/StatisticsFunctions/arm_mean_q31.c +++ b/Source/StatisticsFunctions/arm_mean_q31.c @@ -58,7 +58,7 @@ void arm_mean_q31( uint32_t blockSize, q31_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q31x4_t vecSrc; q63_t sum = 0LL; diff --git a/Source/StatisticsFunctions/arm_mean_q7.c b/Source/StatisticsFunctions/arm_mean_q7.c index 73ed0a23..26879eb9 100644 --- a/Source/StatisticsFunctions/arm_mean_q7.c +++ b/Source/StatisticsFunctions/arm_mean_q7.c @@ -60,7 +60,7 @@ void arm_mean_q7( uint32_t blockSize, q7_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q7x16_t vecSrc; q31_t sum = 0L; diff --git a/Source/StatisticsFunctions/arm_min_f32.c b/Source/StatisticsFunctions/arm_min_f32.c index edabf849..8b789d2d 100644 --- a/Source/StatisticsFunctions/arm_min_f32.c +++ b/Source/StatisticsFunctions/arm_min_f32.c @@ -67,7 +67,7 @@ void arm_min_f32( float32_t * pResult, uint32_t * pIndex) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ f32x4_t vecSrc; float32_t const *pSrcVec; f32x4_t curExtremValVec = vdupq_n_f32(F32_MAX); @@ -151,7 +151,7 @@ void arm_min_f32( float32_t * pResult, uint32_t * pIndex) { - float32_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */ + float32_t maxVal1, out; /* Temporary variables to store the output value. */ uint32_t blkCnt, outIndex, count; /* loop counter */ float32x4_t outV, srcV; diff --git a/Source/StatisticsFunctions/arm_min_q15.c b/Source/StatisticsFunctions/arm_min_q15.c index 3537bea7..ddbecc50 100644 --- a/Source/StatisticsFunctions/arm_min_q15.c +++ b/Source/StatisticsFunctions/arm_min_q15.c @@ -56,7 +56,7 @@ void arm_min_q15( q15_t * pResult, uint32_t * pIndex) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q15x8_t vecSrc; q15x8_t curExtremValVec = vdupq_n_s16(Q15_MAX); q15_t minValue = Q15_MAX,temp; diff --git a/Source/StatisticsFunctions/arm_min_q31.c b/Source/StatisticsFunctions/arm_min_q31.c index d8c1e48f..3fff8287 100644 --- a/Source/StatisticsFunctions/arm_min_q31.c +++ b/Source/StatisticsFunctions/arm_min_q31.c @@ -56,7 +56,7 @@ void arm_min_q31( q31_t * pResult, uint32_t * pIndex) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q31x4_t vecSrc; q31x4_t curExtremValVec = vdupq_n_s32(Q31_MAX); q31_t minValue = Q31_MAX, temp; diff --git a/Source/StatisticsFunctions/arm_min_q7.c b/Source/StatisticsFunctions/arm_min_q7.c index c09225bf..253f3eca 100644 --- a/Source/StatisticsFunctions/arm_min_q7.c +++ b/Source/StatisticsFunctions/arm_min_q7.c @@ -56,7 +56,7 @@ static void arm_small_blk_min_q7( q7_t * pResult, uint32_t * pIndex) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q7x16_t vecSrc; q7x16_t curExtremValVec = vdupq_n_s8(Q7_MAX); q7_t minValue = Q7_MAX,temp; diff --git a/Source/StatisticsFunctions/arm_power_f32.c b/Source/StatisticsFunctions/arm_power_f32.c index 1f17ecc8..3acbf2be 100644 --- a/Source/StatisticsFunctions/arm_power_f32.c +++ b/Source/StatisticsFunctions/arm_power_f32.c @@ -66,7 +66,7 @@ void arm_power_f32( uint32_t blockSize, float32_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ f32x4_t vecSrc; f32x4_t sumVec = vdupq_n_f32(0.0f); float32_t sum = 0.0f; diff --git a/Source/StatisticsFunctions/arm_power_q15.c b/Source/StatisticsFunctions/arm_power_q15.c index 5d155354..c7f99411 100644 --- a/Source/StatisticsFunctions/arm_power_q15.c +++ b/Source/StatisticsFunctions/arm_power_q15.c @@ -60,7 +60,7 @@ void arm_power_q15( uint32_t blockSize, q63_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q15x8_t vecSrc; q63_t sum = 0LL; q15_t in; diff --git a/Source/StatisticsFunctions/arm_power_q31.c b/Source/StatisticsFunctions/arm_power_q31.c index 3a451bc7..4de4c9ec 100644 --- a/Source/StatisticsFunctions/arm_power_q31.c +++ b/Source/StatisticsFunctions/arm_power_q31.c @@ -60,7 +60,7 @@ void arm_power_q31( uint32_t blockSize, q63_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q31x4_t vecSrc; q63_t sum = 0LL; q31_t in; diff --git a/Source/StatisticsFunctions/arm_power_q7.c b/Source/StatisticsFunctions/arm_power_q7.c index fafe8367..0e1b9da1 100644 --- a/Source/StatisticsFunctions/arm_power_q7.c +++ b/Source/StatisticsFunctions/arm_power_q7.c @@ -59,7 +59,7 @@ void arm_power_q7( uint32_t blockSize, q31_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q7x16_t vecSrc; q31_t sum = 0LL; q7_t in; diff --git a/Source/StatisticsFunctions/arm_var_f32.c b/Source/StatisticsFunctions/arm_var_f32.c index 22cc2bab..669752b5 100644 --- a/Source/StatisticsFunctions/arm_var_f32.c +++ b/Source/StatisticsFunctions/arm_var_f32.c @@ -68,7 +68,7 @@ void arm_var_f32( uint32_t blockSize, float32_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ f32x4_t vecSrc; f32x4_t sumVec = vdupq_n_f32(0.0f); float32_t fMean; diff --git a/Source/StatisticsFunctions/arm_var_q15.c b/Source/StatisticsFunctions/arm_var_q15.c index fcfaf3de..c9ddfd18 100644 --- a/Source/StatisticsFunctions/arm_var_q15.c +++ b/Source/StatisticsFunctions/arm_var_q15.c @@ -60,7 +60,7 @@ void arm_var_q15( uint32_t blockSize, q15_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q15x8_t vecSrc; q63_t sumOfSquares = 0LL; q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ diff --git a/Source/StatisticsFunctions/arm_var_q31.c b/Source/StatisticsFunctions/arm_var_q31.c index 1d0f1e93..27ff2112 100644 --- a/Source/StatisticsFunctions/arm_var_q31.c +++ b/Source/StatisticsFunctions/arm_var_q31.c @@ -63,7 +63,7 @@ void arm_var_q31( uint32_t blockSize, q31_t * pResult) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q31x4_t vecSrc; q63_t sumOfSquares = 0LL; q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ diff --git a/Source/SupportFunctions/arm_float_to_q15.c b/Source/SupportFunctions/arm_float_to_q15.c index 288d13ce..046c1e20 100644 --- a/Source/SupportFunctions/arm_float_to_q15.c +++ b/Source/SupportFunctions/arm_float_to_q15.c @@ -65,7 +65,7 @@ void arm_float_to_q15( q15_t * pDst, uint32_t blockSize) { - int32_t blkCnt; + uint32_t blkCnt; float32_t maxQ = (float32_t) Q15_MAX; f32x4x2_t tmp; q15x8_t vecDst; diff --git a/Source/SupportFunctions/arm_float_to_q31.c b/Source/SupportFunctions/arm_float_to_q31.c index d9557892..8acd0b43 100644 --- a/Source/SupportFunctions/arm_float_to_q31.c +++ b/Source/SupportFunctions/arm_float_to_q31.c @@ -69,7 +69,7 @@ void arm_float_to_q31( q31_t * pDst, uint32_t blockSize) { - int32_t blkCnt; + uint32_t blkCnt; float32_t maxQ = (float32_t) Q31_MAX; f32x4_t vecDst; @@ -130,9 +130,9 @@ void arm_float_to_q31( const float32_t *pIn = pSrc; /* Src pointer */ uint32_t blkCnt; /* loop counter */ - float32_t in; float32x4_t inV; #ifdef ARM_MATH_ROUNDING + float32_t in; float32x4_t zeroV = vdupq_n_f32(0.0f); float32x4_t pHalf = vdupq_n_f32(0.5f / 2147483648.0f); float32x4_t mHalf = vdupq_n_f32(-0.5f / 2147483648.0f); diff --git a/Source/SupportFunctions/arm_float_to_q7.c b/Source/SupportFunctions/arm_float_to_q7.c index 8f5e5d3f..3833e8b6 100644 --- a/Source/SupportFunctions/arm_float_to_q7.c +++ b/Source/SupportFunctions/arm_float_to_q7.c @@ -64,7 +64,7 @@ void arm_float_to_q7( q7_t * pDst, uint32_t blockSize) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ float32_t maxQ = powf(2.0, 7); f32x4x4_t tmp; q15x8_t evVec, oddVec; @@ -142,9 +142,9 @@ void arm_float_to_q7( const float32_t *pIn = pSrc; /* Src pointer */ uint32_t blkCnt; /* loop counter */ - float32_t in; float32x4_t inV; #ifdef ARM_MATH_ROUNDING + float32_t in; float32x4_t zeroV = vdupq_n_f32(0.0f); float32x4_t pHalf = vdupq_n_f32(0.5f / 128.0f); float32x4_t mHalf = vdupq_n_f32(-0.5f / 128.0f); @@ -152,7 +152,6 @@ void arm_float_to_q7( uint32x4_t cmp; #endif - int32x4_t cvt; int16x4_t cvt1,cvt2; int8x8_t outV; diff --git a/Source/SupportFunctions/arm_q15_to_q7.c b/Source/SupportFunctions/arm_q15_to_q7.c index 52fe7f23..023410af 100644 --- a/Source/SupportFunctions/arm_q15_to_q7.c +++ b/Source/SupportFunctions/arm_q15_to_q7.c @@ -57,7 +57,7 @@ void arm_q15_to_q7( uint32_t blockSize) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q15x8x2_t tmp; q15_t const *pSrcVec; q7x16_t vecDst; diff --git a/Source/SupportFunctions/arm_q31_to_float.c b/Source/SupportFunctions/arm_q31_to_float.c index cda9897b..0598b3bb 100644 --- a/Source/SupportFunctions/arm_q31_to_float.c +++ b/Source/SupportFunctions/arm_q31_to_float.c @@ -60,7 +60,7 @@ void arm_q31_to_float( float32_t * pDst, uint32_t blockSize) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q31x4_t vecDst; q31_t const *pSrcVec; diff --git a/Source/SupportFunctions/arm_q31_to_q15.c b/Source/SupportFunctions/arm_q31_to_q15.c index 501ae628..b3eeaca9 100644 --- a/Source/SupportFunctions/arm_q31_to_q15.c +++ b/Source/SupportFunctions/arm_q31_to_q15.c @@ -56,7 +56,7 @@ void arm_q31_to_q15( q15_t * pDst, uint32_t blockSize) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q31x4x2_t tmp; q15x8_t vecDst; q31_t const *pSrcVec; diff --git a/Source/SupportFunctions/arm_q31_to_q7.c b/Source/SupportFunctions/arm_q31_to_q7.c index d1702c0a..870163e8 100644 --- a/Source/SupportFunctions/arm_q31_to_q7.c +++ b/Source/SupportFunctions/arm_q31_to_q7.c @@ -56,7 +56,7 @@ void arm_q31_to_q7( q7_t * pDst, uint32_t blockSize) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q31x4x4_t tmp; q15x8_t evVec, oddVec; q7x16_t vecDst; diff --git a/Source/SupportFunctions/arm_q7_to_float.c b/Source/SupportFunctions/arm_q7_to_float.c index 914bfb5b..8c844aa6 100644 --- a/Source/SupportFunctions/arm_q7_to_float.c +++ b/Source/SupportFunctions/arm_q7_to_float.c @@ -60,7 +60,7 @@ void arm_q7_to_float( float32_t * pDst, uint32_t blockSize) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q7x16_t vecDst; q7_t const *pSrcVec; diff --git a/Source/SupportFunctions/arm_q7_to_q15.c b/Source/SupportFunctions/arm_q7_to_q15.c index da4bcdd1..71f392c2 100644 --- a/Source/SupportFunctions/arm_q7_to_q15.c +++ b/Source/SupportFunctions/arm_q7_to_q15.c @@ -58,7 +58,7 @@ void arm_q7_to_q15( uint32_t blockSize) { - int32_t blkCnt; /* loop counters */ + uint32_t blkCnt; /* loop counters */ q15x8_t vecDst; q7_t const *pSrcVec; diff --git a/Testing/FrameworkSource/Timing.cpp b/Testing/FrameworkSource/Timing.cpp index a2fbc437..7d770a27 100644 --- a/Testing/FrameworkSource/Timing.cpp +++ b/Testing/FrameworkSource/Timing.cpp @@ -149,7 +149,7 @@ Testing::cycles_t getCycles() #ifdef CORTEXA unsigned int value; // Read CCNT Register - asm volatile ("MRC p15, 0, %0, c9, c13, 0\t\n":"=r" (value)); + __get_CP(15, 0, value, 9, 13, 0); return(value - startCycles); #endif diff --git a/Testing/Source/Tests/FastMathF32.cpp b/Testing/Source/Tests/FastMathF32.cpp index a1d717d6..0eab4a66 100755 --- a/Testing/Source/Tests/FastMathF32.cpp +++ b/Testing/Source/Tests/FastMathF32.cpp @@ -61,12 +61,14 @@ a double precision computation. for(i=0; i < ref.nbSamples(); i++) { status=arm_sqrt_f32(inp[i],&outp[i]); + ASSERT_TRUE((status == ARM_MATH_SUCCESS) || ((inp[i] < 0.0f) && (status == ARM_MATH_ARGUMENT_ERROR))); } ASSERT_SNR(ref,output,(float32_t)SNR_THRESHOLD); ASSERT_CLOSE_ERROR(ref,output,ABS_ERROR,REL_ERROR); + } void FastMathF32::test_vlog_f32() diff --git a/Testing/Source/Tests/FastMathQ15.cpp b/Testing/Source/Tests/FastMathQ15.cpp index acbc4d30..270dfd00 100755 --- a/Testing/Source/Tests/FastMathQ15.cpp +++ b/Testing/Source/Tests/FastMathQ15.cpp @@ -59,6 +59,7 @@ a double precision computation. for(i=0; i < ref.nbSamples(); i++) { status=arm_sqrt_q15(inp[i],&outp[i]); + ASSERT_TRUE((status == ARM_MATH_SUCCESS) || ((inp[i] <= 0) && (status == ARM_MATH_ARGUMENT_ERROR))); } ASSERT_SNR(ref,output,(float32_t)SNR_THRESHOLD); diff --git a/Testing/Source/Tests/FastMathQ31.cpp b/Testing/Source/Tests/FastMathQ31.cpp index 7cba34e1..a9c160b3 100755 --- a/Testing/Source/Tests/FastMathQ31.cpp +++ b/Testing/Source/Tests/FastMathQ31.cpp @@ -59,6 +59,7 @@ a double precision computation. for(i=0; i < ref.nbSamples(); i++) { status=arm_sqrt_q31(inp[i],&outp[i]); + ASSERT_TRUE((status == ARM_MATH_SUCCESS) || ((inp[i] <= 0) && (status == ARM_MATH_ARGUMENT_ERROR))); } ASSERT_SNR(ref,output,(float32_t)SNR_THRESHOLD); diff --git a/Toolchain/AC5.cmake b/Toolchain/AC5.cmake index af7211bf..e96d657a 100755 --- a/Toolchain/AC5.cmake +++ b/Toolchain/AC5.cmake @@ -36,6 +36,10 @@ function(compilerSpecificCompileOptions PROJECTNAME ROOT) target_compile_options(${PROJECTNAME} PUBLIC "--fpu=FPv5_D16") target_compile_options(${PROJECTNAME} PUBLIC "--thumb") endif() + + if (ARM_CPU STREQUAL "Cortex-A5.neon" ) + target_compile_options(${PROJECTNAME} PUBLIC "--fp16_format=ieee") + endif() if(EXPERIMENTAL)