From 302ada6633ce6c9e075e9cb7e453b03118aad326 Mon Sep 17 00:00:00 2001 From: Christophe Favergeon Date: Wed, 17 Jul 2019 11:49:00 +0200 Subject: [PATCH] CMSIS-DSP: Added SVM Functions and tests Added more tests for BasicMathFunctions Added script to postprocess result of benchmarks. --- ComputeLibrary/Include/NEMath.h | 414 + ComputeLibrary/LICENSE.txt | 21 + ComputeLibrary/README.md | 19 + ComputeLibrary/Source/arm_cl_tables.c | 55 + Include/arm_math.h | 272 + Platforms/FVP/ARMCM0/Include/ARMCM0.h | 126 + Platforms/FVP/ARMCM0/Include/system_ARMCM0.h | 55 + Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct | 75 + .../FVP/ARMCM0/LinkScripts/AC6/mem_ARMCM0.h | 38 + .../FVP/ARMCM0/Startup/AC6/startup_ARMCM0.s | 164 + Platforms/FVP/ARMCM0/system_ARMCM0.c | 56 + Source/CMakeLists.txt | 6 + Source/SVMFunctions/CMakeLists.txt | 22 + Source/SVMFunctions/arm_svm_linear_init_f32.c | 81 + .../SVMFunctions/arm_svm_linear_predict_f32.c | 221 + .../arm_svm_polynomial_init_f32.c | 82 + .../arm_svm_polynomial_predict_f32.c | 230 + Source/SVMFunctions/arm_svm_rbf_init_f32.c | 74 + Source/SVMFunctions/arm_svm_rbf_predict_f32.c | 246 + .../SVMFunctions/arm_svm_sigmoid_init_f32.c | 76 + .../arm_svm_sigmoid_predict_f32.c | 229 + Source/configDsp.cmake | 4 + Testing/.gitignore | 1 + Testing/CMakeLists.txt | 3 + Testing/FrameworkSource/Timing.cpp | 18 +- .../BasicMathsF32/fullBenchmark.csv | 82 +- .../BasicMaths/BasicMathsF32/regression.csv | 18 +- .../BasicMathsQ15/fullBenchmark.csv | 41 + .../BasicMaths/BasicMathsQ15/regression.csv | 9 + .../BasicMathsQ31/fullBenchmark.csv | 82 +- .../BasicMaths/BasicMathsQ31/regression.csv | 18 +- .../BasicMaths/BasicMathsQ7/fullBenchmark.csv | 41 + .../BasicMaths/BasicMathsQ7/regression.csv | 9 + .../NN/FullyConnected/fullBenchmark.csv | 10 +- .../BasicMathsBenchmarksQ15_decl.h | 25 + .../BasicMathsBenchmarksQ7_decl.h | 25 + .../FullyConnectedBench_decl.h | 8 +- .../GeneratedInclude/FullyConnected_decl.h | 144 +- Testing/GeneratedInclude/Patterns.h | 10620 +++++++++++++++- Testing/GeneratedInclude/SVMF32_decl.h | 36 + Testing/GeneratedInclude/TestDesc.h | 120 +- Testing/GeneratedInclude/TestDrive.h | 590 +- Testing/GeneratedSource/TestDesc.cpp | 104 + Testing/Include/BasicMathsBenchmarksQ15.h | 17 + Testing/Include/BasicMathsBenchmarksQ7.h | 17 + Testing/Include/SVMF32.h | 38 + .../DSP/BasicMaths/BasicMathsF32/Output_1.txt | 6 +- .../BasicMaths/BasicMathsF32/Output_10.txt | 6 +- .../BasicMaths/BasicMathsF32/Output_11.txt | 16 +- .../BasicMaths/BasicMathsF32/Output_12.txt | 18 +- .../BasicMaths/BasicMathsF32/Output_13.txt | 6 +- .../BasicMaths/BasicMathsF32/Output_14.txt | 16 +- .../BasicMaths/BasicMathsF32/Output_15.txt | 18 +- .../BasicMaths/BasicMathsF32/Output_16.txt | 6 +- .../BasicMaths/BasicMathsF32/Output_17.txt | 16 +- .../BasicMaths/BasicMathsF32/Output_18.txt | 18 +- .../DSP/BasicMaths/BasicMathsF32/Output_2.txt | 16 +- .../BasicMaths/BasicMathsF32/Output_22.txt | 6 +- .../BasicMaths/BasicMathsF32/Output_23.txt | 16 +- .../BasicMaths/BasicMathsF32/Output_24.txt | 18 +- .../DSP/BasicMaths/BasicMathsF32/Output_3.txt | 18 +- .../DSP/BasicMaths/BasicMathsF32/Output_4.txt | 6 +- .../DSP/BasicMaths/BasicMathsF32/Output_5.txt | 16 +- .../DSP/BasicMaths/BasicMathsF32/Output_6.txt | 18 +- .../DSP/BasicMaths/BasicMathsF32/Output_7.txt | 6 +- .../DSP/BasicMaths/BasicMathsF32/Output_8.txt | 16 +- .../DSP/BasicMaths/BasicMathsF32/Output_9.txt | 18 +- Testing/Output/DSP/SVM/SVMF32/Output_1.txt | 100 + Testing/Output/DSP/SVM/SVMF32/Output_2.txt | 100 + Testing/Output/DSP/SVM/SVMF32/Output_3.txt | 100 + Testing/Output/DSP/SVM/SVMF32/Output_4.txt | 100 + Testing/Output/DSP/SVM/SVMF32/Output_5.txt | 100 + .../{Output1_1.txt => Output_1.txt} | 0 .../{Output7_8.txt => Output_10.txt} | 0 .../{Output10_11.txt => Output_11.txt} | 0 .../{Output11_12.txt => Output_12.txt} | 0 .../{Output12_13.txt => Output_13.txt} | 0 .../{Output13_14.txt => Output_14.txt} | 0 .../{Output14_15.txt => Output_15.txt} | 0 .../{Output19_2.txt => Output_2.txt} | 0 .../{Output2_3.txt => Output_3.txt} | 0 .../{Output3_4.txt => Output_4.txt} | 0 .../{Output4_5.txt => Output_5.txt} | 0 .../{Output5_6.txt => Output_6.txt} | 0 .../{Output6_7.txt => Output_7.txt} | 0 .../{Output9_10.txt => Output_8.txt} | 0 .../{Output8_9.txt => Output_9.txt} | 0 Testing/PatternGeneration/BasicMaths.py | 264 +- Testing/PatternGeneration/SVM.py | 150 + Testing/PatternGeneration/Tools.py | 356 + .../BasicMaths/BasicMathsF32/Input1_f32.txt | 1020 +- .../BasicMaths/BasicMathsF32/Input2_f32.txt | 1024 +- .../BasicMathsF32/Reference10_f32.txt | 1020 +- .../BasicMathsF32/Reference1_f32.txt | 1024 +- .../BasicMathsF32/Reference2_f32.txt | 1024 +- .../BasicMathsF32/Reference3_f32.txt | 1020 +- .../BasicMathsF32/Reference4_f32.txt | 1020 +- .../BasicMathsF32/Reference5_f32.txt | 1020 +- .../BasicMathsF32/Reference6_f32.txt | 1020 +- .../BasicMathsF32/Reference7_f32.txt | 4 +- .../BasicMathsF32/Reference8_f32.txt | 4 +- .../BasicMathsF32/Reference9_f32.txt | 4 +- .../BasicMaths/BasicMathsQ15/Input1_q15.txt | 1022 +- .../BasicMaths/BasicMathsQ15/Input2_q15.txt | 1024 +- .../BasicMathsQ15/Reference10_q15.txt | 1022 +- .../BasicMathsQ15/Reference1_q15.txt | 1024 +- .../BasicMathsQ15/Reference2_q15.txt | 1022 +- .../BasicMathsQ15/Reference3_q15.txt | 1022 +- .../BasicMathsQ15/Reference4_q15.txt | 1020 +- .../BasicMathsQ15/Reference5_q15.txt | 1022 +- .../BasicMathsQ15/Reference6_q15.txt | 1020 +- .../BasicMathsQ15/Reference7_q15.txt | 4 +- .../BasicMathsQ15/Reference8_q15.txt | 4 +- .../BasicMathsQ15/Reference9_q15.txt | 4 +- .../BasicMaths/BasicMathsQ31/Input1_q31.txt | 1022 +- .../BasicMaths/BasicMathsQ31/Input2_q31.txt | 1024 +- .../BasicMathsQ31/Reference10_q31.txt | 1022 +- .../BasicMathsQ31/Reference1_q31.txt | 1012 +- .../BasicMathsQ31/Reference2_q31.txt | 1024 +- .../BasicMathsQ31/Reference3_q31.txt | 1018 +- .../BasicMathsQ31/Reference4_q31.txt | 1020 +- .../BasicMathsQ31/Reference5_q31.txt | 1022 +- .../BasicMathsQ31/Reference6_q31.txt | 1020 +- .../BasicMathsQ31/Reference7_q31.txt | 4 +- .../BasicMathsQ31/Reference8_q31.txt | 4 +- .../BasicMathsQ31/Reference9_q31.txt | 4 +- .../DSP/BasicMaths/BasicMathsQ7/Input1_q7.txt | 994 +- .../DSP/BasicMaths/BasicMathsQ7/Input2_q7.txt | 990 +- .../BasicMathsQ7/Reference10_q7.txt | 962 +- .../BasicMaths/BasicMathsQ7/Reference1_q7.txt | 996 +- .../BasicMaths/BasicMathsQ7/Reference2_q7.txt | 996 +- .../BasicMaths/BasicMathsQ7/Reference3_q7.txt | 1004 +- .../BasicMaths/BasicMathsQ7/Reference4_q7.txt | 996 +- .../BasicMaths/BasicMathsQ7/Reference5_q7.txt | 984 +- .../BasicMaths/BasicMathsQ7/Reference6_q7.txt | 994 +- .../BasicMaths/BasicMathsQ7/Reference7_q7.txt | 4 +- .../BasicMaths/BasicMathsQ7/Reference8_q7.txt | 4 +- .../BasicMaths/BasicMathsQ7/Reference9_q7.txt | 4 +- Testing/Patterns/DSP/SVM/SVMF32/Dims1_s16.txt | 14 + Testing/Patterns/DSP/SVM/SVMF32/Dims2_s16.txt | 16 + Testing/Patterns/DSP/SVM/SVMF32/Dims3_s16.txt | 14 + Testing/Patterns/DSP/SVM/SVMF32/Dims4_s16.txt | 14 + Testing/Patterns/DSP/SVM/SVMF32/Dims5_s16.txt | 14 + .../Patterns/DSP/SVM/SVMF32/Params1_f32.txt | 136 + .../Patterns/DSP/SVM/SVMF32/Params2_f32.txt | 228 + .../Patterns/DSP/SVM/SVMF32/Params3_f32.txt | 226 + .../Patterns/DSP/SVM/SVMF32/Params4_f32.txt | 228 + .../Patterns/DSP/SVM/SVMF32/Params5_f32.txt | 94 + .../DSP/SVM/SVMF32/Reference1_s32.txt | 202 + .../DSP/SVM/SVMF32/Reference2_s32.txt | 202 + .../DSP/SVM/SVMF32/Reference3_s32.txt | 202 + .../DSP/SVM/SVMF32/Reference4_s32.txt | 202 + .../DSP/SVM/SVMF32/Reference5_s32.txt | 202 + .../Patterns/DSP/SVM/SVMF32/Samples1_f32.txt | 2002 +++ .../Patterns/DSP/SVM/SVMF32/Samples2_f32.txt | 2002 +++ .../Patterns/DSP/SVM/SVMF32/Samples3_f32.txt | 2002 +++ .../Patterns/DSP/SVM/SVMF32/Samples4_f32.txt | 2002 +++ .../Patterns/DSP/SVM/SVMF32/Samples5_f32.txt | 2002 +++ Testing/README.md | 15 + Testing/Source/BasicMathsBenchmarksQ15.cpp | 119 + Testing/Source/BasicMathsBenchmarksQ7.cpp | 119 + Testing/Source/FullyConnected.cpp | 172 +- Testing/Source/FullyConnectedBench.cpp | 8 +- Testing/Source/SVMF32.cpp | 259 + Testing/TestDesc.txt | 444 +- Testing/TestScripts/Deprecate.py | 40 + Testing/addToDB.py | 286 + Testing/bench.db | Bin 0 -> 57344 bytes Testing/convertToOld.py | 111 + Testing/createDb.sql | 72 + Testing/currentConfig.csv | 2 +- Testing/desc.txt | 386 +- Testing/examples.sql | 48 + Testing/processResult.py | 8 +- Testing/processTests.py | 41 +- Testing/summaryBench.py | 128 +- 176 files changed, 47573 insertions(+), 19419 deletions(-) create mode 100755 ComputeLibrary/Include/NEMath.h create mode 100755 ComputeLibrary/LICENSE.txt create mode 100755 ComputeLibrary/README.md create mode 100755 ComputeLibrary/Source/arm_cl_tables.c create mode 100755 Platforms/FVP/ARMCM0/Include/ARMCM0.h create mode 100755 Platforms/FVP/ARMCM0/Include/system_ARMCM0.h create mode 100755 Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct create mode 100755 Platforms/FVP/ARMCM0/LinkScripts/AC6/mem_ARMCM0.h create mode 100755 Platforms/FVP/ARMCM0/Startup/AC6/startup_ARMCM0.s create mode 100755 Platforms/FVP/ARMCM0/system_ARMCM0.c create mode 100755 Source/SVMFunctions/CMakeLists.txt create mode 100755 Source/SVMFunctions/arm_svm_linear_init_f32.c create mode 100755 Source/SVMFunctions/arm_svm_linear_predict_f32.c create mode 100755 Source/SVMFunctions/arm_svm_polynomial_init_f32.c create mode 100755 Source/SVMFunctions/arm_svm_polynomial_predict_f32.c create mode 100755 Source/SVMFunctions/arm_svm_rbf_init_f32.c create mode 100755 Source/SVMFunctions/arm_svm_rbf_predict_f32.c create mode 100755 Source/SVMFunctions/arm_svm_sigmoid_init_f32.c create mode 100755 Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c create mode 100755 Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ15/fullBenchmark.csv create mode 100755 Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ15/regression.csv create mode 100755 Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ7/fullBenchmark.csv create mode 100755 Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ7/regression.csv create mode 100755 Testing/GeneratedInclude/BasicMathsBenchmarksQ15_decl.h create mode 100755 Testing/GeneratedInclude/BasicMathsBenchmarksQ7_decl.h create mode 100755 Testing/GeneratedInclude/SVMF32_decl.h create mode 100755 Testing/Include/BasicMathsBenchmarksQ15.h create mode 100755 Testing/Include/BasicMathsBenchmarksQ7.h create mode 100755 Testing/Include/SVMF32.h create mode 100755 Testing/Output/DSP/SVM/SVMF32/Output_1.txt create mode 100755 Testing/Output/DSP/SVM/SVMF32/Output_2.txt create mode 100755 Testing/Output/DSP/SVM/SVMF32/Output_3.txt create mode 100755 Testing/Output/DSP/SVM/SVMF32/Output_4.txt create mode 100755 Testing/Output/DSP/SVM/SVMF32/Output_5.txt rename Testing/Output/NN/FullyConnected/{Output1_1.txt => Output_1.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output7_8.txt => Output_10.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output10_11.txt => Output_11.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output11_12.txt => Output_12.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output12_13.txt => Output_13.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output13_14.txt => Output_14.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output14_15.txt => Output_15.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output19_2.txt => Output_2.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output2_3.txt => Output_3.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output3_4.txt => Output_4.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output4_5.txt => Output_5.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output5_6.txt => Output_6.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output6_7.txt => Output_7.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output9_10.txt => Output_8.txt} (100%) mode change 100644 => 100755 rename Testing/Output/NN/FullyConnected/{Output8_9.txt => Output_9.txt} (100%) mode change 100644 => 100755 create mode 100755 Testing/PatternGeneration/SVM.py create mode 100755 Testing/PatternGeneration/Tools.py create mode 100755 Testing/Patterns/DSP/SVM/SVMF32/Dims1_s16.txt create mode 100755 Testing/Patterns/DSP/SVM/SVMF32/Dims2_s16.txt create mode 100755 Testing/Patterns/DSP/SVM/SVMF32/Dims3_s16.txt create mode 100755 Testing/Patterns/DSP/SVM/SVMF32/Dims4_s16.txt create mode 100755 Testing/Patterns/DSP/SVM/SVMF32/Dims5_s16.txt create mode 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Testing/Patterns/DSP/SVM/SVMF32/Samples5_f32.txt create mode 100755 Testing/Source/BasicMathsBenchmarksQ15.cpp create mode 100755 Testing/Source/BasicMathsBenchmarksQ7.cpp create mode 100755 Testing/Source/SVMF32.cpp create mode 100755 Testing/TestScripts/Deprecate.py create mode 100755 Testing/addToDB.py create mode 100755 Testing/bench.db create mode 100755 Testing/convertToOld.py create mode 100755 Testing/createDb.sql create mode 100755 Testing/examples.sql diff --git a/ComputeLibrary/Include/NEMath.h b/ComputeLibrary/Include/NEMath.h new file mode 100755 index 00000000..13ae8c4d --- /dev/null +++ b/ComputeLibrary/Include/NEMath.h @@ -0,0 +1,414 @@ +/* + * Copyright (c) 2016, 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NEMATH_H__ +#define __ARM_COMPUTE_NEMATH_H__ + + +#if defined(ARM_MATH_NEON) +/** Calculate floor of a vector. + * + * @param[in] val Input vector value in F32 format. + * + * @return The calculated floor vector. + */ +static inline float32x4_t vfloorq_f32(float32x4_t val); + +/** Calculate inverse square root. + * + * @param[in] x Input value. + * + * @return The calculated inverse square root. + */ +static inline float32x2_t vinvsqrt_f32(float32x2_t x); + +/** Calculate inverse square root. + * + * @param[in] x Input value. + * + * @return The calculated inverse square root. + */ +static inline float32x4_t vinvsqrtq_f32(float32x4_t x); + +/** Calculate reciprocal. + * + * @param[in] x Input value. + * + * @return The calculated reciprocal. + */ +static inline float32x2_t vinv_f32(float32x2_t x); + +/** Calculate reciprocal. + * + * @param[in] x Input value. + * + * @return The calculated reciprocal. + */ +static inline float32x4_t vinvq_f32(float32x4_t x); + +/** Perform a 7th degree polynomial approximation using Estrin's method. + * + * @param[in] x Input vector value in F32 format. + * @param[in] coeffs Polynomial coefficients table. + * + * @return The calculated approximation. + */ +static inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32x4_t *coeffs); + +/** Calculate exponential + * + * @param[in] x Input vector value in F32 format. + * + * @return The calculated exponent. + */ +static inline float32x4_t vexpq_f32(float32x4_t x); + +/** Calculate logarithm + * + * @param[in] x Input vector value in F32 format. + * + * @return The calculated logarithm. + */ +static inline float32x4_t vlogq_f32(float32x4_t x); + +/** Calculate hyperbolic tangent. + * + * tanh(x) = (e^2x - 1)/(e^2x + 1) + * + * @note We clamp x to [-5,5] to avoid overflowing issues. + * + * @param[in] val Input vector value in F32 format. + * + * @return The calculated Hyperbolic Tangent. + */ +static inline float32x4_t vtanhq_f32(float32x4_t val); + +/** Calculate n power of a number. + * + * pow(x,n) = e^(n*log(x)) + * + * @param[in] val Input vector value in F32 format. + * @param[in] n Powers to raise the input to. + * + * @return The calculated power. + */ +static inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n); + +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +/** Calculate hyperbolic tangent. + * + * tanh(x) = (e^2x - 1)/(e^2x + 1) + * + * @note We clamp x to [-5,5] to avoid overflowing issues. + * + * @param[in] val Input vector value in F32 format. + * + * @return The calculated Hyperbolic Tangent. + */ +static inline float16x8_t vtanhq_f16(float16x8_t val); + +/** Calculate reciprocal. + * + * @param[in] x Input value. + * + * @return The calculated reciprocal. + */ +static inline float16x4_t vinv_f16(float16x4_t x); + +/** Calculate reciprocal. + * + * @param[in] x Input value. + * + * @return The calculated reciprocal. + */ +static inline float16x8_t vinvq_f16(float16x8_t x); + +/** Calculate inverse square root. + * + * @param[in] x Input value. + * + * @return The calculated inverse square root. + */ +static inline float16x4_t vinvsqrt_f16(float16x4_t x); + +/** Calculate inverse square root. + * + * @param[in] x Input value. + * + * @return The calculated inverse square root. + */ +static inline float16x8_t vinvsqrtq_f16(float16x8_t x); + +/** Calculate exponential + * + * @param[in] x Input vector value in F16 format. + * + * @return The calculated exponent. + */ +static inline float16x8_t vexpq_f16(float16x8_t x); + +/** Calculate n power of a number. + * + * pow(x,n) = e^(n*log(x)) + * + * @param[in] val Input vector value in F16 format. + * @param[in] n Powers to raise the input to. + * + * @return The calculated power. + */ +static inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n); +#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */ + +/** Exponent polynomial coefficients */ +extern const float32x4_t exp_tab[8]; + + +/** Logarithm polynomial coefficients */ +extern const float32x4_t log_tab[8]; + +#ifndef DOXYGEN_SKIP_THIS +inline float32x4_t vfloorq_f32(float32x4_t val) +{ + static const float32x4_t CONST_1 = {1.f,1.f,1.f,1.f}; + + const int32x4_t z = vcvtq_s32_f32(val); + const float32x4_t r = vcvtq_f32_s32(z); + + return vbslq_f32(vcgtq_f32(r, val), vsubq_f32(r, CONST_1), r); +} + +inline float32x2_t vinvsqrt_f32(float32x2_t x) +{ + float32x2_t sqrt_reciprocal = vrsqrte_f32(x); + sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); + sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); + + return sqrt_reciprocal; +} + +inline float32x4_t vinvsqrtq_f32(float32x4_t x) +{ + float32x4_t sqrt_reciprocal = vrsqrteq_f32(x); + sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); + sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); + + return sqrt_reciprocal; +} + +inline float32x2_t vinv_f32(float32x2_t x) +{ + float32x2_t recip = vrecpe_f32(x); + recip = vmul_f32(vrecps_f32(x, recip), recip); + recip = vmul_f32(vrecps_f32(x, recip), recip); + return recip; +} + +inline float32x4_t vinvq_f32(float32x4_t x) +{ + float32x4_t recip = vrecpeq_f32(x); + recip = vmulq_f32(vrecpsq_f32(x, recip), recip); + recip = vmulq_f32(vrecpsq_f32(x, recip), recip); + return recip; +} + +inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32x4_t *coeffs) +{ + float32x4_t A = vmlaq_f32(coeffs[0], coeffs[4], x); + float32x4_t B = vmlaq_f32(coeffs[2], coeffs[6], x); + float32x4_t C = vmlaq_f32(coeffs[1], coeffs[5], x); + float32x4_t D = vmlaq_f32(coeffs[3], coeffs[7], x); + float32x4_t x2 = vmulq_f32(x, x); + float32x4_t x4 = vmulq_f32(x2, x2); + float32x4_t res = vmlaq_f32(vmlaq_f32(A, B, x2), vmlaq_f32(C, D, x2), x4); + return res; +} + +inline float32x4_t vexpq_f32(float32x4_t x) +{ + static const float32x4_t CONST_LN2 = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2) + static const float32x4_t CONST_INV_LN2 = {1.4426950408f,1.4426950408f,1.4426950408f,1.4426950408f}; // 1/ln(2) + static const float32x4_t CONST_0 = {0.f,0.f,0.f,0.f}; + static const int32x4_t CONST_NEGATIVE_126 = {-126,-126,-126,-126}; + + // Perform range reduction [-log(2),log(2)] + int32x4_t m = vcvtq_s32_f32(vmulq_f32(x, CONST_INV_LN2)); + float32x4_t val = vmlsq_f32(x, vcvtq_f32_s32(m), CONST_LN2); + + // Polynomial Approximation + float32x4_t poly = vtaylor_polyq_f32(val, exp_tab); + + // Reconstruct + poly = vreinterpretq_f32_s32(vqaddq_s32(vreinterpretq_s32_f32(poly), vqshlq_n_s32(m, 23))); + poly = vbslq_f32(vcltq_s32(m, CONST_NEGATIVE_126), CONST_0, poly); + + return poly; +} + +inline float32x4_t vlogq_f32(float32x4_t x) +{ + static const int32x4_t CONST_127 = {127,127,127,127}; // 127 + static const float32x4_t CONST_LN2 = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2) + + // Extract exponent + int32x4_t m = vsubq_s32(vreinterpretq_s32_u32(vshrq_n_u32(vreinterpretq_u32_f32(x), 23)), CONST_127); + float32x4_t val = vreinterpretq_f32_s32(vsubq_s32(vreinterpretq_s32_f32(x), vshlq_n_s32(m, 23))); + + // Polynomial Approximation + float32x4_t poly = vtaylor_polyq_f32(val, log_tab); + + // Reconstruct + poly = vmlaq_f32(poly, vcvtq_f32_s32(m), CONST_LN2); + + return poly; +} + +inline float32x4_t vtanhq_f32(float32x4_t val) +{ + static const float32x4_t CONST_1 = {1.f,1.f,1.f,1.f}; + static const float32x4_t CONST_2 = {2.f,2.f,2.f,2.f}; + static const float32x4_t CONST_MIN_TANH = {-10.f,-10.f,-10.f,-10.f}; + static const float32x4_t CONST_MAX_TANH = {10.f,10.f,10.f,10.f}; + + float32x4_t x = vminq_f32(vmaxq_f32(val, CONST_MIN_TANH), CONST_MAX_TANH); + float32x4_t exp2x = vexpq_f32(vmulq_f32(CONST_2, x)); + float32x4_t num = vsubq_f32(exp2x, CONST_1); + float32x4_t den = vaddq_f32(exp2x, CONST_1); + float32x4_t tanh = vmulq_f32(num, vinvq_f32(den)); + return tanh; +} + +inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n) +{ + return vexpq_f32(vmulq_f32(n, vlogq_f32(val))); +} +#endif /* DOXYGEN_SKIP_THIS */ + +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +/** Exponent polynomial coefficients */ +/** Logarithm polynomial coefficients */ +#ifndef DOXYGEN_SKIP_THIS +inline float16x8_t vfloorq_f16(float16x8_t val) +{ + static const float16x8_t CONST_1 = {1.f,1.f,1.f,1.f}; + + const int16x8_t z = vcvtq_s16_f16(val); + const float16x8_t r = vcvtq_f16_s16(z); + + return vbslq_f16(vcgtq_f16(r, val), vsubq_f16(r, CONST_1), r); +} +inline float16x4_t vinvsqrt_f16(float16x4_t x) +{ + float16x4_t sqrt_reciprocal = vrsqrte_f16(x); + sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); + sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); + return sqrt_reciprocal; +} + +inline float16x8_t vinvsqrtq_f16(float16x8_t x) +{ + float16x8_t sqrt_reciprocal = vrsqrteq_f16(x); + sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); + sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); + return sqrt_reciprocal; +} + +inline float16x4_t vinv_f16(float16x4_t x) +{ + float16x4_t recip = vrecpe_f16(x); + recip = vmul_f16(vrecps_f16(x, recip), recip); + recip = vmul_f16(vrecps_f16(x, recip), recip); + return recip; +} + +inline float16x8_t vinvq_f16(float16x8_t x) +{ + float16x8_t recip = vrecpeq_f16(x); + recip = vmulq_f16(vrecpsq_f16(x, recip), recip); + recip = vmulq_f16(vrecpsq_f16(x, recip), recip); + return recip; +} + +inline float16x8_t vtanhq_f16(float16x8_t val) +{ + const float16x8_t CONST_1 = {1.f,1.f,1.f,1.f}; + const float16x8_t CONST_2 = {2.f,2.f,2.f,2.f}; + const float16x8_t CONST_MIN_TANH = {-10.f,-10.f,-10.f,-10.f}; + const float16x8_t CONST_MAX_TANH = {10.f,10.f,10.f,10.f}; + + const float16x8_t x = vminq_f16(vmaxq_f16(val, CONST_MIN_TANH), CONST_MAX_TANH); + const float16x8_t exp2x = vexpq_f16(vmulq_f16(CONST_2, x)); + const float16x8_t num = vsubq_f16(exp2x, CONST_1); + const float16x8_t den = vaddq_f16(exp2x, CONST_1); + const float16x8_t tanh = vmulq_f16(num, vinvq_f16(den)); + return tanh; +} + +inline float16x8_t vtaylor_polyq_f16(float16x8_t x, const std::array &coeffs) +{ + const float16x8_t A = vaddq_f16(coeffs[0], vmulq_f16(coeffs[4], x)); + const float16x8_t B = vaddq_f16(coeffs[2], vmulq_f16(coeffs[6], x)); + const float16x8_t C = vaddq_f16(coeffs[1], vmulq_f16(coeffs[5], x)); + const float16x8_t D = vaddq_f16(coeffs[3], vmulq_f16(coeffs[7], x)); + const float16x8_t x2 = vmulq_f16(x, x); + const float16x8_t x4 = vmulq_f16(x2, x2); + const float16x8_t res = vaddq_f16(vaddq_f16(A, vmulq_f16(B, x2)), vmulq_f16(vaddq_f16(C, vmulq_f16(D, x2)), x4)); + return res; +} + +inline float16x8_t vexpq_f16(float16x8_t x) +{ + // TODO (COMPMID-1535) : Revisit FP16 approximations + const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x)); + const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x)); + + const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vexpq_f32(x_low)), vexpq_f32(x_high)); + return res; +} + +inline float16x8_t vlogq_f16(float16x8_t x) +{ + // TODO (COMPMID-1535) : Revisit FP16 approximations + const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x)); + const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x)); + + const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vlogq_f32(x_low)), vlogq_f32(x_high)); + return res; +} + +inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n) +{ + // TODO (giaiod01) - COMPMID-1535 + float32x4_t n0_f32 = vcvt_f32_f16(vget_low_f16(n)); + float32x4_t n1_f32 = vcvt_f32_f16(vget_high_f16(n)); + float32x4_t val0_f32 = vcvt_f32_f16(vget_low_f16(val)); + float32x4_t val1_f32 = vcvt_f32_f16(vget_high_f16(val)); + + float32x4_t res0_f32 = vexpq_f32(vmulq_f32(n0_f32, vlogq_f32(val0_f32))); + float32x4_t res1_f32 = vexpq_f32(vmulq_f32(n1_f32, vlogq_f32(val1_f32))); + + return vcombine_f16(vcvt_f16_f32(res0_f32), vcvt_f16_f32(res1_f32)); +} +#endif /* DOXYGEN_SKIP_THIS */ +#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */ +#endif +#endif /* __ARM_COMPUTE_NEMATH_H__ */ \ No newline at end of file diff --git a/ComputeLibrary/LICENSE.txt b/ComputeLibrary/LICENSE.txt new file mode 100755 index 00000000..54292789 --- /dev/null +++ b/ComputeLibrary/LICENSE.txt @@ -0,0 +1,21 @@ +MIT License + +Copyright (c) 2017-2019 ARM Software + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/ComputeLibrary/README.md b/ComputeLibrary/README.md new file mode 100755 index 00000000..9c350764 --- /dev/null +++ b/ComputeLibrary/README.md @@ -0,0 +1,19 @@ +README +====== + +This folder is containing two files imported, and slightly modified, from the ComputeLibrary: + + NEMath.h and arm_cl_tables.c + +In the original compute library, there are instead two other files: + + NEMath.h and NEMath.inl + +NEMath.inl is included from NEMath.h whereas in this CMSIS DSP implementation, there is no NEMath.inl and its content is copied into NEMath.h + +The tables contained in NEMath.inl have been moved to arm_cl_tables.c and finally the files are in C for the CMSIS DSP library and in C++ in the original Compute Library. + +Otherwise, the features and implementations are the same : a few optimized Neon functions. + +The license covering those files is different : It is a MIT license. +Other parts of the CMSIS-DSP are covered with an Apache-2.0 license. diff --git a/ComputeLibrary/Source/arm_cl_tables.c b/ComputeLibrary/Source/arm_cl_tables.c new file mode 100755 index 00000000..53d548b4 --- /dev/null +++ b/ComputeLibrary/Source/arm_cl_tables.c @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2016, 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_math.h" +#include "NEMath.h" + +#if defined(ARM_MATH_NEON) + +/** Exponent polynomial coefficients */ +const float32x4_t exp_tab[8] = +{ + {1.f,1.f,1.f,1.f}, + {0.0416598916054f,0.0416598916054f,0.0416598916054f,0.0416598916054f}, + {0.500000596046f,0.500000596046f,0.500000596046f,0.500000596046f}, + {0.0014122662833f,0.0014122662833f,0.0014122662833f,0.0014122662833f}, + {1.00000011921f,1.00000011921f,1.00000011921f,1.00000011921f}, + {0.00833693705499f,0.00833693705499f,0.00833693705499f,0.00833693705499f}, + {0.166665703058f,0.166665703058f,0.166665703058f,0.166665703058f}, + {0.000195780929062f,0.000195780929062f,0.000195780929062f,0.000195780929062f} +}; + +/** Logarithm polynomial coefficients */ +const float32x4_t log_tab[8] = +{ + {-2.29561495781f,-2.29561495781f,-2.29561495781f,-2.29561495781f}, + {-2.47071170807f,-2.47071170807f,-2.47071170807f,-2.47071170807f}, + {-5.68692588806f,-5.68692588806f,-5.68692588806f,-5.68692588806f}, + {-0.165253549814f,-0.165253549814f,-0.165253549814f,-0.165253549814f}, + {5.17591238022f,5.17591238022f,5.17591238022f,5.17591238022f}, + {0.844007015228f,0.844007015228f,0.844007015228f,0.844007015228f}, + {4.58445882797f,4.58445882797f,4.58445882797f,4.58445882797f}, + {0.0141278216615f,0.0141278216615f,0.0141278216615f,0.0141278216615f}, +}; + +#endif \ No newline at end of file diff --git a/Include/arm_math.h b/Include/arm_math.h index bea2ac6e..7ea309ce 100644 --- a/Include/arm_math.h +++ b/Include/arm_math.h @@ -275,6 +275,9 @@ * @defgroup groupExamples Examples */ +/** + * @defgroup groupSVM SVM Functions + */ #ifndef _ARM_MATH_H #define _ARM_MATH_H @@ -446,6 +449,9 @@ extern "C" #define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr)) #define __SIMD64(addr) (*( int64_t **) & (addr)) +#define STEP(x) (x) <= 0 ? 0 : 1 +#define SQ(x) ((x) * (x)) + /* SIMD replacement */ @@ -819,8 +825,47 @@ compiler file in Core or Core_A would not make sense. return (signBits + 1); } +/** + * @brief Integer exponentiation + * @param[in] x value + * @param[in] nb integer exponent >= 1 + * @return x^nb + * + */ +static inline float32_t arm_exponent_f32(float32_t x, int nb) +{ + float32_t r = x; + nb --; + while(nb > 0) + { + r = r * x; + nb--; + } + return(r); +} + #if defined(ARM_MATH_NEON) +/** + * @brief Vectorized integer exponentiation + * @param[in] x value + * @param[in] nb integer exponent >= 1 + * @return x^nb + * + */ +static inline float32x4_t arm_vec_exponent_f32(float32x4_t x, int nb) +{ + float32x4_t r = x; + nb --; + while(nb > 0) + { + r = vmulq_f32(r , x); + nb--; + } + return(r); +} + + static inline float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t x) { float32x4_t x1 = vmaxq_f32(x, vdupq_n_f32(FLT_MIN)); @@ -6866,6 +6911,233 @@ arm_status arm_sqrt_q15( q15_t * pDst, uint32_t blockSize); + /** + * @brief Struct for specifying SVM Kernel + * + */ +typedef enum +{ + ARM_ML_KERNEL_LINEAR = 0, + /**< Linear kernel */ + ARM_ML_KERNEL_POLYNOMIAL = 1, + /**< Polynomial kernel */ + ARM_ML_KERNEL_RBF = 2, + /**< Radial Basis Function kernel */ + ARM_ML_KERNEL_SIGMOID = 3 + /**< Sigmoid kernel */ +} arm_ml_kernel_type; + + + +/** + * @brief Instance structure for linear SVM prediction function. + */ +typedef struct +{ + uint32_t nbOfSupportVectors; /**< Number of support vectors */ + uint32_t vectorDimension; /**< Dimension of vector space */ + float32_t intercept; /**< Intercept */ + const float32_t *dualCoefficients; /**< Dual coefficients */ + const float32_t *supportVectors; /**< Support vectors */ + const int32_t *classes; /**< The two SVM classes */ +} arm_svm_linear_instance_f32; + + +/** + * @brief Instance structure for polynomial SVM prediction function. + */ +typedef struct +{ + uint32_t nbOfSupportVectors; /**< Number of support vectors */ + uint32_t vectorDimension; /**< Dimension of vector space */ + float32_t intercept; /**< Intercept */ + const float32_t *dualCoefficients; /**< Dual coefficients */ + const float32_t *supportVectors; /**< Support vectors */ + const int32_t *classes; /**< The two SVM classes */ + int degree; /**< Polynomial degree */ + float32_t coef0; /**< Polynomial constant */ + float32_t gamma; /**< Gamma factor */ +} arm_svm_polynomial_instance_f32; + +/** + * @brief Instance structure for rbf SVM prediction function. + */ +typedef struct +{ + uint32_t nbOfSupportVectors; /**< Number of support vectors */ + uint32_t vectorDimension; /**< Dimension of vector space */ + float32_t intercept; /**< Intercept */ + const float32_t *dualCoefficients; /**< Dual coefficients */ + const float32_t *supportVectors; /**< Support vectors */ + const int32_t *classes; /**< The two SVM classes */ + float32_t gamma; /**< Gamma factor */ +} arm_svm_rbf_instance_f32; + +/** + * @brief Instance structure for sigmoid SVM prediction function. + */ +typedef struct +{ + uint32_t nbOfSupportVectors; /**< Number of support vectors */ + uint32_t vectorDimension; /**< Dimension of vector space */ + float32_t intercept; /**< Intercept */ + const float32_t *dualCoefficients; /**< Dual coefficients */ + const float32_t *supportVectors; /**< Support vectors */ + const int32_t *classes; /**< The two SVM classes */ + float32_t coef0; /**< Independant constant */ + float32_t gamma; /**< Gamma factor */ +} arm_svm_sigmoid_instance_f32; + +/** + * @brief SVM linear instance init function + * @param[in] nbOfSupportVectors Number of support vectors + * @param[in] vectorDimension Dimension of vector space + * @param[in] intercept Intercept + * @param[in] dualCoefficients Array of dual coefficients + * @param[in] supportVectors Array of support vectors + * @param[in] classes Array of 2 classes ID + * @return none. + * + */ + + +void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, + uint32_t nbOfSupportVectors, + uint32_t vectorDimension, + float32_t intercept, + const float32_t *dualCoefficients, + const float32_t *supportVectors, + const int32_t *classes); + +/** + * @brief SVM linear prediction + * @param[in] *S points to an instance of the linear SVM structure. + * @param[in] vec_in pointer to input vector + * @param[out] *pResult decision value + * @return none. + * + */ + +void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S, + const float32_t * in, + int * pResult); + + +/** + * @brief SVM polynomial instance init function + * @param[in] nbOfSupportVectors Number of support vectors + * @param[in] vectorDimension Dimension of vector space + * @param[in] intercept Intercept + * @param[in] dualCoefficients Array of dual coefficients + * @param[in] supportVectors Array of support vectors + * @param[in] classes Array of 2 classes ID + * @param[in] degree Polynomial degree + * @param[in] coef0 coeff0 (scikit-learn terminology) + * @param[in] gamma gamma (scikit-learn terminology) + * @return none. + * + */ + + +void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, + uint32_t nbOfSupportVectors, + uint32_t vectorDimension, + float32_t intercept, + const float32_t *dualCoefficients, + const float32_t *supportVectors, + const int32_t *classes, + int degree, + float32_t coef0, + float32_t gamma + ); + +/** + * @brief SVM polynomial prediction + * @param[in] *S points to an instance of the polynomial SVM structure. + * @param[in] vec_in pointer to input vector + * @param[out] *pResult decision value + * @return none. + * + */ + +void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S, + const float32_t * in, + int * pResult); + + +/** + * @brief SVM radial basis function instance init function + * @param[in] nbOfSupportVectors Number of support vectors + * @param[in] vectorDimension Dimension of vector space + * @param[in] intercept Intercept + * @param[in] dualCoefficients Array of dual coefficients + * @param[in] supportVectors Array of support vectors + * @param[in] classes Array of 2 classes ID + * @param[in] gamma gamma (scikit-learn terminology) + * @return none. + * + */ + +void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, + uint32_t nbOfSupportVectors, + uint32_t vectorDimension, + float32_t intercept, + const float32_t *dualCoefficients, + const float32_t *supportVectors, + const int32_t *classes, + float32_t gamma + ); + +/** + * @brief SVM rbf prediction + * @param[in] *S points to an instance of the rbf SVM structure. + * @param[in] vec_in pointer to input vector + * @param[out] *pResult decision value + * @return none. + * + */ + +void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S, + const float32_t * in, + int * pResult); + +/** + * @brief SVM sigmoid instance init function + * @param[in] nbOfSupportVectors Number of support vectors + * @param[in] vectorDimension Dimension of vector space + * @param[in] intercept Intercept + * @param[in] dualCoefficients Array of dual coefficients + * @param[in] supportVectors Array of support vectors + * @param[in] classes Array of 2 classes ID + * @param[in] coef0 coeff0 (scikit-learn terminology) + * @param[in] gamma gamma (scikit-learn terminology) + * @return none. + * + */ + +void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, + uint32_t nbOfSupportVectors, + uint32_t vectorDimension, + float32_t intercept, + const float32_t *dualCoefficients, + const float32_t *supportVectors, + const int32_t *classes, + float32_t coef0, + float32_t gamma + ); + +/** + * @brief SVM sigmoid prediction + * @param[in] *S points to an instance of the rbf SVM structure. + * @param[in] vec_in pointer to input vector + * @param[out] *pResult decision value + * @return none. + * + */ +void arm_svm_sigmoid_predict_f32(const arm_svm_sigmoid_instance_f32 *S, + const float32_t * in, + int * pResult); + /** * @ingroup groupInterpolation diff --git a/Platforms/FVP/ARMCM0/Include/ARMCM0.h b/Platforms/FVP/ARMCM0/Include/ARMCM0.h new file mode 100755 index 00000000..93881d5e --- /dev/null +++ b/Platforms/FVP/ARMCM0/Include/ARMCM0.h @@ -0,0 +1,126 @@ +/**************************************************************************//** + * @file ARMCM0.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM0_H +#define ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + + + + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 31 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM0_REV 0x0000U /* Core revision r0p0 */ +#define __MPU_PRESENT 0U /* no MPU present */ +#define __VTOR_PRESENT 0U /* no VTOR present */ +#define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ + +#include "core_cm0.h" /* Processor and core peripherals */ +#include "system_ARMCM0.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM0_H */ diff --git a/Platforms/FVP/ARMCM0/Include/system_ARMCM0.h b/Platforms/FVP/ARMCM0/Include/system_ARMCM0.h new file mode 100755 index 00000000..7fe7e914 --- /dev/null +++ b/Platforms/FVP/ARMCM0/Include/system_ARMCM0.h @@ -0,0 +1,55 @@ +/**************************************************************************//** + * @file system_ARMCM0.h + * @brief CMSIS Device System Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef SYSTEM_ARMCM0_H +#define SYSTEM_ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + + +/** + \brief Setup the microcontroller system. + + Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + + +/** + \brief Update SystemCoreClock variable. + + Updates the SystemCoreClock with current core Clock retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_ARMCM0_H */ diff --git a/Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct b/Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct new file mode 100755 index 00000000..2c858e2e --- /dev/null +++ b/Platforms/FVP/ARMCM0/LinkScripts/AC6/lnk.sct @@ -0,0 +1,75 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m0 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +#include "mem_ARMCM0.h" + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00100000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00200000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE STACK_SIZE +#define __HEAP_SIZE HEAP_SIZE + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundery definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) /* starts at end of RAM */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE (__RAM_BASE ) +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/Platforms/FVP/ARMCM0/LinkScripts/AC6/mem_ARMCM0.h b/Platforms/FVP/ARMCM0/LinkScripts/AC6/mem_ARMCM0.h new file mode 100755 index 00000000..a707e5e9 --- /dev/null +++ b/Platforms/FVP/ARMCM0/LinkScripts/AC6/mem_ARMCM0.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM0_H +#define __MEM_ARMCM0_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/FVP/ARMCM0/Startup/AC6/startup_ARMCM0.s b/Platforms/FVP/ARMCM0/Startup/AC6/startup_ARMCM0.s new file mode 100755 index 00000000..b49011f0 --- /dev/null +++ b/Platforms/FVP/ARMCM0/Startup/AC6/startup_ARMCM0.s @@ -0,0 +1,164 @@ +;/**************************************************************************//** +; * @file startup_ARMCM0.s +; * @brief CMSIS Core Device Startup File for +; * ARMCM0 Device +; * @version V5.4.0 +; * @date 12. December 2018 +; ******************************************************************************/ +;/* +; * Copyright (c) 2009-2018 Arm Limited. All rights reserved. +; * +; * SPDX-License-Identifier: Apache-2.0 +; * +; * Licensed under the Apache License, Version 2.0 (the License); you may +; * not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an AS IS BASIS, WITHOUT +; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; */ + +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + +#include "mem_ARMCM0.h" + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU STACK_SIZE + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +__stack_limit +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU HEAP_SIZE + + IF Heap_Size != 0 ; Heap is provided + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + ENDIF + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; -14 NMI Handler + DCD HardFault_Handler ; -13 Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; -5 SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; -2 PendSV Handler + DCD SysTick_Handler ; -1 SysTick Handler + + ; Interrupts + DCD Interrupt0_Handler ; 0 Interrupt 0 + DCD Interrupt1_Handler ; 1 Interrupt 1 + DCD Interrupt2_Handler ; 2 Interrupt 2 + DCD Interrupt3_Handler ; 3 Interrupt 3 + DCD Interrupt4_Handler ; 4 Interrupt 4 + DCD Interrupt5_Handler ; 5 Interrupt 5 + DCD Interrupt6_Handler ; 6 Interrupt 6 + DCD Interrupt7_Handler ; 7 Interrupt 7 + DCD Interrupt8_Handler ; 8 Interrupt 8 + DCD Interrupt9_Handler ; 9 Interrupt 9 + + SPACE ( 22 * 4) ; Interrupts 10 .. 31 are left out +__Vectors_End +__Vectors_Size EQU __Vectors_End - __Vectors + + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Macro to define default exception/interrupt handlers. +; Default handler are weak symbols with an endless loop. +; They can be overwritten by real handlers. + MACRO + Set_Default_Handler $Handler_Name +$Handler_Name PROC + EXPORT $Handler_Name [WEAK] + B . + ENDP + MEND + + +; Default exception/interrupt handler + + Set_Default_Handler NMI_Handler + Set_Default_Handler HardFault_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler Interrupt0_Handler + Set_Default_Handler Interrupt1_Handler + Set_Default_Handler Interrupt2_Handler + Set_Default_Handler Interrupt3_Handler + Set_Default_Handler Interrupt4_Handler + Set_Default_Handler Interrupt5_Handler + Set_Default_Handler Interrupt6_Handler + Set_Default_Handler Interrupt7_Handler + Set_Default_Handler Interrupt8_Handler + Set_Default_Handler Interrupt9_Handler + + ALIGN + + +; User setup Stack & Heap + + IF :LNOT::DEF:__MICROLIB + IMPORT __use_two_region_memory + ENDIF + + EXPORT __stack_limit + EXPORT __initial_sp + IF Heap_Size != 0 ; Heap is provided + EXPORT __heap_base + EXPORT __heap_limit + ENDIF + + END diff --git a/Platforms/FVP/ARMCM0/system_ARMCM0.c b/Platforms/FVP/ARMCM0/system_ARMCM0.c new file mode 100755 index 00000000..66a364c7 --- /dev/null +++ b/Platforms/FVP/ARMCM0/system_ARMCM0.c @@ -0,0 +1,56 @@ +/**************************************************************************//** + * @file system_ARMCM0.c + * @brief CMSIS Device System Source File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ARMCM0.h" + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} diff --git a/Source/CMakeLists.txt b/Source/CMakeLists.txt index 06243629..061655f0 100755 --- a/Source/CMakeLists.txt +++ b/Source/CMakeLists.txt @@ -27,6 +27,7 @@ option(MATRIX "Matrix Functions" ON) option(STATISTICS "Statistics Functions" ON) option(SUPPORT "Support Functions" ON) option(TRANSFORM "Transform Functions" ON) +option(SVM "Support Vector Machine Functions" ON) # When OFF it is the default behavior : all tables are included. option(CONFIGTABLE "Configuration of table allowed" OFF) @@ -224,6 +225,11 @@ if (FILTERING OR CONTROLLER OR FASTMATH OR TRANSFORM) target_link_libraries(CMSISDSP INTERFACE CMSISDSPCommon) endif() +if (SVM) + add_subdirectory(SVMFunctions) + target_link_libraries(CMSISDSP INTERFACE CMSISDSPSVM) +endif() + ### Includes target_include_directories(CMSISDSP INTERFACE "${DSP}/Include") diff --git a/Source/SVMFunctions/CMakeLists.txt b/Source/SVMFunctions/CMakeLists.txt new file mode 100755 index 00000000..a82703d8 --- /dev/null +++ b/Source/SVMFunctions/CMakeLists.txt @@ -0,0 +1,22 @@ +cmake_minimum_required (VERSION 3.6) + +project(CMSISDSPSVM) + +include(config) +include(configDsp) + +file(GLOB SRC "./*_*.c") + +add_library(CMSISDSPSVM STATIC ${SRC}) + +configLib(CMSISDSPSVM ${ROOT}) +configDsp(CMSISDSPSVM ${ROOT}) + +### Includes +target_include_directories(CMSISDSPSVM PUBLIC "${DSP}/Include") + + +if (NEON OR NEONEXPERIMENTAL) + target_sources(CMSISDSPSVM PRIVATE "${DSP}/ComputeLibrary/Source/arm_cl_tables.c") +endif() + diff --git a/Source/SVMFunctions/arm_svm_linear_init_f32.c b/Source/SVMFunctions/arm_svm_linear_init_f32.c new file mode 100755 index 00000000..28808ba7 --- /dev/null +++ b/Source/SVMFunctions/arm_svm_linear_init_f32.c @@ -0,0 +1,81 @@ +/* ---------------------------------------------------------------------- + * Project: CMSIS DSP Library + * Title: arm_svm_linear_init_f32.c + * Description: SVM Linear Instance Initialization + * + * + * Target Processor: Cortex-M cores + * -------------------------------------------------------------------- */ +/* + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_math.h" +#include +#include + +/** + * @defgroup groupSVM SVM Functions + * + * Computes SVM predictions. + * + * The SVM predictors in CMSIS-DSP are only working with 2 classes. + * Multi-class support must be built from the building blocks provided by CMSIS-DSP. + * + */ + + +/** + * @addtogroup groupSVM + * @{ + */ + + +/** + * @brief SVM linear instance init function + * @param[in] nbOfSupportVectors Number of support vectors + * @param[in] vectorDimension Dimension of vector space + * @param[in] intercept Intercept + * @param[in] dualCoefficients Array of dual coefficients + * @param[in] supportVectors Array of support vectors + * @param[in] classes Array of 2 classes ID + * @return none. + * + */ + + +void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, + uint32_t nbOfSupportVectors, + uint32_t vectorDimension, + float32_t intercept, + const float32_t *dualCoefficients, + const float32_t *supportVectors, + const int32_t *classes) +{ + S->nbOfSupportVectors = nbOfSupportVectors; + S->vectorDimension = vectorDimension; + S->intercept = intercept; + S->dualCoefficients = dualCoefficients; + S->supportVectors = supportVectors; + S->classes = classes; +} + + + +/** + * @} end of groupSVM group + */ diff --git a/Source/SVMFunctions/arm_svm_linear_predict_f32.c b/Source/SVMFunctions/arm_svm_linear_predict_f32.c new file mode 100755 index 00000000..d6c92d91 --- /dev/null +++ b/Source/SVMFunctions/arm_svm_linear_predict_f32.c @@ -0,0 +1,221 @@ +/* ---------------------------------------------------------------------- + * Project: CMSIS DSP Library + * Title: arm_svm_linear_predict_f32.c + * Description: SVM Linear Classifier + * + * + * Target Processor: Cortex-M cores + * -------------------------------------------------------------------- */ +/* + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_math.h" +#include +#include + + +/** + * @addtogroup groupSVM + * @{ + */ + + +/** + * @brief SVM linear prediction + * @param[in] *S points to an instance of the linear SVM structure. + * @param[in] vec_in pointer to input vector + * @param[out] *pResult decision value + * @return none. + * + */ + +#if defined(ARM_MATH_NEON) +void arm_svm_linear_predict_f32( + const arm_svm_linear_instance_f32 *S, + const float32_t * in, + int * pResult) +{ + float32_t sum = S->intercept; + + float32_t dot; + float32x4_t dotV; + + float32x4_t accuma,accumb,accumc,accumd,accum; + float32x2_t accum2; + float32x4_t vec1; + + float32x4_t vec2,vec2a,vec2b,vec2c,vec2d; + + uint32_t blkCnt; + uint32_t vectorBlkCnt; + + const float32_t *pIn = in; + + const float32_t *pSupport = S->supportVectors; + + const float32_t *pSupporta = S->supportVectors; + const float32_t *pSupportb; + const float32_t *pSupportc; + const float32_t *pSupportd; + + pSupportb = pSupporta + S->vectorDimension; + pSupportc = pSupportb + S->vectorDimension; + pSupportd = pSupportc + S->vectorDimension; + + const float32_t *pDualCoefs = S->dualCoefficients; + + vectorBlkCnt = S->nbOfSupportVectors >> 2; + + while (vectorBlkCnt > 0U) + { + accuma = vdupq_n_f32(0); + accumb = vdupq_n_f32(0); + accumc = vdupq_n_f32(0); + accumd = vdupq_n_f32(0); + + pIn = in; + + blkCnt = S->vectorDimension >> 2; + while (blkCnt > 0U) + { + + vec1 = vld1q_f32(pIn); + vec2a = vld1q_f32(pSupporta); + vec2b = vld1q_f32(pSupportb); + vec2c = vld1q_f32(pSupportc); + vec2d = vld1q_f32(pSupportd); + + pIn += 4; + pSupporta += 4; + pSupportb += 4; + pSupportc += 4; + pSupportd += 4; + + accuma = vmlaq_f32(accuma, vec1,vec2a); + accumb = vmlaq_f32(accumb, vec1,vec2b); + accumc = vmlaq_f32(accumc, vec1,vec2c); + accumd = vmlaq_f32(accumd, vec1,vec2d); + + blkCnt -- ; + } + accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma)); + dotV[0] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb)); + dotV[1] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc)); + dotV[2] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd)); + dotV[3] = accum2[0] + accum2[1]; + + + blkCnt = S->vectorDimension & 3; + while (blkCnt > 0U) + { + dotV[0] = dotV[0] + *pIn * *pSupporta++; + dotV[1] = dotV[1] + *pIn * *pSupportb++; + dotV[2] = dotV[2] + *pIn * *pSupportc++; + dotV[3] = dotV[3] + *pIn * *pSupportd++; + + pIn++; + + blkCnt -- ; + } + + vec1 = vld1q_f32(pDualCoefs); + pDualCoefs += 4; + + accum = vmulq_f32(vec1,dotV); + accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); + sum += accum2[0] + accum2[1]; + + pSupporta += 3*S->vectorDimension; + pSupportb += 3*S->vectorDimension; + pSupportc += 3*S->vectorDimension; + pSupportd += 3*S->vectorDimension; + + vectorBlkCnt -- ; + } + + pSupport = pSupporta; + vectorBlkCnt = S->nbOfSupportVectors & 3; + while (vectorBlkCnt > 0U) + { + accum = vdupq_n_f32(0); + dot = 0.0; + pIn = in; + + blkCnt = S->vectorDimension >> 2; + while (blkCnt > 0U) + { + + vec1 = vld1q_f32(pIn); + vec2 = vld1q_f32(pSupport); + pIn += 4; + pSupport += 4; + + accum = vmlaq_f32(accum, vec1,vec2); + + blkCnt -- ; + } + accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); + dot = accum2[0] + accum2[1]; + + + blkCnt = S->vectorDimension & 3; + while (blkCnt > 0U) + { + dot = dot + *pIn++ * *pSupport++; + + blkCnt -- ; + } + + sum += *pDualCoefs++ * dot; + vectorBlkCnt -- ; + } + + *pResult=S->classes[STEP(sum)]; +} +#else +void arm_svm_linear_predict_f32( + const arm_svm_linear_instance_f32 *S, + const float32_t * in, + int * pResult) +{ + float32_t sum=S->intercept; + float32_t dot=0; + const float32_t *pSupport = S->supportVectors; + + for(int i=0; i < S->nbOfSupportVectors; i++) + { + dot=0; + for(int j=0; j < S->vectorDimension; j++) + { + dot = dot + in[j]* *pSupport++; + } + sum += S->dualCoefficients[i] * dot; + } + *pResult=S->classes[STEP(sum)]; +} +#endif + +/** + * @} end of groupSVM group + */ diff --git a/Source/SVMFunctions/arm_svm_polynomial_init_f32.c b/Source/SVMFunctions/arm_svm_polynomial_init_f32.c new file mode 100755 index 00000000..53e6fc7c --- /dev/null +++ b/Source/SVMFunctions/arm_svm_polynomial_init_f32.c @@ -0,0 +1,82 @@ +/* ---------------------------------------------------------------------- + * Project: CMSIS DSP Library + * Title: arm_svm_polynomial_init_f32.c + * Description: SVM Polynomial Instance Initialization + * + * + * Target Processor: Cortex-M cores + * -------------------------------------------------------------------- */ +/* + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_math.h" +#include +#include + + +/** + * @addtogroup groupSVM + * @{ + */ + + + +/** + * @brief SVM polynomial instance init function + * @param[in] nbOfSupportVectors Number of support vectors + * @param[in] vectorDimension Dimension of vector space + * @param[in] intercept Intercept + * @param[in] dualCoefficients Array of dual coefficients + * @param[in] supportVectors Array of support vectors + * @param[in] classes Array of 2 classes ID + * @param[in] degree Polynomial degree + * @param[in] coef0 coeff0 (scikit-learn terminology) + * @param[in] gamma gamma (scikit-learn terminology) + * @return none. + * + */ + + +void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, + uint32_t nbOfSupportVectors, + uint32_t vectorDimension, + float32_t intercept, + const float32_t *dualCoefficients, + const float32_t *supportVectors, + const int32_t *classes, + int degree, + float32_t coef0, + float32_t gamma + ) +{ + S->nbOfSupportVectors = nbOfSupportVectors; + S->vectorDimension = vectorDimension; + S->intercept = intercept; + S->dualCoefficients = dualCoefficients; + S->supportVectors = supportVectors; + S->classes = classes; + S->degree = degree; + S->coef0 = coef0; + S->gamma = gamma; +} + + + +/** + * @} end of groupSVM group + */ diff --git a/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c b/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c new file mode 100755 index 00000000..f638a0b6 --- /dev/null +++ b/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c @@ -0,0 +1,230 @@ +/* ---------------------------------------------------------------------- + * Project: CMSIS DSP Library + * Title: arm_svm_polynomial_predict_f32.c + * Description: SVM Polynomial Classifier + * + * + * Target Processor: Cortex-M cores + * -------------------------------------------------------------------- */ +/* + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_math.h" +#include +#include + + + +/** + * @addtogroup groupSVM + * @{ + */ + + +/** + * @brief SVM polynomial prediction + * @param[in] *S points to an instance of the polynomial SVM structure. + * @param[in] vec_in pointer to input vector + * @param[out] *pResult decision value + * @return none. + * + */ +#if defined(ARM_MATH_NEON) +void arm_svm_polynomial_predict_f32( + const arm_svm_polynomial_instance_f32 *S, + const float32_t * in, + int * pResult) +{ + float32_t sum = S->intercept; + + float32_t dot; + float32x4_t dotV; + + float32x4_t accuma,accumb,accumc,accumd,accum; + float32x2_t accum2; + float32x4_t vec1; + float32x4_t coef0 = vdupq_n_f32(S->coef0); + + float32x4_t vec2,vec2a,vec2b,vec2c,vec2d; + + uint32_t blkCnt; + uint32_t vectorBlkCnt; + + const float32_t *pIn = in; + + const float32_t *pSupport = S->supportVectors; + + const float32_t *pSupporta = S->supportVectors; + const float32_t *pSupportb; + const float32_t *pSupportc; + const float32_t *pSupportd; + + pSupportb = pSupporta + S->vectorDimension; + pSupportc = pSupportb + S->vectorDimension; + pSupportd = pSupportc + S->vectorDimension; + + const float32_t *pDualCoefs = S->dualCoefficients; + + vectorBlkCnt = S->nbOfSupportVectors >> 2; + while (vectorBlkCnt > 0U) + { + accuma = vdupq_n_f32(0); + accumb = vdupq_n_f32(0); + accumc = vdupq_n_f32(0); + accumd = vdupq_n_f32(0); + + pIn = in; + + blkCnt = S->vectorDimension >> 2; + while (blkCnt > 0U) + { + + vec1 = vld1q_f32(pIn); + vec2a = vld1q_f32(pSupporta); + vec2b = vld1q_f32(pSupportb); + vec2c = vld1q_f32(pSupportc); + vec2d = vld1q_f32(pSupportd); + + pIn += 4; + pSupporta += 4; + pSupportb += 4; + pSupportc += 4; + pSupportd += 4; + + accuma = vmlaq_f32(accuma, vec1,vec2a); + accumb = vmlaq_f32(accumb, vec1,vec2b); + accumc = vmlaq_f32(accumc, vec1,vec2c); + accumd = vmlaq_f32(accumd, vec1,vec2d); + + blkCnt -- ; + } + accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma)); + dotV[0] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb)); + dotV[1] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc)); + dotV[2] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd)); + dotV[3] = accum2[0] + accum2[1]; + + + blkCnt = S->vectorDimension & 3; + while (blkCnt > 0U) + { + dotV[0] = dotV[0] + *pIn * *pSupporta++; + dotV[1] = dotV[1] + *pIn * *pSupportb++; + dotV[2] = dotV[2] + *pIn * *pSupportc++; + dotV[3] = dotV[3] + *pIn * *pSupportd++; + + pIn++; + + blkCnt -- ; + } + + vec1 = vld1q_f32(pDualCoefs); + pDualCoefs += 4; + + // To vectorize later + dotV = vmulq_n_f32(dotV, S->gamma); + dotV = vaddq_f32(dotV, coef0); + + dotV = arm_vec_exponent_f32(dotV,S->degree); + + accum = vmulq_f32(vec1,dotV); + accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); + sum += accum2[0] + accum2[1]; + + pSupporta += 3*S->vectorDimension; + pSupportb += 3*S->vectorDimension; + pSupportc += 3*S->vectorDimension; + pSupportd += 3*S->vectorDimension; + + vectorBlkCnt -- ; + } + + pSupport = pSupporta; + vectorBlkCnt = S->nbOfSupportVectors & 3; + + while (vectorBlkCnt > 0U) + { + accum = vdupq_n_f32(0); + dot = 0.0; + pIn = in; + + blkCnt = S->vectorDimension >> 2; + while (blkCnt > 0U) + { + + vec1 = vld1q_f32(pIn); + vec2 = vld1q_f32(pSupport); + pIn += 4; + pSupport += 4; + + accum = vmlaq_f32(accum, vec1,vec2); + + blkCnt -- ; + } + accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); + dot = accum2[0] + accum2[1]; + + + blkCnt = S->vectorDimension & 3; + while (blkCnt > 0U) + { + dot = dot + *pIn++ * *pSupport++; + + blkCnt -- ; + } + + sum += *pDualCoefs++ * arm_exponent_f32(S->gamma * dot + S->coef0, S->degree); + vectorBlkCnt -- ; + } + + *pResult=S->classes[STEP(sum)]; +} +#else +void arm_svm_polynomial_predict_f32( + const arm_svm_polynomial_instance_f32 *S, + const float32_t * in, + int * pResult) +{ + float32_t sum=S->intercept; + float32_t dot=0; + const float32_t *pSupport = S->supportVectors; + + for(int i=0; i < S->nbOfSupportVectors; i++) + { + dot=0; + for(int j=0; j < S->vectorDimension; j++) + { + dot = dot + in[j]* *pSupport++; + } + sum += S->dualCoefficients[i] * arm_exponent_f32(S->gamma * dot + S->coef0, S->degree); + } + + *pResult=S->classes[STEP(sum)]; +} +#endif + + +/** + * @} end of groupSVM group + */ diff --git a/Source/SVMFunctions/arm_svm_rbf_init_f32.c b/Source/SVMFunctions/arm_svm_rbf_init_f32.c new file mode 100755 index 00000000..14b7ae1d --- /dev/null +++ b/Source/SVMFunctions/arm_svm_rbf_init_f32.c @@ -0,0 +1,74 @@ +/* ---------------------------------------------------------------------- + * Project: CMSIS DSP Library + * Title: arm_svm_rbf_init_f32.c + * Description: SVM Radial Basis Function Instance Initialization + * + * + * Target Processor: Cortex-M cores + * -------------------------------------------------------------------- */ +/* + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_math.h" +#include +#include + + +/** + * @addtogroup groupSVM + * @{ + */ + + +/** + * @brief SVM radial basis function instance init function + * @param[in] nbOfSupportVectors Number of support vectors + * @param[in] vectorDimension Dimension of vector space + * @param[in] intercept Intercept + * @param[in] dualCoefficients Array of dual coefficients + * @param[in] supportVectors Array of support vectors + * @param[in] classes Array of 2 classes ID + * @param[in] gamma gamma (scikit-learn terminology) + * @return none. + * + */ + +void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, + uint32_t nbOfSupportVectors, + uint32_t vectorDimension, + float32_t intercept, + const float32_t *dualCoefficients, + const float32_t *supportVectors, + const int32_t *classes, + float32_t gamma + ) +{ + S->nbOfSupportVectors = nbOfSupportVectors; + S->vectorDimension = vectorDimension; + S->intercept = intercept; + S->dualCoefficients = dualCoefficients; + S->supportVectors = supportVectors; + S->classes = classes; + S->gamma = gamma; +} + + + +/** + * @} end of groupSVM group + */ diff --git a/Source/SVMFunctions/arm_svm_rbf_predict_f32.c b/Source/SVMFunctions/arm_svm_rbf_predict_f32.c new file mode 100755 index 00000000..dfce0062 --- /dev/null +++ b/Source/SVMFunctions/arm_svm_rbf_predict_f32.c @@ -0,0 +1,246 @@ +/* ---------------------------------------------------------------------- + * Project: CMSIS DSP Library + * Title: arm_svm_rbf_predict_f32.c + * Description: SVM Radial Basis Function Classifier + * + * + * Target Processor: Cortex-M cores + * -------------------------------------------------------------------- */ +/* + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_math.h" +#include +#include + + +/** + * @addtogroup groupSVM + * @{ + */ + + +/** + * @brief SVM rbf prediction + * @param[in] *S points to an instance of the rbf SVM structure. + * @param[in] vec_in pointer to input vector + * @param[out] *pResult decision value + * @return none. + * + */ +#if defined(ARM_MATH_NEON) + +#include "NEMath.h" + +void arm_svm_rbf_predict_f32( + const arm_svm_rbf_instance_f32 *S, + const float32_t * in, + int * pResult) +{ + float32_t sum = S->intercept; + + float32_t dot; + float32x4_t dotV; + + float32x4_t accuma,accumb,accumc,accumd,accum; + float32x2_t accum2; + float32x4_t temp; + float32x4_t vec1; + + float32x4_t vec2,vec2a,vec2b,vec2c,vec2d; + + uint32_t blkCnt; + uint32_t vectorBlkCnt; + + const float32_t *pIn = in; + + const float32_t *pSupport = S->supportVectors; + + const float32_t *pSupporta = S->supportVectors; + const float32_t *pSupportb; + const float32_t *pSupportc; + const float32_t *pSupportd; + + pSupportb = pSupporta + S->vectorDimension; + pSupportc = pSupportb + S->vectorDimension; + pSupportd = pSupportc + S->vectorDimension; + + const float32_t *pDualCoefs = S->dualCoefficients; + + + vectorBlkCnt = S->nbOfSupportVectors >> 2; + while (vectorBlkCnt > 0U) + { + accuma = vdupq_n_f32(0); + accumb = vdupq_n_f32(0); + accumc = vdupq_n_f32(0); + accumd = vdupq_n_f32(0); + + pIn = in; + + blkCnt = S->vectorDimension >> 2; + while (blkCnt > 0U) + { + + vec1 = vld1q_f32(pIn); + vec2a = vld1q_f32(pSupporta); + vec2b = vld1q_f32(pSupportb); + vec2c = vld1q_f32(pSupportc); + vec2d = vld1q_f32(pSupportd); + + pIn += 4; + pSupporta += 4; + pSupportb += 4; + pSupportc += 4; + pSupportd += 4; + + temp = vsubq_f32(vec1, vec2a); + accuma = vmlaq_f32(accuma, temp, temp); + + temp = vsubq_f32(vec1, vec2b); + accumb = vmlaq_f32(accumb, temp, temp); + + temp = vsubq_f32(vec1, vec2c); + accumc = vmlaq_f32(accumc, temp, temp); + + temp = vsubq_f32(vec1, vec2d); + accumd = vmlaq_f32(accumd, temp, temp); + + blkCnt -- ; + } + accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma)); + dotV[0] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb)); + dotV[1] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc)); + dotV[2] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd)); + dotV[3] = accum2[0] + accum2[1]; + + + blkCnt = S->vectorDimension & 3; + while (blkCnt > 0U) + { + dotV[0] = dotV[0] + SQ(*pIn - *pSupporta); + dotV[1] = dotV[1] + SQ(*pIn - *pSupportb); + dotV[2] = dotV[2] + SQ(*pIn - *pSupportc); + dotV[3] = dotV[3] + SQ(*pIn - *pSupportd); + pSupporta++; + pSupportb++; + pSupportc++; + pSupportd++; + + pIn++; + + blkCnt -- ; + } + + vec1 = vld1q_f32(pDualCoefs); + pDualCoefs += 4; + + // To vectorize later + dotV = vmulq_n_f32(dotV, -S->gamma); + dotV = vexpq_f32(dotV); + + accum = vmulq_f32(vec1,dotV); + accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); + sum += accum2[0] + accum2[1]; + + pSupporta += 3*S->vectorDimension; + pSupportb += 3*S->vectorDimension; + pSupportc += 3*S->vectorDimension; + pSupportd += 3*S->vectorDimension; + + vectorBlkCnt -- ; + } + + pSupport = pSupporta; + vectorBlkCnt = S->nbOfSupportVectors & 3; + + while (vectorBlkCnt > 0U) + { + accum = vdupq_n_f32(0); + dot = 0.0; + pIn = in; + + blkCnt = S->vectorDimension >> 2; + while (blkCnt > 0U) + { + + vec1 = vld1q_f32(pIn); + vec2 = vld1q_f32(pSupport); + pIn += 4; + pSupport += 4; + + temp = vsubq_f32(vec1,vec2); + accum = vmlaq_f32(accum, temp,temp); + + blkCnt -- ; + } + accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); + dot = accum2[0] + accum2[1]; + + + blkCnt = S->vectorDimension & 3; + while (blkCnt > 0U) + { + + dot = dot + SQ(*pIn - *pSupport); + pIn++; + pSupport++; + + blkCnt -- ; + } + + sum += *pDualCoefs++ * exp(-S->gamma * dot); + vectorBlkCnt -- ; + } + + *pResult=S->classes[STEP(sum)]; +} +#else +void arm_svm_rbf_predict_f32( + const arm_svm_rbf_instance_f32 *S, + const float32_t * in, + int * pResult) +{ + float32_t sum=S->intercept; + float32_t dot=0; + const float32_t *pSupport = S->supportVectors; + + for(int i=0; i < S->nbOfSupportVectors; i++) + { + dot=0; + for(int j=0; j < S->vectorDimension; j++) + { + dot = dot + SQ(in[j] - *pSupport); + pSupport++; + } + sum += S->dualCoefficients[i] * exp(-S->gamma * dot); + } + *pResult=S->classes[STEP(sum)]; +} +#endif + + +/** + * @} end of groupSVM group + */ diff --git a/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c b/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c new file mode 100755 index 00000000..61f6d361 --- /dev/null +++ b/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c @@ -0,0 +1,76 @@ +/* ---------------------------------------------------------------------- + * Project: CMSIS DSP Library + * Title: arm_svm_sigmoid_predict_f32.c + * Description: SVM Sigmoid Instance Initialization + * + * + * Target Processor: Cortex-M cores + * -------------------------------------------------------------------- */ +/* + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_math.h" +#include +#include + + +/** + * @addtogroup groupSVM + * @{ + */ + + +/** + * @brief SVM sigmoid instance init function + * @param[in] nbOfSupportVectors Number of support vectors + * @param[in] vectorDimension Dimension of vector space + * @param[in] intercept Intercept + * @param[in] dualCoefficients Array of dual coefficients + * @param[in] supportVectors Array of support vectors + * @param[in] classes Array of 2 classes ID + * @param[in] coef0 coeff0 (scikit-learn terminology) + * @param[in] gamma gamma (scikit-learn terminology) + * @return none. + * + */ + +void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, + uint32_t nbOfSupportVectors, + uint32_t vectorDimension, + float32_t intercept, + const float32_t *dualCoefficients, + const float32_t *supportVectors, + const int32_t *classes, + float32_t coef0, + float32_t gamma + ) +{ + S->nbOfSupportVectors = nbOfSupportVectors; + S->vectorDimension = vectorDimension; + S->intercept = intercept; + S->dualCoefficients = dualCoefficients; + S->supportVectors = supportVectors; + S->classes = classes; + S->coef0 = coef0; + S->gamma = gamma; +} + + +/** + * @} end of groupSVM group + */ diff --git a/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c b/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c new file mode 100755 index 00000000..25e9d81b --- /dev/null +++ b/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c @@ -0,0 +1,229 @@ +/* ---------------------------------------------------------------------- + * Project: CMSIS DSP Library + * Title: arm_svm_sigmoid_predict_f32.c + * Description: SVM Sigmoid Classifier + * + * + * Target Processor: Cortex-M cores + * -------------------------------------------------------------------- */ +/* + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_math.h" +#include +#include + +/** + * @addtogroup groupSVM + * @{ + */ + + + +/** + * @brief SVM sigmoid prediction + * @param[in] *S points to an instance of the rbf SVM structure. + * @param[in] vec_in pointer to input vector + * @param[out] *pResult decision value + * @return none. + * + */ +#if defined(ARM_MATH_NEON) +#include "NEMath.h" + +void arm_svm_sigmoid_predict_f32( + const arm_svm_sigmoid_instance_f32 *S, + const float32_t * in, + int * pResult) +{ + float32_t sum = S->intercept; + + float32_t dot; + float32x4_t dotV; + + float32x4_t accuma,accumb,accumc,accumd,accum; + float32x2_t accum2; + float32x4_t vec1; + float32x4_t coef0 = vdupq_n_f32(S->coef0); + + float32x4_t vec2,vec2a,vec2b,vec2c,vec2d; + + uint32_t blkCnt; + uint32_t vectorBlkCnt; + + const float32_t *pIn = in; + + const float32_t *pSupport = S->supportVectors; + + const float32_t *pSupporta = S->supportVectors; + const float32_t *pSupportb; + const float32_t *pSupportc; + const float32_t *pSupportd; + + pSupportb = pSupporta + S->vectorDimension; + pSupportc = pSupportb + S->vectorDimension; + pSupportd = pSupportc + S->vectorDimension; + + const float32_t *pDualCoefs = S->dualCoefficients; + + vectorBlkCnt = S->nbOfSupportVectors >> 2; + while (vectorBlkCnt > 0U) + { + accuma = vdupq_n_f32(0); + accumb = vdupq_n_f32(0); + accumc = vdupq_n_f32(0); + accumd = vdupq_n_f32(0); + + pIn = in; + + blkCnt = S->vectorDimension >> 2; + while (blkCnt > 0U) + { + + vec1 = vld1q_f32(pIn); + vec2a = vld1q_f32(pSupporta); + vec2b = vld1q_f32(pSupportb); + vec2c = vld1q_f32(pSupportc); + vec2d = vld1q_f32(pSupportd); + + pIn += 4; + pSupporta += 4; + pSupportb += 4; + pSupportc += 4; + pSupportd += 4; + + accuma = vmlaq_f32(accuma, vec1,vec2a); + accumb = vmlaq_f32(accumb, vec1,vec2b); + accumc = vmlaq_f32(accumc, vec1,vec2c); + accumd = vmlaq_f32(accumd, vec1,vec2d); + + blkCnt -- ; + } + accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma)); + dotV[0] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb)); + dotV[1] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc)); + dotV[2] = accum2[0] + accum2[1]; + + accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd)); + dotV[3] = accum2[0] + accum2[1]; + + + blkCnt = S->vectorDimension & 3; + while (blkCnt > 0U) + { + dotV[0] = dotV[0] + *pIn * *pSupporta++; + dotV[1] = dotV[1] + *pIn * *pSupportb++; + dotV[2] = dotV[2] + *pIn * *pSupportc++; + dotV[3] = dotV[3] + *pIn * *pSupportd++; + + pIn++; + + blkCnt -- ; + } + + vec1 = vld1q_f32(pDualCoefs); + pDualCoefs += 4; + + // To vectorize later + dotV = vmulq_n_f32(dotV, S->gamma); + dotV = vaddq_f32(dotV, coef0); + + dotV = vtanhq_f32(dotV); + + accum = vmulq_f32(vec1,dotV); + accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); + sum += accum2[0] + accum2[1]; + + pSupporta += 3*S->vectorDimension; + pSupportb += 3*S->vectorDimension; + pSupportc += 3*S->vectorDimension; + pSupportd += 3*S->vectorDimension; + + vectorBlkCnt -- ; + } + + pSupport = pSupporta; + vectorBlkCnt = S->nbOfSupportVectors & 3; + + while (vectorBlkCnt > 0U) + { + accum = vdupq_n_f32(0); + dot = 0.0; + pIn = in; + + blkCnt = S->vectorDimension >> 2; + while (blkCnt > 0U) + { + + vec1 = vld1q_f32(pIn); + vec2 = vld1q_f32(pSupport); + pIn += 4; + pSupport += 4; + + accum = vmlaq_f32(accum, vec1,vec2); + + blkCnt -- ; + } + accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); + dot = accum2[0] + accum2[1]; + + + blkCnt = S->vectorDimension & 3; + while (blkCnt > 0U) + { + dot = dot + *pIn++ * *pSupport++; + + blkCnt -- ; + } + + sum += *pDualCoefs++ * tanh(S->gamma * dot + S->coef0); + vectorBlkCnt -- ; + } + + *pResult=S->classes[STEP(sum)]; +} +#else +void arm_svm_sigmoid_predict_f32( + const arm_svm_sigmoid_instance_f32 *S, + const float32_t * in, + int * pResult) +{ + float32_t sum=S->intercept; + float32_t dot=0; + const float32_t *pSupport = S->supportVectors; + + for(int i=0; i < S->nbOfSupportVectors; i++) + { + dot=0; + for(int j=0; j < S->vectorDimension; j++) + { + dot = dot + in[j]* *pSupport++; + } + sum += S->dualCoefficients[i] * tanh(S->gamma * dot + S->coef0); + } + *pResult=S->classes[STEP(sum)]; +} + +#endif +/** + * @} end of groupSVM group + */ diff --git a/Source/configDsp.cmake b/Source/configDsp.cmake index 9f2ee990..ccdf5cba 100644 --- a/Source/configDsp.cmake +++ b/Source/configDsp.cmake @@ -18,4 +18,8 @@ if (MATRIXCHECK) target_compile_definitions(${project} PRIVATE ARM_MATH_MATRIX_CHECK) endif() +if (NEON OR NEONEXPERIMENTAL) + target_include_directories(${project} PRIVATE "${root}/CMSIS/DSP/ComputeLibrary/Include") +endif() + endfunction() \ No newline at end of file diff --git a/Testing/.gitignore b/Testing/.gitignore index 692a3209..e8d33c7b 100644 --- a/Testing/.gitignore +++ b/Testing/.gitignore @@ -2,6 +2,7 @@ bench/ build/ build_m7/ build_a5/ +build_m0/ build_sdsim_a5/ build_sdsim_a15/ build_m33/ diff --git a/Testing/CMakeLists.txt b/Testing/CMakeLists.txt index 4a074bbf..ec8a91f5 100644 --- a/Testing/CMakeLists.txt +++ b/Testing/CMakeLists.txt @@ -81,6 +81,9 @@ set(TESTSRC testmain.cpp Source/BasicTestsF32.cpp Source/BasicMathsBenchmarksF32.cpp Source/BasicMathsBenchmarksQ31.cpp + Source/BasicMathsBenchmarksQ15.cpp + Source/BasicMathsBenchmarksQ7.cpp + Source/SVMF32.cpp Source/FullyConnected.cpp Source/FullyConnectedBench.cpp GeneratedSource/TestDesc.cpp diff --git a/Testing/FrameworkSource/Timing.cpp b/Testing/FrameworkSource/Timing.cpp index 30bb6db3..15c0cbd3 100644 --- a/Testing/FrameworkSource/Timing.cpp +++ b/Testing/FrameworkSource/Timing.cpp @@ -2,7 +2,7 @@ #ifdef CORTEXM -#define JTEST_SYSTICK_INITIAL_VALUE 0xFFFFFF +#define SYSTICK_INITIAL_VALUE 0xFFFFFF static uint32_t startCycles=0; #if defined ARMCM0 @@ -64,8 +64,7 @@ void initCycleMeasurement() { #ifdef CORTEXM SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk; - SysTick->LOAD = JTEST_SYSTICK_INITIAL_VALUE; - SysTick->VAL = JTEST_SYSTICK_INITIAL_VALUE; + SysTick->LOAD = SYSTICK_INITIAL_VALUE; #endif #ifdef CORTEXA @@ -101,18 +100,10 @@ void cycleMeasurementStart() { #ifdef CORTEXM SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk; - SysTick->LOAD = JTEST_SYSTICK_INITIAL_VALUE; - SysTick->VAL = JTEST_SYSTICK_INITIAL_VALUE; + SysTick->LOAD = SYSTICK_INITIAL_VALUE; SysTick->CTRL = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk; - // In fast model at least, when we start the SysTick, VAL is temporarily - // switching to zero. If the benchmark is too quick - // VAL has no time to switch to JTEST_SYSTICK_INITIAL_VALUE - // and benchmarking value returned is JTEST_SYSTICK_INITIAL_VALUE - // instead of 0 - while(SysTick->VAL == 0); - startCycles = SysTick->VAL; #endif @@ -129,8 +120,7 @@ void cycleMeasurementStop() { #ifdef CORTEXM SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk; - SysTick->LOAD = JTEST_SYSTICK_INITIAL_VALUE; - SysTick->VAL = JTEST_SYSTICK_INITIAL_VALUE; + SysTick->LOAD = SYSTICK_INITIAL_VALUE; #endif } diff --git a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsF32/fullBenchmark.csv b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsF32/fullBenchmark.csv index 316349b5..f7a682cf 100644 --- a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsF32/fullBenchmark.csv +++ b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsF32/fullBenchmark.csv @@ -1,41 +1,41 @@ -CATEGORY,NAME,ID,NB,CYCLES,OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION -"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,16,297,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,32,369,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,64,513,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,128,801,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,256,1377,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,16,297,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,32,369,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,64,513,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,128,801,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,256,1377,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,16,297,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,32,369,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,64,513,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,128,801,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,256,1377,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,16,277,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,32,331,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,64,439,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,128,655,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,256,1087,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,16,222,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,32,276,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,64,384,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,128,600,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,256,1032,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,16,278,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,32,332,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,64,440,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,128,656,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,256,1088,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,16,278,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,32,332,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,64,440,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,128,656,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,256,1088,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,16,243,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,32,311,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,64,447,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,128,719,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,256,1263,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 +CATEGORY,NAME,ID,OLDID,NB,CYCLES,OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION +"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,"0",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,"0",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,"0",64,2528,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,"0",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,"0",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,"5",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,"5",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,"5",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,"5",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_add_f32",2,"5",256,2518,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,"10",16,2510,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,"10",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,"10",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,"10",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",3,"10",256,2554,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,"15",16,2457,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,"15",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,"15",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,"15",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",4,"15",256,2499,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,"20",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,"20",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,"20",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,"20",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",5,"20",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,"25",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,"25",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,"25",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,"25",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",6,"25",256,2518,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,"30",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,"30",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,"30",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,"30",128,2518,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",7,"30",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,"38",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,"38",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,"38",64,2510,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,"38",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",8,"38",256,2538,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 diff --git a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsF32/regression.csv b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsF32/regression.csv index dfc96e1b..532844c5 100644 --- a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsF32/regression.csv +++ b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsF32/regression.csv @@ -1,9 +1,9 @@ -"ID","CATEGORY","NAME","OPTIMIZED","HARDFP","FASTMATH","NEON","UNROLL","ROUNDING","PLATFORM","CORE","COMPILER","VERSION","Regression","MAX" -1,"DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"224.99999999999997 + NB * 4.499999999999998",1377 -2,"DSP:BasicMaths:BasicMathsF32","vec_add_f32",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"224.99999999999997 + NB * 4.499999999999998",1377 -3,"DSP:BasicMaths:BasicMathsF32","vec_sub_f32",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"224.99999999999997 + NB * 4.499999999999998",1377 -4,"DSP:BasicMaths:BasicMathsF32","vec_abs_f32",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"222.99999999999994 + NB * 3.3749999999999982",1087 -5,"DSP:BasicMaths:BasicMathsF32","vec_negate_f32",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"168.00000000000006 + NB * 3.374999999999999",1032 -6,"DSP:BasicMaths:BasicMathsF32","vec_offset_f32",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"223.99999999999994 + NB * 3.374999999999999",1088 -7,"DSP:BasicMaths:BasicMathsF32","vec_scale_f32",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"223.99999999999994 + NB * 3.374999999999999",1088 -8,"DSP:BasicMaths:BasicMathsF32","vec_dot_f32",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"175.0 + NB * 4.249999999999999",1263 +"ID","OLDID","CATEGORY","NAME","OPTIMIZED","HARDFP","FASTMATH","NEON","UNROLL","ROUNDING","PLATFORM","CORE","COMPILER","VERSION","Regression","MAX" +1,"0","DSP:BasicMaths:BasicMathsF32","vec_mult_f32",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"213.0 + NB * 1.4999999999999993",597 +2,"5","DSP:BasicMaths:BasicMathsF32","vec_add_f32",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"213.0 + NB * 1.4999999999999993",597 +3,"10","DSP:BasicMaths:BasicMathsF32","vec_sub_f32",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"213.0 + NB * 1.4999999999999993",597 +4,"15","DSP:BasicMaths:BasicMathsF32","vec_abs_f32",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"212.0 + NB * 1.2499999999999998",532 +5,"20","DSP:BasicMaths:BasicMathsF32","vec_negate_f32",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"177.0 + NB * 0.6249999999999998",337 +6,"25","DSP:BasicMaths:BasicMathsF32","vec_offset_f32",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"237.99999999999994 + NB * 0.6249999999999998",398 +7,"30","DSP:BasicMaths:BasicMathsF32","vec_scale_f32",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"237.99999999999994 + NB * 0.6249999999999998",398 +8,"38","DSP:BasicMaths:BasicMathsF32","vec_dot_f32",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"172.0 + NB * 1.4999999999999996",556 diff --git a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ15/fullBenchmark.csv b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ15/fullBenchmark.csv new file mode 100755 index 00000000..632587e7 --- /dev/null +++ b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ15/fullBenchmark.csv @@ -0,0 +1,41 @@ +CATEGORY,NAME,ID,OLDID,NB,CYCLES,OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION +"DSP:BasicMaths:BasicMathsQ15","vec_mult_q15",1,"3",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_mult_q15",1,"3",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_mult_q15",1,"3",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_mult_q15",1,"3",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_mult_q15",1,"3",256,2518,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_add_q15",2,"8",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_add_q15",2,"8",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_add_q15",2,"8",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_add_q15",2,"8",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_add_q15",2,"8",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_sub_q15",3,"13",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_sub_q15",3,"13",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_sub_q15",3,"13",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_sub_q15",3,"13",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_sub_q15",3,"13",256,2514,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_abs_q15",4,"18",16,2503,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_abs_q15",4,"18",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_abs_q15",4,"18",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_abs_q15",4,"18",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_abs_q15",4,"18",256,2493,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_negate_q15",5,"23",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_negate_q15",5,"23",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_negate_q15",5,"23",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_negate_q15",5,"23",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_negate_q15",5,"23",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_offset_q15",6,"28",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_offset_q15",6,"28",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_offset_q15",6,"28",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_offset_q15",6,"28",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_offset_q15",6,"28",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_scale_q15",7,"33",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_scale_q15",7,"33",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_scale_q15",7,"33",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_scale_q15",7,"33",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_scale_q15",7,"33",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_dot_q15",8,"41",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_dot_q15",8,"41",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_dot_q15",8,"41",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_dot_q15",8,"41",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ15","vec_dot_q15",8,"41",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 diff --git a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ15/regression.csv b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ15/regression.csv new file mode 100755 index 00000000..110e35a8 --- /dev/null +++ b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ15/regression.csv @@ -0,0 +1,9 @@ +"ID","OLDID","CATEGORY","NAME","OPTIMIZED","HARDFP","FASTMATH","NEON","UNROLL","ROUNDING","PLATFORM","CORE","COMPILER","VERSION","Regression","MAX" +1,"3","DSP:BasicMaths:BasicMathsQ15","vec_mult_q15",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.00000000000017 + NB * 6.249999999999997",1815 +2,"8","DSP:BasicMaths:BasicMathsQ15","vec_add_q15",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.00000000000006 + NB * 3.249999999999999",1047 +3,"13","DSP:BasicMaths:BasicMathsQ15","vec_sub_q15",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.00000000000006 + NB * 3.249999999999999",1047 +4,"18","DSP:BasicMaths:BasicMathsQ15","vec_abs_q15",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.00000000000017 + NB * 6.249999999999997",1815 +5,"23","DSP:BasicMaths:BasicMathsQ15","vec_negate_q15",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"160.00000000000003 + NB * 2.499999999999999",800 +6,"28","DSP:BasicMaths:BasicMathsQ15","vec_offset_q15",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.0 + NB * 2.499999999999999",855 +7,"33","DSP:BasicMaths:BasicMathsQ15","vec_scale_q15",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"221.0000000000001 + NB * 5.499999999999998",1629 +8,"41","DSP:BasicMaths:BasicMathsQ15","vec_dot_q15",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"170.00000000000006 + NB * 2.499999999999999",810 diff --git a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ31/fullBenchmark.csv b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ31/fullBenchmark.csv index 7fb8ea2e..34db42d4 100644 --- a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ31/fullBenchmark.csv +++ b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ31/fullBenchmark.csv @@ -1,41 +1,41 @@ -CATEGORY,NAME,ID,NB,CYCLES,OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION -"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,16,329,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,32,433,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,64,641,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,128,1057,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,256,1889,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,16,298,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,32,370,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,64,514,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,128,802,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,256,1378,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,16,298,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,32,370,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,64,514,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,128,802,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,256,1378,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,16,309,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,32,395,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,64,567,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,128,911,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,256,1599,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,16,224,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,32,278,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,64,386,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,128,602,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,256,1034,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,16,278,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,32,332,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,64,440,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,128,656,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,256,1088,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,16,375,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,32,515,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,64,795,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,128,1355,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,256,2475,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,16,311,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,32,429,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,64,665,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,128,1137,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,256,2081,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 +CATEGORY,NAME,ID,OLDID,NB,CYCLES,OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION +"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,"2",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,"2",32,2494,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,"2",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,"2",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,"2",256,2592,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,"7",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,"7",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,"7",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,"7",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",2,"7",256,2537,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,"12",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,"12",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,"12",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,"12",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",3,"12",256,2519,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,"17",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,"17",32,2520,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,"17",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,"17",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",4,"17",256,2505,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,"22",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,"22",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,"22",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,"22",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",5,"22",256,2518,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,"27",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,"27",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,"27",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,"27",128,2483,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",6,"27",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,"32",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,"32",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,"32",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,"32",128,2548,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",7,"32",256,2520,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,"40",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,"40",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,"40",64,2639,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,"40",128,2527,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",8,"40",256,2573,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 diff --git a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ31/regression.csv b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ31/regression.csv index 632a75a5..581f60de 100644 --- a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ31/regression.csv +++ b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ31/regression.csv @@ -1,9 +1,9 @@ -"ID","CATEGORY","NAME","OPTIMIZED","HARDFP","FASTMATH","NEON","UNROLL","ROUNDING","PLATFORM","CORE","COMPILER","VERSION","Regression","MAX" -1,"DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"225.00000000000003 + NB * 6.499999999999997",1889 -2,"DSP:BasicMaths:BasicMathsQ31","vec_add_q31",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"226.0 + NB * 4.499999999999998",1378 -3,"DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"226.0 + NB * 4.499999999999998",1378 -4,"DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"223.00000000000003 + NB * 5.374999999999997",1599 -5,"DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"170.0 + NB * 3.3749999999999982",1034 -6,"DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"223.99999999999994 + NB * 3.374999999999999",1088 -7,"DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"235.00000000000006 + NB * 8.749999999999996",2475 -8,"DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",1,1,1,1,1,0,"YaminFVP","ARMCM33_DSP_FP","AC6",6120001,"193.00000000000009 + NB * 7.374999999999998",2081 +"ID","OLDID","CATEGORY","NAME","OPTIMIZED","HARDFP","FASTMATH","NEON","UNROLL","ROUNDING","PLATFORM","CORE","COMPILER","VERSION","Regression","MAX" +1,"2","DSP:BasicMaths:BasicMathsQ31","vec_mult_q31",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"214.00000000000023 + NB * 7.2499999999999964",2070 +2,"7","DSP:BasicMaths:BasicMathsQ31","vec_add_q31",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"214.0000000000001 + NB * 5.249999999999998",1558 +3,"12","DSP:BasicMaths:BasicMathsQ31","vec_sub_q31",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"214.0000000000001 + NB * 5.249999999999998",1558 +4,"17","DSP:BasicMaths:BasicMathsQ31","vec_abs_q31",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.41666666666674 + NB * 5.741767473118277",1686 +5,"22","DSP:BasicMaths:BasicMathsQ31","vec_negate_q31",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"160.0000000000001 + NB * 3.9999999999999982",1184 +6,"27","DSP:BasicMaths:BasicMathsQ31","vec_offset_q31",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.0000000000001 + NB * 3.9999999999999987",1239 +7,"32","DSP:BasicMaths:BasicMathsQ31","vec_scale_q31",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"264.00000000000034 + NB * 12.124999999999996",3368 +8,"40","DSP:BasicMaths:BasicMathsQ31","vec_dot_q31",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"192.0 + NB * 1.4999999999999993",576 diff --git a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ7/fullBenchmark.csv b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ7/fullBenchmark.csv new file mode 100755 index 00000000..7d5c9f18 --- /dev/null +++ b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ7/fullBenchmark.csv @@ -0,0 +1,41 @@ +CATEGORY,NAME,ID,OLDID,NB,CYCLES,OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION +"DSP:BasicMaths:BasicMathsQ7","vec_mult_q7",1,"4",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_mult_q7",1,"4",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_mult_q7",1,"4",64,2491,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_mult_q7",1,"4",128,2556,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_mult_q7",1,"4",256,2499,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_add_q7",2,"9",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_add_q7",2,"9",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_add_q7",2,"9",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_add_q7",2,"9",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_add_q7",2,"9",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_sub_q7",3,"14",16,2498,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_sub_q7",3,"14",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_sub_q7",3,"14",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_sub_q7",3,"14",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_sub_q7",3,"14",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_abs_q7",4,"19",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_abs_q7",4,"19",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_abs_q7",4,"19",64,2515,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_abs_q7",4,"19",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_abs_q7",4,"19",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_negate_q7",5,"24",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_negate_q7",5,"24",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_negate_q7",5,"24",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_negate_q7",5,"24",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_negate_q7",5,"24",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_offset_q7",6,"29",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_offset_q7",6,"29",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_offset_q7",6,"29",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_offset_q7",6,"29",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_offset_q7",6,"29",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_scale_q7",7,"34",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_scale_q7",7,"34",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_scale_q7",7,"34",64,2508,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_scale_q7",7,"34",128,2534,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_scale_q7",7,"34",256,2522,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_dot_q7",8,"42",16,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_dot_q7",8,"42",32,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_dot_q7",8,"42",64,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_dot_q7",8,"42",128,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"DSP:BasicMaths:BasicMathsQ7","vec_dot_q7",8,"42",256,0,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 diff --git a/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ7/regression.csv b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ7/regression.csv new file mode 100755 index 00000000..b1868aaa --- /dev/null +++ b/Testing/FullBenchmark/DSP/BasicMaths/BasicMathsQ7/regression.csv @@ -0,0 +1,9 @@ +"ID","OLDID","CATEGORY","NAME","OPTIMIZED","HARDFP","FASTMATH","NEON","UNROLL","ROUNDING","PLATFORM","CORE","COMPILER","VERSION","Regression","MAX" +1,"4","DSP:BasicMaths:BasicMathsQ7","vec_mult_q7",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.00000000000017 + NB * 7.4999999999999964",2135 +2,"9","DSP:BasicMaths:BasicMathsQ7","vec_add_q7",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"214.0 + NB * 1.4999999999999998",598 +3,"14","DSP:BasicMaths:BasicMathsQ7","vec_sub_q7",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"214.0 + NB * 1.4999999999999998",598 +4,"19","DSP:BasicMaths:BasicMathsQ7","vec_abs_q7",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"215.75000000000017 + NB * 6.250504032258062",1815 +5,"24","DSP:BasicMaths:BasicMathsQ7","vec_negate_q7",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"159.0 + NB * 1.2499999999999996",479 +6,"29","DSP:BasicMaths:BasicMathsQ7","vec_offset_q7",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"220.0 + NB * 1.2499999999999996",540 +7,"34","DSP:BasicMaths:BasicMathsQ7","vec_scale_q7",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"221.00000000000017 + NB * 6.249999999999998",1821 +8,"42","DSP:BasicMaths:BasicMathsQ7","vec_dot_q7",1,1,1,1,1,0,"FVP","ARMCA5","AC6",6120001,"168.00000000000003 + NB * 2.499999999999999",808 diff --git a/Testing/FullBenchmark/NN/FullyConnected/fullBenchmark.csv b/Testing/FullBenchmark/NN/FullyConnected/fullBenchmark.csv index ce7740af..47168df3 100644 --- a/Testing/FullBenchmark/NN/FullyConnected/fullBenchmark.csv +++ b/Testing/FullBenchmark/NN/FullyConnected/fullBenchmark.csv @@ -1,5 +1,5 @@ -CATEGORY,ID,REPEAT,CYCLES,OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION -"NN:FullyConnected",1,10,6235,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"NN:FullyConnected",1,20,12085,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"NN:FullyConnected",1,100,58885,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 -"NN:FullyConnected",1,200,117385,1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 +CATEGORY,NAME,ID,OLDID,REPEAT,CYCLES,OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION +"NN:FullyConnected","test_fully_connected_tflite_s8",1,"",10,5004,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"NN:FullyConnected","test_fully_connected_tflite_s8",1,"",20,12519,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"NN:FullyConnected","test_fully_connected_tflite_s8",1,"",100,67496,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 +"NN:FullyConnected","test_fully_connected_tflite_s8",1,"",200,130049,1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 diff --git a/Testing/GeneratedInclude/BasicMathsBenchmarksQ15_decl.h b/Testing/GeneratedInclude/BasicMathsBenchmarksQ15_decl.h new file mode 100755 index 00000000..4ca1fa56 --- /dev/null +++ b/Testing/GeneratedInclude/BasicMathsBenchmarksQ15_decl.h @@ -0,0 +1,25 @@ +void vec_mult_q15(); +void vec_add_q15(); +void vec_sub_q15(); +void vec_abs_q15(); +void vec_negate_q15(); +void vec_offset_q15(); +void vec_scale_q15(); +void vec_dot_q15(); + +// Pattern IDs +static const int INPUT1_Q15_ID=0; +static const int INPUT2_Q15_ID=1; + +// Output IDs +static const int OUT_SAMPLES_Q15_ID=0; + +// Test IDs +static const int VEC_MULT_Q15_1=1; +static const int VEC_ADD_Q15_2=2; +static const int VEC_SUB_Q15_3=3; +static const int VEC_ABS_Q15_4=4; +static const int VEC_NEGATE_Q15_5=5; +static const int VEC_OFFSET_Q15_6=6; +static const int VEC_SCALE_Q15_7=7; +static const int VEC_DOT_Q15_8=8; diff --git a/Testing/GeneratedInclude/BasicMathsBenchmarksQ7_decl.h b/Testing/GeneratedInclude/BasicMathsBenchmarksQ7_decl.h new file mode 100755 index 00000000..814c2f87 --- /dev/null +++ b/Testing/GeneratedInclude/BasicMathsBenchmarksQ7_decl.h @@ -0,0 +1,25 @@ +void vec_mult_q7(); +void vec_add_q7(); +void vec_sub_q7(); +void vec_abs_q7(); +void vec_negate_q7(); +void vec_offset_q7(); +void vec_scale_q7(); +void vec_dot_q7(); + +// Pattern IDs +static const int INPUT1_Q7_ID=0; +static const int INPUT2_Q7_ID=1; + +// Output IDs +static const int OUT_SAMPLES_Q7_ID=0; + +// Test IDs +static const int VEC_MULT_Q7_1=1; +static const int VEC_ADD_Q7_2=2; +static const int VEC_SUB_Q7_3=3; +static const int VEC_ABS_Q7_4=4; +static const int VEC_NEGATE_Q7_5=5; +static const int VEC_OFFSET_Q7_6=6; +static const int VEC_SCALE_Q7_7=7; +static const int VEC_DOT_Q7_8=8; diff --git a/Testing/GeneratedInclude/FullyConnectedBench_decl.h b/Testing/GeneratedInclude/FullyConnectedBench_decl.h index 3ce636bd..369c0005 100644 --- a/Testing/GeneratedInclude/FullyConnectedBench_decl.h +++ b/Testing/GeneratedInclude/FullyConnectedBench_decl.h @@ -2,13 +2,13 @@ void test_fully_connected_tflite_s8(); // Pattern IDs static const int INPUT1_S8_ID=0; -static const int BIAS_S8_ID=1; -static const int WEIGHT_S8_ID=2; +static const int BIAS1_S8_ID=1; +static const int WEIGHT1_S8_ID=2; static const int REF1_S8_ID=3; // Output IDs -static const int OUTPUT1_S8_ID=0; -static const int TEMP1_S16_ID=1; +static const int OUTPUT_S8_ID=0; +static const int TEMP_S16_ID=1; // Test IDs static const int TEST_FULLY_CONNECTED_TFLITE_S8_1=1; diff --git a/Testing/GeneratedInclude/FullyConnected_decl.h b/Testing/GeneratedInclude/FullyConnected_decl.h index 365a9c28..be10a7c2 100644 --- a/Testing/GeneratedInclude/FullyConnected_decl.h +++ b/Testing/GeneratedInclude/FullyConnected_decl.h @@ -5,94 +5,66 @@ static const int INPUT1_S8_ID=0; static const int BIAS1_S8_ID=1; static const int WEIGHT1_S8_ID=2; static const int REF1_S8_ID=3; -static const int INPUT19_S8_ID=4; -static const int BIAS19_S8_ID=5; -static const int WEIGHT19_S8_ID=6; -static const int REF19_S8_ID=7; -static const int INPUT2_S8_ID=8; -static const int BIAS2_S8_ID=9; -static const int WEIGHT2_S8_ID=10; -static const int REF2_S8_ID=11; -static const int INPUT3_S8_ID=12; -static const int BIAS3_S8_ID=13; -static const int WEIGHT3_S8_ID=14; -static const int REF3_S8_ID=15; -static const int INPUT4_S8_ID=16; -static const int BIAS4_S8_ID=17; -static const int WEIGHT4_S8_ID=18; -static const int REF4_S8_ID=19; -static const int INPUT5_S8_ID=20; -static const int BIAS5_S8_ID=21; -static const int WEIGHT5_S8_ID=22; -static const int REF5_S8_ID=23; -static const int INPUT6_S8_ID=24; -static const int BIAS6_S8_ID=25; -static const int WEIGHT6_S8_ID=26; -static const int REF6_S8_ID=27; -static const int INPUT7_S8_ID=28; -static const int BIAS7_S8_ID=29; -static const int WEIGHT7_S8_ID=30; -static const int REF7_S8_ID=31; -static const int INPUT8_S8_ID=32; -static const int BIAS8_S8_ID=33; -static const int WEIGHT8_S8_ID=34; -static const int REF8_S8_ID=35; -static const int INPUT9_S8_ID=36; -static const int BIAS9_S8_ID=37; -static const int WEIGHT9_S8_ID=38; -static const int REF9_S8_ID=39; -static const int INPUT10_S8_ID=40; -static const int BIAS10_S8_ID=41; -static const int WEIGHT10_S8_ID=42; -static const int REF10_S8_ID=43; -static const int INPUT11_S8_ID=44; -static const int BIAS11_S8_ID=45; -static const int WEIGHT11_S8_ID=46; -static const int REF11_S8_ID=47; -static const int INPUT12_S8_ID=48; -static const int BIAS12_S8_ID=49; -static const int WEIGHT12_S8_ID=50; -static const int REF12_S8_ID=51; -static const int INPUT13_S8_ID=52; -static const int BIAS13_S8_ID=53; -static const int WEIGHT13_S8_ID=54; -static const int REF13_S8_ID=55; -static const int INPUT14_S8_ID=56; -static const int BIAS14_S8_ID=57; -static const int WEIGHT14_S8_ID=58; -static const int REF14_S8_ID=59; +static const int INPUT2_S8_ID=4; +static const int BIAS2_S8_ID=5; +static const int WEIGHT2_S8_ID=6; +static const int REF2_S8_ID=7; +static const int INPUT3_S8_ID=8; +static const int BIAS3_S8_ID=9; +static const int WEIGHT3_S8_ID=10; +static const int REF3_S8_ID=11; +static const int INPUT4_S8_ID=12; +static const int BIAS4_S8_ID=13; +static const int WEIGHT4_S8_ID=14; +static const int REF4_S8_ID=15; +static const int INPUT5_S8_ID=16; +static const int BIAS5_S8_ID=17; +static const int WEIGHT5_S8_ID=18; +static const int REF5_S8_ID=19; +static const int INPUT6_S8_ID=20; +static const int BIAS6_S8_ID=21; +static const int WEIGHT6_S8_ID=22; +static const int REF6_S8_ID=23; +static const int INPUT7_S8_ID=24; +static const int BIAS7_S8_ID=25; +static const int WEIGHT7_S8_ID=26; +static const int REF7_S8_ID=27; +static const int INPUT8_S8_ID=28; +static const int BIAS8_S8_ID=29; +static const int WEIGHT8_S8_ID=30; +static const int REF8_S8_ID=31; +static const int INPUT9_S8_ID=32; +static const int BIAS9_S8_ID=33; +static const int WEIGHT9_S8_ID=34; +static const int REF9_S8_ID=35; +static const int INPUT10_S8_ID=36; +static const int BIAS10_S8_ID=37; +static const int WEIGHT10_S8_ID=38; +static const int REF10_S8_ID=39; +static const int INPUT11_S8_ID=40; +static const int BIAS11_S8_ID=41; +static const int WEIGHT11_S8_ID=42; +static const int REF11_S8_ID=43; +static const int INPUT12_S8_ID=44; +static const int BIAS12_S8_ID=45; +static const int WEIGHT12_S8_ID=46; +static const int REF12_S8_ID=47; +static const int INPUT13_S8_ID=48; +static const int BIAS13_S8_ID=49; +static const int WEIGHT13_S8_ID=50; +static const int REF13_S8_ID=51; +static const int INPUT14_S8_ID=52; +static const int BIAS14_S8_ID=53; +static const int WEIGHT14_S8_ID=54; +static const int REF14_S8_ID=55; +static const int INPUT15_S8_ID=56; +static const int BIAS15_S8_ID=57; +static const int WEIGHT15_S8_ID=58; +static const int REF15_S8_ID=59; // Output IDs -static const int OUTPUT1_S8_ID=0; -static const int TEMP1_S16_ID=1; -static const int OUTPUT19_S8_ID=2; -static const int TEMP19_S16_ID=3; -static const int OUTPUT2_S8_ID=4; -static const int TEMP2_S16_ID=5; -static const int OUTPUT3_S8_ID=6; -static const int TEMP3_S16_ID=7; -static const int OUTPUT4_S8_ID=8; -static const int TEMP4_S16_ID=9; -static const int OUTPUT5_S8_ID=10; -static const int TEMP5_S16_ID=11; -static const int OUTPUT6_S8_ID=12; -static const int TEMP6_S16_ID=13; -static const int OUTPUT7_S8_ID=14; -static const int TEMP7_S16_ID=15; -static const int OUTPUT8_S8_ID=16; -static const int TEMP8_S16_ID=17; -static const int OUTPUT9_S8_ID=18; -static const int TEMP9_S16_ID=19; -static const int OUTPUT10_S8_ID=20; -static const int TEMP10_S16_ID=21; -static const int OUTPUT11_S8_ID=22; -static const int TEMP11_S16_ID=23; -static const int OUTPUT12_S8_ID=24; -static const int TEMP12_S16_ID=25; -static const int OUTPUT13_S8_ID=26; -static const int TEMP13_S16_ID=27; -static const int OUTPUT14_S8_ID=28; -static const int TEMP14_S16_ID=29; +static const int OUTPUT_S8_ID=0; +static const int TEMP_S16_ID=1; // Test IDs static const int TEST_FULLY_CONNECTED_TFLITE_S8_1=1; diff --git a/Testing/GeneratedInclude/Patterns.h b/Testing/GeneratedInclude/Patterns.h index 62182ed2..1d1725f0 100644 --- a/Testing/GeneratedInclude/Patterns.h +++ b/Testing/GeneratedInclude/Patterns.h @@ -1,7 +1,10430 @@ #ifndef _PATTERNS_H_ #define _PATTERNS_H_ __ALIGNED(8) const char patterns[]={ -// Patterns/NN/FullyConnected/TestCase_1_10_4_input_1.txt +// Patterns\DSP\BasicMaths\BasicMathsF32\Input1_f32.txt +15,152,74,61, +121,218,11,63, +157,235,194,61, +10,166,174,61, +175,34,71,190, +253,127,215,188, +38,114,159,189, +115,86,243,188, +39,69,117,187, +233,191,153,62, +173,174,146,191, +217,165,9,63, +62,244,189,190, +46,90,125,188, +35,67,169,62, +146,247,11,63, +46,159,236,61, +186,81,23,190, +101,53,120,191, +183,86,142,62, +201,101,19,61, +109,219,232,60, +71,131,10,191, +137,193,249,189, +88,39,179,190, +7,188,246,62, +169,211,138,190, +147,170,84,190, +158,233,5,63, +136,5,93,63, +176,25,65,61, +210,187,161,190, +82,174,202,62, +17,57,167,62, +220,96,232,62, +69,200,32,191, +168,94,22,62, +209,103,171,190, +63,249,28,62, +68,71,43,191, +32,143,228,190, +101,116,80,63, +0,0,128,63, +254,132,84,191, +16,109,44,63, +226,195,218,60, +247,83,117,189, +198,224,62,191, +123,218,100,61, +147,12,62,190, +239,186,241,62, +210,252,8,62, +28,202,250,189, +233,187,107,190, +19,145,4,63, +138,184,240,190, +41,26,252,62, +10,159,15,191, +121,122,151,61, +204,250,88,190, +96,80,253,190, +131,193,32,189, +230,236,191,190, +31,225,186,189, +173,213,62,61, +21,134,170,190, +155,176,212,62, +71,30,169,61, +112,131,12,62, +176,80,37,187, +251,186,133,190, +91,255,12,191, +180,90,198,61, +17,248,42,63, +10,150,142,189, +128,139,39,190, +169,127,35,63, +13,89,26,191, +107,237,34,62, +44,0,239,62, +183,163,162,190, +110,0,201,189, +104,128,173,62, +122,195,17,190, +186,71,13,190, +73,110,177,190, +250,21,119,62, +146,202,46,190, +81,161,254,190, +86,119,144,62, +194,227,99,62, +171,81,143,62, +255,220,79,60, +127,192,153,190, +134,101,84,63, +142,58,151,190, +230,101,186,60, +70,113,2,191, +89,88,177,187, +84,154,249,62, +183,23,76,190, +226,77,110,190, +142,198,178,62, +242,24,179,190, +12,126,10,63, +207,101,9,190, +73,64,149,190, +234,54,18,62, +190,91,46,191, +8,212,140,190, +220,161,146,61, +71,182,66,191, +211,55,97,63, +74,161,136,62, +14,33,11,190, +108,25,196,62, +225,22,49,62, +82,198,251,62, +158,164,155,62, +223,143,241,62, +157,166,90,62, +69,148,31,191, +78,197,71,190, +185,130,45,61, +117,135,100,190, +37,246,101,61, +93,233,197,61, +27,188,139,190, +72,78,10,191, +161,77,108,190, +33,207,195,61, +64,212,34,61, +64,151,60,62, +95,88,70,63, +58,145,16,191, +182,113,104,190, +22,173,143,190, +234,20,219,190, +10,249,80,190, +208,249,44,190, +113,137,229,190, +53,5,134,190, +31,235,11,191, +181,86,205,62, +90,27,61,191, +195,119,233,62, +197,119,2,62, +230,190,126,61, +65,188,191,190, +186,86,210,62, +78,142,66,63, +58,18,58,190, +221,62,105,190, +147,215,185,62, +60,228,127,188, +250,180,197,190, +45,174,115,190, +100,40,26,63, +237,240,44,61, +197,82,155,189, +132,234,215,190, +7,109,157,60, +83,42,135,188, +177,217,132,188, +190,117,215,189, +47,157,149,190, +180,145,136,62, +252,207,5,63, +217,192,7,63, +89,133,223,190, +223,195,1,190, +88,129,121,190, +224,131,29,62, +12,159,131,189, +212,177,107,62, +197,72,80,191, +237,179,204,62, +31,177,254,190, +195,138,127,62, +238,112,157,190, +119,62,179,190, +194,142,227,61, +56,218,215,62, +204,146,32,191, +213,59,12,191, +252,139,81,62, +53,225,27,190, +178,163,33,62, +61,213,189,59, +197,247,67,191, +156,94,1,191, +200,118,61,62, +213,246,9,191, +130,127,21,62, +231,212,125,62, +154,178,243,190, +7,213,139,190, +22,5,135,190, +27,102,77,62, +71,185,151,61, +51,168,27,62, +100,77,92,62, +157,96,41,191, +164,238,244,61, +17,157,49,191, +15,135,108,188, +229,183,208,190, +4,31,146,62, +166,172,244,62, +100,188,135,61, +214,141,181,187, +246,42,28,190, +137,79,101,190, +221,92,231,62, +209,184,160,62, +85,149,12,191, +93,45,196,60, +173,32,13,191, +146,156,60,190, +61,158,142,62, +0,189,10,190, +96,150,187,190, +146,204,59,190, +83,16,30,63, +211,136,147,190, +158,32,199,190, +102,97,42,190, +5,163,215,189, +22,75,161,190, +234,227,128,61, +198,156,42,190, +59,99,7,63, +202,189,23,190, +20,150,83,190, +89,186,25,191, +190,94,245,189, +131,115,11,189, +143,125,170,59, +16,236,36,62, +209,167,13,61, +114,148,184,188, +192,206,153,189, +13,72,173,61, +20,5,49,62, +109,27,137,191, +124,102,122,190, +83,170,214,62, +199,236,37,62, +22,31,29,63, +160,10,158,62, +83,244,125,191, +250,64,180,190, +113,127,204,62, +67,147,51,62, +247,121,26,63, +92,4,55,61, +// Patterns\DSP\BasicMaths\BasicMathsF32\Input2_f32.txt +184,38,150,60, +141,77,79,62, +200,118,16,61, +144,112,1,61, +135,150,147,189, +104,183,31,188, +57,88,236,188, +35,89,52,188, +200,199,181,186, +178,230,227,61, +228,108,217,190, +158,8,76,62, +132,200,12,190, +58,197,187,187, +49,229,250,61, +174,120,79,62, +233,94,47,61, +113,76,96,189, +77,245,183,190, +166,252,210,61, +80,124,90,60, +161,148,44,60, +214,80,77,190, +230,26,57,189, +83,199,4,190, +158,221,54,62, +253,199,205,189, +197,157,157,189, +52,127,70,62, +11,207,163,62, +118,29,143,60, +92,188,239,189, +56,55,22,62, +85,223,247,61, +203,57,44,62, +88,83,110,190, +35,228,94,61, +126,18,254,189, +21,174,104,61, +63,226,125,190, +38,101,41,190, +175,126,154,62, +151,187,189,62, +234,129,157,190, +189,149,127,62, +236,34,34,60, +195,210,181,188, +209,119,141,190, +255,156,169,60, +140,218,140,189, +36,40,51,62, +17,14,75,61, +252,222,57,189, +120,182,174,189, +127,128,68,62, +163,104,50,190, +13,216,58,62, +81,227,84,190, +214,136,224,60, +40,208,160,189, +246,189,59,190, +84,73,110,188, +137,62,14,190, +37,129,10,189, +152,111,141,60, +228,195,252,189, +61,162,29,62, +142,174,250,60, +2,72,80,61, +107,11,117,186, +19,58,198,189, +176,255,80,190, +80,2,19,61, +218,108,125,62, +130,90,211,188, +135,89,120,189, +29,90,114,62, +178,201,100,190, +88,129,113,61, +67,34,49,62, +24,20,241,189, +155,248,20,189, +240,150,0,62, +66,16,88,189, +247,106,81,189, +112,128,3,190, +73,32,183,61, +163,139,129,189, +175,183,60,190, +237,35,214,61, +36,230,168,61, +161,112,212,61, +122,14,154,59, +144,231,227,189, +152,106,157,62, +24,42,224,189, +209,37,10,60, +109,90,65,190, +46,112,3,187, +215,253,56,62, +16,67,151,189, +31,158,176,189, +151,127,4,62, +168,188,4,190, +21,73,77,62, +176,169,75,189, +168,59,221,189, +94,187,88,61, +128,57,129,190, +120,191,208,189, +229,89,217,60, +65,79,144,190, +64,235,166,62, +100,134,202,61, +181,58,78,189, +119,86,17,62, +168,63,131,61, +233,153,58,62, +44,181,230,61, +58,8,51,62, +59,13,162,61, +205,138,108,190, +14,15,148,189, +167,152,128,60, +119,95,169,189, +60,111,170,60, +80,174,18,61, +138,32,207,189, +72,2,77,190, +120,34,175,189, +103,31,17,61, +9,92,113,60, +220,197,139,61, +150,0,147,62, +79,74,86,190, +72,70,172,189, +35,248,212,189, +250,94,34,190, +253,224,154,189, +47,51,128,189, +172,30,42,190, +26,168,198,189, +59,102,79,190, +123,47,24,62, +196,39,140,190, +127,8,45,62, +14,100,65,61, +156,205,188,60, +124,26,14,190, +41,228,27,62, +160,49,144,62, +206,231,137,189, +84,222,172,189, +86,188,9,62, +3,167,189,187, +125,135,18,190, +40,154,180,189, +145,129,100,62, +153,44,128,60, +217,59,230,188, +91,6,32,190, +180,89,233,59, +151,90,200,187, +35,236,196,187, +208,175,31,189, +92,197,221,189, +74,111,202,61, +54,89,70,62, +180,57,73,62, +61,169,37,190, +101,89,64,189, +83,235,184,189, +146,123,105,61, +189,25,195,188, +0,175,174,61, +89,94,154,190, +214,182,23,62, +102,195,60,190, +180,100,189,61, +125,95,233,189, +118,216,4,190, +37,167,40,61, +71,250,31,62, +22,4,110,190, +222,221,79,190, +230,77,155,61, +252,14,103,189, +154,152,111,61, +137,177,12,59, +134,61,145,190, +75,195,63,190, +135,107,140,61, +168,128,76,190, +94,153,93,61, +47,32,188,61, +111,157,52,190, +123,69,207,189, +100,35,200,189, +229,58,152,61, +239,229,224,60, +123,186,102,61, +146,70,163,61, +227,16,123,190, +170,135,53,61, +28,163,131,190, +8,77,175,187, +182,176,26,190, +242,151,216,61, +193,86,53,62, +25,51,201,60, +193,142,6,187, +78,124,103,189, +192,243,169,189, +24,121,43,62, +112,60,238,61, +136,98,80,190, +63,101,17,60, +20,49,81,190, +205,201,139,189, +170,102,211,61, +101,166,77,189, +122,7,11,190, +165,47,139,189, +194,75,106,62, +64,176,218,189, +255,148,19,190, +132,141,124,189, +94,209,31,189, +65,21,239,189, +109,13,191,60, +135,229,124,189, +240,174,72,62, +158,236,96,189, +216,208,156,189, +116,222,99,190, +192,218,53,189, +239,180,78,188, +67,183,252,58, +67,118,116,61, +101,249,81,60, +218,204,8,188, +178,252,227,188, +44,109,0,61, +119,50,131,61, +110,59,203,190, +38,149,185,189, +13,25,31,62, +201,242,117,61, +43,230,104,62, +78,67,234,61, +120,55,188,190, +15,152,5,190, +241,143,23,62, +79,23,133,61, +123,250,100,62, +84,164,135,60, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference1_f32.txt +181,213,138,61, +221,173,63,63, +128,147,5,62, +82,94,239,61, +249,118,136,190, +216,173,19,189, +52,136,218,189, +130,193,38,189, +133,20,168,187, +149,185,210,62, +230,9,201,191, +1,168,60,63, +64,44,2,191, +101,158,173,188, +111,252,231,62, +189,213,63,63, +81,39,34,62, +214,100,79,190, +6,24,170,191, +225,21,195,62, +221,4,74,61, +223,146,31,61, +124,215,61,191, +126,39,43,190, +1,139,245,190, +107,21,41,63, +169,69,190,190, +187,188,145,190, +107,137,55,63, +135,118,151,63, +53,84,132,61, +233,170,221,190, +247,228,10,63, +230,48,229,62, +225,62,31,63, +27,93,92,191, +177,23,78,62, +112,236,234,190, +197,36,87,62, +212,191,106,191, +217,160,28,191, +222,217,142,63, +230,110,175,63, +249,162,145,191, +128,82,108,63, +172,234,21,61, +172,30,168,189, +88,206,130,191, +125,212,156,61, +237,60,130,190, +128,167,37,63, +86,192,59,62, +205,220,43,190, +147,139,161,190, +51,177,53,63, +110,246,36,191, +24,195,44,63, +222,215,68,191, +174,156,207,61, +112,177,148,190, +173,151,45,191, +216,83,92,189, +21,134,3,191, +217,16,0,190, +189,198,130,61, +14,183,233,190, +221,192,17,63, +234,201,231,61, +113,149,64,62, +139,147,98,187, +127,73,183,190, +71,63,65,191, +238,237,7,62, +72,83,106,63, +171,108,195,189, +226,161,101,190, +48,22,96,63, +121,139,83,191, +193,77,95,62, +167,200,35,63, +189,232,222,190, +94,190,9,190, +224,203,237,62, +138,199,71,190, +120,162,65,190, +129,46,243,190, +15,83,169,62, +99,144,111,190, +149,126,46,191, +81,0,198,62, +106,43,156,62, +212,109,196,62, +30,114,142,60, +99,186,210,190, +105,141,145,63, +20,69,207,190, +206,120,255,60, +225,199,50,191, +112,16,243,187, +160,12,43,63, +159,220,139,190, +121,78,163,190, +89,6,245,62, +70,119,245,190, +81,208,61,63, +59,80,60,190, +51,143,204,190, +193,101,72,62, +126,248,110,191, +230,3,193,190, +86,248,200,61, +244,110,133,191, +185,86,154,63, +227,66,187,62, +187,175,62,190, +84,98,6,63, +181,182,114,62, +163,137,44,63, +234,81,213,62, +254,137,37,63, +157,214,149,62, +248,182,90,191, +107,230,136,190, +13,207,109,61, +152,155,156,190, +226,150,157,61, +67,160,7,62, +61,132,191,190, +218,142,61,191, +111,239,161,190, +106,47,6,62, +66,43,95,61, +23,61,129,62, +85,236,135,63, +206,35,70,191, +109,74,159,190, +31,235,196,190, +52,34,22,191, +196,52,143,190, +104,19,109,190, +100,76,29,191, +59,175,183,190, +174,196,63,191, +57,183,12,63, +158,151,129,191, +1,254,31,63, +201,208,50,62, +218,146,174,61, +192,100,3,191, +103,36,16,63, +143,83,133,63, +33,6,127,190, +4,215,159,190, +190,181,254,62, +223,91,175,188, +92,124,7,191, +161,253,166,190, +200,72,83,63, +57,7,109,61, +187,225,212,189, +217,246,19,191, +116,195,215,60, +249,64,185,188, +186,20,182,188, +211,166,19,190, +134,14,205,190, +134,45,187,62, +73,102,55,63, +70,15,58,63, +252,44,25,191, +56,218,49,190, +129,251,170,190, +197,226,87,62, +123,101,180,189, +170,132,161,62, +249,187,142,191, +172,71,12,63, +105,137,46,191, +143,30,175,62, +206,200,215,190, +178,170,245,190, +42,241,27,62, +174,235,19,63, +210,19,92,191, +76,51,64,191, +119,153,143,62, +244,164,85,190, +217,137,93,62, +0,23,2,60, +68,75,134,191, +111,79,49,191, +70,214,129,62, +255,22,61,191, +217,229,76,62, +127,242,173,62, +169,0,39,191, +102,166,191,190, +239,13,185,190, +199,193,140,62, +195,242,207,61, +210,86,85,62, +87,248,150,62, +214,36,104,191, +60,217,39,62, +159,110,115,191, +202,22,162,188, +32,8,15,191, +1,69,200,62, +3,172,39,63, +43,9,186,61, +55,213,248,187, +9,10,86,190, +180,36,157,190, +180,140,30,63, +237,71,220,62, +247,173,64,191, +254,111,6,61, +242,108,65,191, +188,64,129,190, +231,119,195,62, +153,38,62,190, +15,141,0,191, +50,178,128,190, +68,163,88,63, +227,52,202,190, +143,117,8,191, +199,132,105,190, +218,197,19,190, +103,16,221,190, +70,167,176,61, +39,214,105,190, +247,142,57,63, +241,248,79,190, +64,255,144,190, +246,177,82,191, +15,38,40,190, +190,32,63,189, +96,171,233,59, +161,9,98,62, +42,38,66,61, +223,250,252,188, +237,205,210,189, +163,126,237,61, +79,158,114,62, +72,234,187,191, +136,152,171,190, +109,27,19,63, +121,105,99,62, +160,88,87,63, +115,155,216,62, +7,8,174,191, +2,13,247,190, +181,35,12,63, +235,30,118,62, +150,184,83,63, +134,214,122,61, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference2_f32.txt +102,9,255,60, +44,14,176,62, +113,96,117,61, +132,219,91,61, +215,174,250,189, +73,164,135,188, +47,184,72,189, +226,41,153,188, +67,97,26,187, +121,140,65,62, +232,166,56,191, +100,71,173,62, +249,31,111,190, +144,119,31,188, +173,19,85,62, +204,50,176,62, +185,239,148,61, +60,125,190,189, +191,58,28,191, +28,47,51,62, +107,141,185,60, +29,145,146,60, +34,94,174,190, +22,52,157,189, +92,135,97,190, +56,77,155,62, +84,195,46,190, +177,219,5,190, +161,147,168,62, +2,30,11,63, +233,21,243,60, +118,153,75,190, +109,37,127,62, +118,130,82,62, +247,67,146,62, +222,102,202,190, +62,75,189,61, +98,198,87,190, +116,155,197,61, +104,157,215,190, +141,220,143,190, +14,53,3,63, +52,34,33,63, +9,196,5,191, +66,15,217,62, +108,178,137,60, +150,106,26,189, +187,73,240,190, +251,11,16,61, +154,62,239,189, +220,38,152,62, +155,114,172,61, +158,218,157,189, +173,96,20,190, +231,225,166,62, +57,132,151,190, +35,174,158,62, +108,204,180,190, +135,176,62,61, +184,146,8,190, +101,113,159,190, +92,94,202,188, +66,155,113,190, +26,65,107,189, +195,59,240,60, +56,170,86,190, +124,223,133,62, +70,229,84,61, +224,226,176,61, +171,27,208,186, +236,88,40,190, +222,126,177,190, +24,179,121,61, +182,57,215,62, +211,126,51,189, +61,234,210,189, +67,210,205,62, +65,77,194,190, +43,26,205,61, +11,111,150,62, +98,189,76,190, +65,8,125,189, +224,105,90,62, +211,126,183,189, +249,217,177,189, +34,92,95,190, +214,133,27,62, +129,9,220,189, +122,69,160,190, +181,220,53,62, +176,112,15,62, +6,107,52,62, +194,213,2,60, +54,141,65,190, +58,176,5,63, +16,96,62,190, +250,165,106,60, +86,53,164,190, +132,64,95,187, +104,27,157,62, +47,118,0,190, +210,254,21,190, +132,13,97,62, +60,117,97,190, +141,87,174,62, +197,246,172,189, +190,226,59,190, +36,16,184,61, +253,125,219,190, +84,72,49,190, +198,150,56,61, +78,29,245,190, +51,194,13,63, +97,255,43,62, +193,36,175,189, +97,220,118,62, +26,238,222,61, +93,121,158,62, +167,238,67,62, +194,11,152,62, +255,159,9,62, +36,227,200,190, +143,123,251,189, +202,108,218,60, +185,215,15,190, +135,190,16,61, +106,36,121,61, +241,231,47,190, +108,27,174,190, +101,188,20,190, +218,126,118,61, +124,250,204,60, +164,104,237,61, +41,176,249,62, +77,253,181,190, +146,78,18,190, +27,222,52,190, +109,229,137,190, +139,136,3,190, +113,192,217,189, +28,122,144,190, +93,182,40,190, +33,35,176,190, +247,62,129,62, +240,14,238,190, +131,243,146,62, +131,61,164,61, +24,88,32,61, +6,94,113,190, +165,100,132,62, +251,234,244,62, +166,60,234,189, +179,207,18,190, +208,242,105,62, +186,16,33,188, +120,226,120,190, +26,97,25,190, +255,15,194,62, +65,181,217,60, +157,135,67,189, +86,231,135,190, +53,45,70,60, +91,39,42,188, +81,61,39,188, +214,157,135,189, +176,87,60,190, +195,235,43,62, +93,115,168,62, +216,228,170,62, +187,176,140,190, +12,91,163,189, +174,11,29,190, +248,73,198,61, +57,177,37,189, +84,90,20,62, +152,25,3,191, +130,216,128,62, +108,79,160,190, +106,216,32,62, +30,50,70,190, +119,164,97,190, +48,59,143,61, +21,221,135,62, +142,35,202,190, +187,136,176,190, +9,229,3,62, +237,58,196,189, +24,123,203,61, +241,248,110,59, +3,178,246,190, +146,219,162,190, +9,130,238,61, +86,173,173,190, +84,50,188,61, +208,196,31,62, +227,99,153,190, +81,7,48,190, +123,248,41,190, +169,72,1,62, +151,255,62,61, +40,243,195,61, +27,170,10,62, +201,56,213,190, +207,42,154,61, +6,151,223,190, +139,224,20,188, +138,95,131,190, +16,242,55,62, +70,1,154,62, +60,223,42,61, +236,140,100,187, +196,151,196,189, +168,85,16,190, +81,160,145,62, +106,83,74,62, +102,249,176,190, +123,245,118,60, +208,168,177,190, +86,111,237,189, +37,137,51,62, +204,166,174,189, +69,37,108,190, +127,105,236,189, +198,250,198,62, +134,185,57,190, +61,172,122,190, +10,124,214,189, +86,186,135,189, +140,11,75,190, +30,65,34,61, +200,198,214,189, +254,110,170,62, +68,5,191,189, +168,45,5,190, +121,133,193,190, +95,113,154,189, +142,140,175,188, +126,159,86,59, +254,156,207,61, +240,82,178,60, +10,92,104,188, +40,159,65,189, +239,34,90,61, +177,215,222,61, +34,153,44,191, +233,155,29,190, +205,29,135,62, +41,224,208,61, +22,203,197,62, +152,243,70,62, +150,216,31,191, +230,233,98,190, +121,183,128,62, +55,15,226,61, +176,118,194,62, +100,100,230,60, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference3_f32.txt +121,167,109,58, +12,128,226,61, +242,253,91,59, +236,156,48,59, +4,156,101,60, +226,114,134,57, +45,52,19,59, +131,109,171,57, +77,41,174,54, +185,223,8,61, +234,40,249,62, +151,105,219,61, +181,236,80,61, +15,212,185,56, +26,227,37,61, +84,222,226,61, +138,24,162,59, +178,148,4,60, +2,92,178,62, +56,159,234,60, +130,152,251,57, +159,250,156,57, +184,45,222,61, +27,151,180,59, +142,215,57,61, +69,63,176,61, +229,47,223,60, +173,239,130,60, +116,170,207,61, +70,109,141,62, +37,231,87,58, +89,117,23,61, +183,219,109,61, +241,233,33,61, +138,85,156,61, +137,174,21,62, +23,236,2,60, +99,29,42,61, +160,172,14,60, +205,220,41,62, +202,60,151,61, +89,154,123,62, +151,187,189,62, +105,193,130,62, +126,37,44,62, +205,141,138,57, +88,62,174,58, +72,246,82,62, +148,160,151,58, +62,34,81,60, +156,43,169,61, +2,80,217,59, +129,22,182,59, +191,225,160,60, +59,131,203,61, +180,194,167,61, +197,255,183,61, +119,222,238,61, +34,220,4,59, +45,77,136,60, +174,197,185,61, +244,161,21,58, +147,72,85,61, +66,55,74,59, +193,221,82,58, +121,94,40,61, +25,247,130,61, +226,154,37,59, +162,164,228,59, +152,61,30,54, +232,25,207,60, +155,56,230,61, +192,207,99,59, +220,63,41,62, +39,112,235,58, +188,137,34,60, +58,200,26,62, +235,240,9,62, +212,179,25,60, +27,95,165,61, +227,40,25,61, +228,238,105,59, +1,77,46,61, +97,12,246,59, +46,37,231,59, +233,72,54,61, +223,191,176,60, +213,230,48,60, +44,181,187,61, +16,176,241,60, +87,90,150,60, +96,221,237,60, +101,45,122,56, +196,224,8,61, +179,154,130,62, +26,108,4,61, +237,44,73,57, +243,10,197,61, +216,27,54,55, +107,94,180,61, +231,46,113,60, +188,104,164,60, +246,14,57,61, +177,185,57,61, +241,28,222,61, +156,157,218,59, +71,251,0,61, +178,146,247,59, +201,6,48,62, +53,171,229,60, +98,253,248,58, +159,133,91,62, +41,217,146,62, +251,45,216,60, +2,41,224,59, +67,169,94,61, +125,149,53,60, +118,133,183,61, +13,68,12,61, +93,239,168,61, +188,104,138,60, +54,115,19,62, +161,19,103,60, +167,81,46,58, +165,50,151,60, +97,25,153,58, +180,203,98,59, +185,29,226,60, +215,131,221,61, +227,168,161,60, +172,0,94,59, +90,132,25,58, +197,239,77,60, +102,202,99,62, +187,6,242,61, +55,108,156,60, +52,13,239,60, +132,244,138,61, +241,218,124,60, +251,62,45,60, +197,136,152,61, +16,0,208,60, +252,181,226,61, +34,35,116,61, +171,16,79,62, +174,205,157,61, +147,30,197,59, +203,224,187,58, +132,220,84,61, +249,21,128,61, +134,43,91,62, +122,120,72,60, +206,128,157,60, +44,250,71,61, +113,146,189,56, +179,83,98,61, +52,233,171,60, +254,153,9,62, +46,45,45,58, +172,176,11,59, +239,247,134,61, +101,127,15,57, +203,145,211,56, +109,98,204,56, +26,102,134,59, +9,156,1,61, +173,252,215,60, +253,90,207,61, +8,106,213,61, +183,164,144,61, +111,0,195,59, +81,58,180,60, +15,169,15,60, +195,158,200,58, +253,211,160,60, +20,49,123,62, +167,160,114,61, +121,204,187,61, +248,13,189,60, +131,134,15,61, +137,7,58,61, +67,234,149,59, +144,227,134,61, +10,75,21,62, +213,187,227,61, +10,63,126,60, +87,177,12,60, +46,72,23,60, +134,168,80,55, +222,92,94,62, +143,208,193,61, +20,217,79,60, +15,108,220,61, +163,104,1,60, +67,136,186,60, +115,239,171,61, +106,110,226,60, +71,29,211,60, +195,71,116,60, +100,74,5,59, +129,74,12,60, +1,130,140,60, +231,28,38,62, +134,174,173,59, +20,169,54,62, +128,247,161,56, +100,61,124,61, +205,65,247,60, +252,80,173,61, +5,92,213,58, +247,218,62,55, +152,54,13,60, +216,59,152,60, +120,248,154,61, +196,145,21,61, +226,222,228,61, +143,214,94,57, +119,165,230,61, +99,251,77,60, +60,139,235,60, +12,231,222,59, +66,192,75,61, +14,54,76,60, +179,169,16,62, +44,16,252,60, +65,151,101,61, +16,22,40,60, +155,158,134,59, +126,162,22,61, +157,97,192,58, +75,139,40,60, +21,68,212,61, +81,82,5,60, +17,156,129,60, +210,213,8,62, +167,77,174,59, +5,51,225,57, +165,77,40,55, +47,125,29,60, +4,96,232,57, +31,69,69,57, +39,250,8,59, +216,219,45,59, +253,112,53,60, +39,177,217,62, +243,133,181,60, +203,104,133,61, +246,104,31,60, +112,241,14,62, +67,159,16,61, +116,182,186,62, +166,33,60,61, +78,36,114,61, +184,183,58,60, +197,43,10,62, +143,241,65,58, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference4_f32.txt +15,152,74,189, +121,218,11,191, +157,235,194,189, +10,166,174,189, +175,34,71,62, +253,127,215,60, +38,114,159,61, +115,86,243,60, +39,69,117,59, +233,191,153,190, +173,174,146,63, +217,165,9,191, +62,244,189,62, +46,90,125,60, +35,67,169,190, +146,247,11,191, +46,159,236,189, +186,81,23,62, +101,53,120,63, +183,86,142,190, +201,101,19,189, +109,219,232,188, +71,131,10,63, +137,193,249,61, +88,39,179,62, +7,188,246,190, +169,211,138,62, +147,170,84,62, +158,233,5,191, +136,5,93,191, +176,25,65,189, +210,187,161,62, +82,174,202,190, +17,57,167,190, +220,96,232,190, +69,200,32,63, +168,94,22,190, +209,103,171,62, +63,249,28,190, +68,71,43,63, +32,143,228,62, +101,116,80,191, +0,0,128,191, +254,132,84,63, +16,109,44,191, +226,195,218,188, +247,83,117,61, +198,224,62,63, +123,218,100,189, +147,12,62,62, +239,186,241,190, +210,252,8,190, +28,202,250,61, +233,187,107,62, +19,145,4,191, +138,184,240,62, +41,26,252,190, +10,159,15,63, +121,122,151,189, +204,250,88,62, +96,80,253,62, +131,193,32,61, +230,236,191,62, +31,225,186,61, +173,213,62,189, +21,134,170,62, +155,176,212,190, +71,30,169,189, +112,131,12,190, +176,80,37,59, +251,186,133,62, +91,255,12,63, +180,90,198,189, +17,248,42,191, +10,150,142,61, +128,139,39,62, +169,127,35,191, +13,89,26,63, +107,237,34,190, +44,0,239,190, +183,163,162,62, +110,0,201,61, +104,128,173,190, +122,195,17,62, +186,71,13,62, +73,110,177,62, +250,21,119,190, +146,202,46,62, +81,161,254,62, +86,119,144,190, +194,227,99,190, +171,81,143,190, +255,220,79,188, +127,192,153,62, +134,101,84,191, +142,58,151,62, +230,101,186,188, +70,113,2,63, +89,88,177,59, +84,154,249,190, +183,23,76,62, +226,77,110,62, +142,198,178,190, +242,24,179,62, +12,126,10,191, +207,101,9,62, +73,64,149,62, +234,54,18,190, +190,91,46,63, +8,212,140,62, +220,161,146,189, +71,182,66,63, +211,55,97,191, +74,161,136,190, +14,33,11,62, +108,25,196,190, +225,22,49,190, +82,198,251,190, +158,164,155,190, +223,143,241,190, +157,166,90,190, +69,148,31,63, +78,197,71,62, +185,130,45,189, +117,135,100,62, +37,246,101,189, +93,233,197,189, +27,188,139,62, +72,78,10,63, +161,77,108,62, +33,207,195,189, +64,212,34,189, +64,151,60,190, +95,88,70,191, +58,145,16,63, +182,113,104,62, +22,173,143,62, +234,20,219,62, +10,249,80,62, +208,249,44,62, +113,137,229,62, +53,5,134,62, +31,235,11,63, +181,86,205,190, +90,27,61,63, +195,119,233,190, +197,119,2,190, +230,190,126,189, +65,188,191,62, +186,86,210,190, +78,142,66,191, +58,18,58,62, +221,62,105,62, +147,215,185,190, +60,228,127,60, +250,180,197,62, +45,174,115,62, +100,40,26,191, +237,240,44,189, +197,82,155,61, +132,234,215,62, +7,109,157,188, +83,42,135,60, +177,217,132,60, +190,117,215,61, +47,157,149,62, +180,145,136,190, +252,207,5,191, +217,192,7,191, +89,133,223,62, +223,195,1,62, +88,129,121,62, +224,131,29,190, +12,159,131,61, +212,177,107,190, +197,72,80,63, +237,179,204,190, +31,177,254,62, +195,138,127,190, +238,112,157,62, +119,62,179,62, +194,142,227,189, +56,218,215,190, +204,146,32,63, +213,59,12,63, +252,139,81,190, +53,225,27,62, +178,163,33,190, +61,213,189,187, +197,247,67,63, +156,94,1,63, +200,118,61,190, +213,246,9,63, +130,127,21,190, +231,212,125,190, +154,178,243,62, +7,213,139,62, +22,5,135,62, +27,102,77,190, +71,185,151,189, +51,168,27,190, +100,77,92,190, +157,96,41,63, +164,238,244,189, +17,157,49,63, +15,135,108,60, +229,183,208,62, +4,31,146,190, +166,172,244,190, +100,188,135,189, +214,141,181,59, +246,42,28,62, +137,79,101,62, +221,92,231,190, +209,184,160,190, +85,149,12,63, +93,45,196,188, +173,32,13,63, +146,156,60,62, +61,158,142,190, +0,189,10,62, +96,150,187,62, +146,204,59,62, +83,16,30,191, +211,136,147,62, +158,32,199,62, +102,97,42,62, +5,163,215,61, +22,75,161,62, +234,227,128,189, +198,156,42,62, +59,99,7,191, +202,189,23,62, +20,150,83,62, +89,186,25,63, +190,94,245,61, +131,115,11,61, +143,125,170,187, +16,236,36,190, +209,167,13,189, +114,148,184,60, +192,206,153,61, +13,72,173,189, +20,5,49,190, +109,27,137,63, +124,102,122,62, +83,170,214,190, +199,236,37,190, +22,31,29,191, +160,10,158,190, +83,244,125,63, +250,64,180,62, +113,127,204,190, +67,147,51,190, +247,121,26,191, +92,4,55,189, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference5_f32.txt +129,169,12,63, +61,237,133,63, +116,93,24,63, +193,212,21,63, +169,110,156,62, +0,136,242,62, +119,35,216,62, +153,202,240,62, +118,21,254,62, +244,223,76,63, +90,93,37,191, +237,210,132,63, +132,23,4,62, +47,21,248,62, +145,161,84,63, +201,251,133,63, +230,147,29,63, +35,87,180,62, +203,106,240,190, +92,43,71,63, +93,54,9,63, +219,70,7,63, +107,52,40,189, +158,143,193,62, +81,177,25,62, +3,94,123,63, +173,88,106,62, +182,170,149,62, +207,244,130,63, +196,130,174,63, +155,17,12,63, +92,136,60,62, +41,87,101,63, +136,156,83,63, +110,48,116,63, +20,33,3,190, +170,151,37,63, +94,48,41,62, +80,62,39,63, +15,29,45,190, +2,135,91,61, +51,58,168,63, +0,0,192,63, +252,9,169,190, +136,54,150,63, +31,214,6,63, +129,85,225,62, +26,131,123,190, +168,77,14,63, +182,249,160,62, +119,221,120,63, +52,63,34,63, +121,77,193,62, +12,34,138,62, +138,72,130,63, +93,119,244,60, +21,13,126,63, +159,240,121,189, +79,239,18,63, +154,130,147,62, +20,232,171,59, +208,231,235,62, +53,38,0,62, +184,71,209,62, +91,237,11,63, +214,243,42,62, +77,88,106,63, +201,35,21,63, +220,32,35,63, +95,181,254,62, +11,138,116,62, +179,245,79,189, +86,203,24,63, +9,124,149,63, +125,90,220,62, +64,58,172,62, +212,191,145,63, +104,200,210,189, +91,187,40,63, +22,128,119,63, +146,184,58,62, +228,191,205,62, +52,192,86,63, +67,30,183,62, +35,92,185,62, +110,35,29,62, +127,197,61,63, +183,154,168,62, +69,87,47,59, +171,59,72,63, +241,248,56,63, +214,168,71,63, +116,63,3,63, +2,127,76,62, +195,50,170,63, +228,138,81,62, +47,211,5,63, +135,81,28,188, +159,58,253,62, +42,205,124,63, +37,244,153,62, +15,217,136,62, +71,99,89,63, +28,206,25,62, +6,63,133,63, +25,77,187,62, +110,127,85,62, +186,141,36,63, +250,110,57,190, +240,87,102,62, +60,84,18,63, +142,108,133,190, +234,155,176,63, +165,80,68,63, +121,111,186,62, +182,12,98,63, +184,69,44,63, +41,227,125,63, +79,210,77,63, +240,199,120,63, +167,169,54,63, +41,162,252,189, +89,29,156,62, +44,216,10,63, +69,188,141,62, +98,95,14,63, +44,189,24,63, +202,135,104,62, +131,228,36,189, +47,217,137,62, +228,121,24,63, +68,45,10,63, +208,37,47,63, +48,44,163,63, +210,137,132,189, +37,199,139,62, +211,165,96,62, +88,172,147,61, +123,131,151,62, +24,131,169,62, +116,180,83,61, +150,245,115,62, +242,177,62,189, +90,171,102,63, +105,109,116,190, +225,187,116,63, +241,157,32,63, +238,235,15,63, +126,135,0,62, +93,43,105,63, +39,71,161,63, +227,246,162,62, +145,96,139,62, +201,235,92,63, +222,0,248,62, +23,44,233,61, +233,40,134,62, +50,20,141,63, +15,207,10,63, +79,43,217,62, +241,85,160,61, +104,235,4,63, +91,141,247,62, +101,178,247,62, +144,34,202,62, +162,197,84,62, +218,72,68,63, +254,231,130,63, +109,224,131,63, +156,234,129,61, +17,30,191,62, +84,63,131,62, +248,96,39,63, +61,24,223,62, +117,236,58,63, +138,145,160,190, +246,89,102,63, +136,112,39,59, +177,226,63,63, +35,30,69,62, +19,131,25,62, +216,113,28,63, +28,237,107,63, +49,75,2,190, +81,189,67,189, +255,98,52,63, +101,15,178,62, +237,104,40,63, +170,123,1,63, +137,239,135,190, +0,78,175,187, +178,93,47,63, +80,109,31,189, +224,95,37,63, +58,117,63,63, +89,214,196,60, +241,85,104,62, +211,245,113,62, +135,89,51,63, +41,247,18,63, +13,234,38,63, +89,19,55,63, +117,130,37,190, +212,157,30,63, +67,116,70,190, +200,155,248,62, +108,32,189,61, +130,15,73,63, +83,86,122,63, +141,247,16,63, +201,41,253,62, +133,234,177,62, +60,88,141,62, +110,174,115,63, +105,92,80,63, +82,85,73,189, +107,33,6,63, +211,10,82,189, +183,177,161,62, +30,79,71,63, +128,161,186,62, +64,211,8,62, +183,25,162,62, +42,8,143,63, +90,238,88,62, +135,125,227,61, +77,207,170,62, +63,23,202,62, +212,105,61,62, +125,28,16,63, +157,177,170,62, +157,177,131,63, +27,33,180,62, +246,52,150,62, +202,210,205,189, +80,168,194,62, +144,145,238,62, +251,84,1,63, +4,59,41,63, +125,218,8,63, +185,118,244,62, +80,140,217,62, +2,169,21,63, +69,65,44,63, +217,54,18,191, +194,204,130,62, +42,85,107,63, +50,123,41,63, +139,143,142,63, +80,5,79,63, +165,232,251,190, +11,126,23,62, +185,63,102,63, +209,228,44,63, +251,60,141,63, +70,112,11,63, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference6_f32.txt +15,152,202,60, +121,218,139,62, +157,235,66,61, +10,166,46,61, +175,34,199,189, +253,127,87,188, +38,114,31,189, +115,86,115,188, +39,69,245,186, +233,191,25,62, +173,174,18,191, +217,165,137,62, +62,244,61,190, +46,90,253,187, +35,67,41,62, +146,247,139,62, +46,159,108,61, +186,81,151,189, +101,53,248,190, +183,86,14,62, +201,101,147,60, +109,219,104,60, +71,131,138,190, +137,193,121,189, +88,39,51,190, +7,188,118,62, +169,211,10,190, +147,170,212,189, +158,233,133,62, +136,5,221,62, +176,25,193,60, +210,187,33,190, +82,174,74,62, +17,57,39,62, +220,96,104,62, +69,200,160,190, +168,94,150,61, +209,103,43,190, +63,249,156,61, +68,71,171,190, +32,143,100,190, +101,116,208,62, +0,0,0,63, +254,132,212,190, +16,109,172,62, +226,195,90,60, +247,83,245,188, +198,224,190,190, +123,218,228,60, +147,12,190,189, +239,186,113,62, +210,252,136,61, +28,202,122,189, +233,187,235,189, +19,145,132,62, +138,184,112,190, +41,26,124,62, +10,159,143,190, +121,122,23,61, +204,250,216,189, +96,80,125,190, +131,193,160,188, +230,236,63,190, +31,225,58,189, +173,213,190,60, +21,134,42,190, +155,176,84,62, +71,30,41,61, +112,131,140,61, +176,80,165,186, +251,186,5,190, +91,255,140,190, +180,90,70,61, +17,248,170,62, +10,150,14,189, +128,139,167,189, +169,127,163,62, +13,89,154,190, +107,237,162,61, +44,0,111,62, +183,163,34,190, +110,0,73,189, +104,128,45,62, +122,195,145,189, +186,71,141,189, +73,110,49,190, +250,21,247,61, +146,202,174,189, +81,161,126,190, +86,119,16,62, +194,227,227,61, +171,81,15,62, +255,220,207,59, +127,192,25,190, +134,101,212,62, +142,58,23,190, +230,101,58,60, +70,113,130,190, +89,88,49,187, +84,154,121,62, +183,23,204,189, +226,77,238,189, +142,198,50,62, +242,24,51,190, +12,126,138,62, +207,101,137,189, +73,64,21,190, +234,54,146,61, +190,91,174,190, +8,212,12,190, +220,161,18,61, +71,182,194,190, +211,55,225,62, +74,161,8,62, +14,33,139,189, +108,25,68,62, +225,22,177,61, +82,198,123,62, +158,164,27,62, +223,143,113,62, +157,166,218,61, +69,148,159,190, +78,197,199,189, +185,130,173,60, +117,135,228,189, +37,246,229,60, +93,233,69,61, +27,188,11,190, +72,78,138,190, +161,77,236,189, +33,207,67,61, +64,212,162,60, +64,151,188,61, +95,88,198,62, +58,145,144,190, +182,113,232,189, +22,173,15,190, +234,20,91,190, +10,249,208,189, +208,249,172,189, +113,137,101,190, +53,5,6,190, +31,235,139,190, +181,86,77,62, +90,27,189,190, +195,119,105,62, +197,119,130,61, +230,190,254,60, +65,188,63,190, +186,86,82,62, +78,142,194,62, +58,18,186,189, +221,62,233,189, +147,215,57,62, +60,228,255,187, +250,180,69,190, +45,174,243,189, +100,40,154,62, +237,240,172,60, +197,82,27,189, +132,234,87,190, +7,109,29,60, +83,42,7,188, +177,217,4,188, +190,117,87,189, +47,157,21,190, +180,145,8,62, +252,207,133,62, +217,192,135,62, +89,133,95,190, +223,195,129,189, +88,129,249,189, +224,131,157,61, +12,159,3,189, +212,177,235,61, +197,72,208,190, +237,179,76,62, +31,177,126,190, +195,138,255,61, +238,112,29,190, +119,62,51,190, +194,142,99,61, +56,218,87,62, +204,146,160,190, +213,59,140,190, +252,139,209,61, +53,225,155,189, +178,163,161,61, +61,213,61,59, +197,247,195,190, +156,94,129,190, +200,118,189,61, +213,246,137,190, +130,127,149,61, +231,212,253,61, +154,178,115,190, +7,213,11,190, +22,5,7,190, +27,102,205,61, +71,185,23,61, +51,168,155,61, +100,77,220,61, +157,96,169,190, +164,238,116,61, +17,157,177,190, +15,135,236,187, +229,183,80,190, +4,31,18,62, +166,172,116,62, +100,188,7,61, +214,141,53,187, +246,42,156,189, +137,79,229,189, +221,92,103,62, +209,184,32,62, +85,149,140,190, +93,45,68,60, +173,32,141,190, +146,156,188,189, +61,158,14,62, +0,189,138,189, +96,150,59,190, +146,204,187,189, +83,16,158,62, +211,136,19,190, +158,32,71,190, +102,97,170,189, +5,163,87,189, +22,75,33,190, +234,227,0,61, +198,156,170,189, +59,99,135,62, +202,189,151,189, +20,150,211,189, +89,186,153,190, +190,94,117,189, +131,115,139,188, +143,125,42,59, +16,236,164,61, +209,167,141,60, +114,148,56,188, +192,206,25,189, +13,72,45,61, +20,5,177,61, +109,27,9,191, +124,102,250,189, +83,170,86,62, +199,236,165,61, +22,31,157,62, +160,10,30,62, +83,244,253,190, +250,64,52,190, +113,127,76,62, +67,147,179,61, +247,121,154,62, +92,4,183,60, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference7_f32.txt +75,59,235,61, +0, +0, +0, +0, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference8_f32.txt +154,159,9,62, +0, +0, +0, +0, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference9_f32.txt +246,160,9,62, +0, +0, +0, +0, +// Patterns\DSP\BasicMaths\BasicMathsF32\Reference10_f32.txt +15,152,74,61, +121,218,11,63, +157,235,194,61, +10,166,174,61, +175,34,71,62, +253,127,215,60, +38,114,159,61, +115,86,243,60, +39,69,117,59, +233,191,153,62, +173,174,146,63, +217,165,9,63, +62,244,189,62, +46,90,125,60, +35,67,169,62, +146,247,11,63, +46,159,236,61, +186,81,23,62, +101,53,120,63, +183,86,142,62, +201,101,19,61, +109,219,232,60, +71,131,10,63, +137,193,249,61, +88,39,179,62, +7,188,246,62, +169,211,138,62, +147,170,84,62, +158,233,5,63, +136,5,93,63, +176,25,65,61, +210,187,161,62, +82,174,202,62, +17,57,167,62, +220,96,232,62, +69,200,32,63, +168,94,22,62, +209,103,171,62, +63,249,28,62, +68,71,43,63, +32,143,228,62, +101,116,80,63, +0,0,128,63, +254,132,84,63, +16,109,44,63, +226,195,218,60, +247,83,117,61, +198,224,62,63, +123,218,100,61, +147,12,62,62, +239,186,241,62, +210,252,8,62, +28,202,250,61, +233,187,107,62, +19,145,4,63, +138,184,240,62, +41,26,252,62, +10,159,15,63, +121,122,151,61, +204,250,88,62, +96,80,253,62, +131,193,32,61, +230,236,191,62, +31,225,186,61, +173,213,62,61, +21,134,170,62, +155,176,212,62, +71,30,169,61, +112,131,12,62, +176,80,37,59, +251,186,133,62, +91,255,12,63, +180,90,198,61, +17,248,42,63, +10,150,142,61, +128,139,39,62, +169,127,35,63, +13,89,26,63, +107,237,34,62, +44,0,239,62, +183,163,162,62, +110,0,201,61, +104,128,173,62, +122,195,17,62, +186,71,13,62, +73,110,177,62, +250,21,119,62, +146,202,46,62, +81,161,254,62, +86,119,144,62, +194,227,99,62, +171,81,143,62, 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Patterns\DSP\SVM\SVMF32\Params1_f32.txt +152,190,110,61, +21,83,70,189, +128,249,130,61, +128,93,74,60, +90,173,157,188, +40,158,103,61, +70,151,50,61, +55,255,18,60, +168,255,101,61, +195,75,0,189, +109,232,237,59, +106,158,197,60, +2,75,227,61, +153,224,85,189, +115,170,24,61, +22,91,23,61, +69,78,187,60, +112,4,36,60, +12,85,14,61, +61,142,142,189, +167,153,102,61, +132,213,96,189, +79,75,56,189, +233,110,203,187, +191,120,235,188, +135,75,23,189, +88,137,141,189, +89,10,109,61, +66,92,189,60, +202,103,58,189, +119,53,130,63, +8,97,49,189, +67,108,34,61, +161,52,61,189, +74,144,157,186, +187,63,188,60, +98,33,11,189, +110,82,31,61, +71,138,238,188, +200,135,168,188, +81,4,128,63, +22,184,154,61, +108,51,150,188, +128,228,54,61, +43,86,72,61, +111,187,70,189, +220,251,150,59, +123,110,74,61, +221,119,60,188, +203,187,95,61, +216,14,124,63, +96,1,133,61, +5,4,134,60, +29,140,148,60, +81,225,14,188, +169,248,106,189, +124,189,129,189, +230,208,249,60, +159,11,128,189, +244,233,89,61, +0,0,128,191, +253,100,184,189, +0,0,128,191, +81,246,50,63, +158,44,200,62, +0,0,128,63, +55,30,128,191, +0, +0, +0, +0, +// Patterns\DSP\SVM\SVMF32\Dims1_s16.txt +1,0, +0,0, +1,0, +100,0, +10,0, +6,0, +0, +0, +0, +0, +// Patterns\DSP\SVM\SVMF32\Reference1_s32.txt +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, 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+189,47,89,189, +51,166,18,189, +222,64,148,61, +117,119,214,187, +136,239,54,189, +56,192,29,59, +46,160,159,59, +154,238,125,188, +167,153,102,61, +132,213,96,189, +79,75,56,189, +233,110,203,187, +191,120,235,188, +135,75,23,189, +88,137,141,189, +89,10,109,61, +66,92,189,60, +202,103,58,189, +127,20,206,188, +125,107,235,61, +61,243,229,188, +186,100,170,60, +160,144,115,189, +241,247,195,189, +74,94,52,61, +170,18,39,188, +96,239,188,60, +89,22,61,61, +119,53,130,63, +8,97,49,189, +67,108,34,61, +161,52,61,189, +74,144,157,186, +187,63,188,60, +98,33,11,189, +110,82,31,61, +71,138,238,188, +200,135,168,188, +81,4,128,63, +22,184,154,61, +108,51,150,188, +128,228,54,61, +43,86,72,61, +111,187,70,189, +220,251,150,59, +123,110,74,61, +221,119,60,188, +203,187,95,61, +137,81,136,63, +39,63,32,189, +12,119,77,189, +40,211,40,61, +200,224,17,60, +87,34,119,61, +192,141,199,189, +192,120,209,189, +133,243,187,188, +0,76,21,61, +216,14,124,63, +96,1,133,61, +5,4,134,60, +29,140,148,60, +81,225,14,188, +169,248,106,189, +124,189,129,189, +230,208,249,60, +159,11,128,189, +244,233,89,61, +160,119,136,63, +200,59,30,189, +206,177,12,59, +106,252,233,60, +1,54,72,189, +0,99,143,61, +134,250,202,58, +86,27,229,189, +118,121,0,62, +141,73,226,60, +0,0,128,191, +0,0,128,191, +35,158,231,190, +0,0,128,191, +0,0,128,191, +0,0,128,63, +0,0,128,63, +35,158,231,62, +0,0,128,63, +0,0,128,63, +64,162,109,191, +205,204,140,63, +205,204,204,61, +0, +0, +0, +0, +// Patterns\DSP\SVM\SVMF32\Dims2_s16.txt +2,0, +0,0, +1,0, +100,0, +10,0, +10,0, +3,0, +0, +0, +// Patterns\DSP\SVM\SVMF32\Reference2_s32.txt +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, 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Patterns\DSP\SVM\SVMF32\Params3_f32.txt +152,190,110,61, +21,83,70,189, +128,249,130,61, +128,93,74,60, +90,173,157,188, +40,158,103,61, +70,151,50,61, +55,255,18,60, +168,255,101,61, +195,75,0,189, +109,232,237,59, +106,158,197,60, +2,75,227,61, +153,224,85,189, +115,170,24,61, +22,91,23,61, +69,78,187,60, +112,4,36,60, +12,85,14,61, +61,142,142,189, +2,184,55,189, +107,43,94,189, +189,47,89,189, +51,166,18,189, +222,64,148,61, +117,119,214,187, +136,239,54,189, +56,192,29,59, +46,160,159,59, +154,238,125,188, +167,153,102,61, +132,213,96,189, +79,75,56,189, +233,110,203,187, +191,120,235,188, +135,75,23,189, +88,137,141,189, +89,10,109,61, +66,92,189,60, +202,103,58,189, +127,20,206,188, +125,107,235,61, +61,243,229,188, +186,100,170,60, +160,144,115,189, +241,247,195,189, +74,94,52,61, +170,18,39,188, +96,239,188,60, +89,22,61,61, +119,53,130,63, +8,97,49,189, +67,108,34,61, +161,52,61,189, +74,144,157,186, +187,63,188,60, +98,33,11,189, +110,82,31,61, +71,138,238,188, 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+0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +// 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+0,0,128,191, +0,0,128,191, +0,0,128,191, +0,0,128,191, +0,0,128,63, +0,0,128,63, +0,0,128,63, +0,0,128,63, +0,0,128,63, +53,164,133,190, +0,0,0,0, +205,204,204,61, +0, +0, +0, +0, +// Patterns\DSP\SVM\SVMF32\Dims4_s16.txt +4,0, +0,0, +1,0, +100,0, +10,0, +10,0, +0, +0, +0, +0, +// Patterns\DSP\SVM\SVMF32\Reference4_s32.txt +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +0,0,0,0, +0,0,0,0, +0,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, 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+92,177,122,61, +234,151,177,186, +56,70,248,60, +170,101,234,60, +115,143,3,60, +74,166,78,189, +96,167,165,189, +20,100,86,63, +132,141,156,61, +213,3,217,59, +171,35,170,61, +133,86,201,60, +0,100,128,189, +10,63,200,189, +247,128,234,61, +213,54,191,61, +67,200,122,59, +6,80,133,63, +72,0,56,58, +125,101,216,189, +188,40,134,61, +129,180,91,189, +28,70,238,61, +54,201,2,190, +223,116,42,62, +155,168,243,61, +94,24,213,188, +15,38,144,63, +161,12,186,189, +85,155,82,61, +143,231,192,188, +36,157,57,188, +57,185,133,61, +231,21,39,190, +217,200,22,190, +129,235,248,189, +121,241,130,189, +// Patterns\DSP\SVM\SVMF32\Params5_f32.txt +137,81,136,63, +39,63,32,189, +12,119,77,189, +40,211,40,61, +200,224,17,60, +87,34,119,61, +192,141,199,189, +192,120,209,189, +133,243,187,188, +0,76,21,61, +2,184,55,189, +107,43,94,189, +189,47,89,189, +51,166,18,189, +222,64,148,61, +117,119,214,187, +136,239,54,189, +56,192,29,59, +46,160,159,59, +154,238,125,188, +160,119,136,63, +200,59,30,189, +206,177,12,59, +106,252,233,60, +1,54,72,189, +0,99,143,61, +134,250,202,58, +86,27,229,189, +118,121,0,62, +141,73,226,60, +127,20,206,188, +125,107,235,61, +61,243,229,188, +186,100,170,60, +160,144,115,189, +241,247,195,189, +74,94,52,61, +170,18,39,188, +96,239,188,60, +89,22,61,61, +25,46,71,62, +77,164,149,62, +244,104,156,62, +102,183,84,62, +77,84,112,191, +205,204,204,61, +// Patterns\DSP\SVM\SVMF32\Dims5_s16.txt +3,0, +255,255, +1,0, +100,0, +10,0, +4,0, +0, +0, +0, +0, +// Patterns\DSP\SVM\SVMF32\Reference5_s32.txt +1,0,0,0, +255,255,255,255, +1,0,0,0, +255,255,255,255, +255,255,255,255, +255,255,255,255, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +255,255,255,255, +255,255,255,255, +255,255,255,255, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +255,255,255,255, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +255,255,255,255, +1,0,0,0, +255,255,255,255, +255,255,255,255, +255,255,255,255, +1,0,0,0, +255,255,255,255, +1,0,0,0, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +255,255,255,255, +255,255,255,255, +1,0,0,0, +1,0,0,0, +1,0,0,0, +255,255,255,255, +1,0,0,0, +255,255,255,255, +1,0,0,0, +255,255,255,255, +255,255,255,255, +1,0,0,0, +1,0,0,0, +1,0,0,0, +255,255,255,255, +255,255,255,255, +1,0,0,0, +255,255,255,255, +255,255,255,255, +1,0,0,0, +255,255,255,255, +255,255,255,255, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +1,0,0,0, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +255,255,255,255, +1,0,0,0, +255,255,255,255, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +1,0,0,0, +255,255,255,255, +1,0,0,0, +1,0,0,0, +255,255,255,255, +1,0,0,0, +255,255,255,255, +255,255,255,255, +1,0,0,0, +1,0,0,0, +1,0,0,0, +255,255,255,255, +255,255,255,255, +// Patterns\DSP\BasicMaths\BasicMathsF32\Input1_f32.txt +15,152,74,61, +121,218,11,63, +157,235,194,61, +10,166,174,61, +175,34,71,190, +253,127,215,188, +38,114,159,189, +115,86,243,188, +39,69,117,187, +233,191,153,62, +173,174,146,191, +217,165,9,63, +62,244,189,190, +46,90,125,188, +35,67,169,62, +146,247,11,63, +46,159,236,61, +186,81,23,190, +101,53,120,191, +183,86,142,62, +201,101,19,61, +109,219,232,60, +71,131,10,191, +137,193,249,189, +88,39,179,190, +7,188,246,62, +169,211,138,190, +147,170,84,190, +158,233,5,63, +136,5,93,63, +176,25,65,61, +210,187,161,190, +82,174,202,62, +17,57,167,62, +220,96,232,62, +69,200,32,191, +168,94,22,62, +209,103,171,190, +63,249,28,62, +68,71,43,191, +32,143,228,190, +101,116,80,63, +0,0,128,63, +254,132,84,191, +16,109,44,63, +226,195,218,60, +247,83,117,189, +198,224,62,191, +123,218,100,61, +147,12,62,190, +239,186,241,62, +210,252,8,62, +28,202,250,189, +233,187,107,190, +19,145,4,63, +138,184,240,190, +41,26,252,62, +10,159,15,191, +121,122,151,61, +204,250,88,190, +96,80,253,190, +131,193,32,189, +230,236,191,190, +31,225,186,189, +173,213,62,61, +21,134,170,190, +155,176,212,62, +71,30,169,61, +112,131,12,62, +176,80,37,187, +251,186,133,190, +91,255,12,191, +180,90,198,61, +17,248,42,63, +10,150,142,189, +128,139,39,190, +169,127,35,63, +13,89,26,191, +107,237,34,62, +44,0,239,62, +183,163,162,190, +110,0,201,189, +104,128,173,62, +122,195,17,190, +186,71,13,190, +73,110,177,190, +250,21,119,62, +146,202,46,190, +81,161,254,190, +86,119,144,62, +194,227,99,62, +171,81,143,62, +255,220,79,60, +127,192,153,190, +134,101,84,63, +142,58,151,190, +230,101,186,60, +70,113,2,191, +89,88,177,187, +84,154,249,62, +183,23,76,190, +226,77,110,190, +142,198,178,62, +242,24,179,190, +12,126,10,63, +207,101,9,190, +73,64,149,190, +234,54,18,62, +190,91,46,191, +8,212,140,190, +220,161,146,61, +71,182,66,191, +211,55,97,63, +74,161,136,62, +14,33,11,190, +108,25,196,62, +225,22,49,62, +82,198,251,62, +158,164,155,62, +223,143,241,62, +157,166,90,62, +69,148,31,191, +78,197,71,190, +185,130,45,61, +117,135,100,190, +37,246,101,61, +93,233,197,61, +27,188,139,190, +72,78,10,191, +161,77,108,190, +33,207,195,61, +64,212,34,61, +64,151,60,62, +95,88,70,63, +58,145,16,191, +182,113,104,190, +22,173,143,190, +234,20,219,190, +10,249,80,190, +208,249,44,190, +113,137,229,190, +53,5,134,190, +31,235,11,191, +181,86,205,62, +90,27,61,191, +195,119,233,62, +197,119,2,62, +230,190,126,61, +65,188,191,190, +186,86,210,62, +78,142,66,63, +58,18,58,190, +221,62,105,190, +147,215,185,62, +60,228,127,188, +250,180,197,190, +45,174,115,190, +100,40,26,63, +237,240,44,61, +197,82,155,189, +132,234,215,190, +7,109,157,60, +83,42,135,188, +177,217,132,188, +190,117,215,189, +47,157,149,190, +180,145,136,62, +252,207,5,63, +217,192,7,63, +89,133,223,190, +223,195,1,190, +88,129,121,190, +224,131,29,62, +12,159,131,189, +212,177,107,62, +197,72,80,191, +237,179,204,62, +31,177,254,190, +195,138,127,62, +238,112,157,190, +119,62,179,190, +194,142,227,61, +56,218,215,62, +204,146,32,191, +213,59,12,191, +252,139,81,62, +53,225,27,190, +178,163,33,62, +61,213,189,59, +197,247,67,191, +156,94,1,191, +200,118,61,62, +213,246,9,191, +130,127,21,62, +231,212,125,62, +154,178,243,190, +7,213,139,190, +22,5,135,190, +27,102,77,62, +71,185,151,61, +51,168,27,62, +100,77,92,62, +157,96,41,191, +164,238,244,61, +17,157,49,191, +15,135,108,188, +229,183,208,190, +4,31,146,62, +166,172,244,62, +100,188,135,61, +214,141,181,187, +246,42,28,190, +137,79,101,190, +221,92,231,62, +209,184,160,62, +85,149,12,191, +93,45,196,60, +173,32,13,191, +146,156,60,190, +61,158,142,62, +0,189,10,190, +96,150,187,190, +146,204,59,190, +83,16,30,63, +211,136,147,190, +158,32,199,190, +102,97,42,190, +5,163,215,189, +22,75,161,190, +234,227,128,61, +198,156,42,190, +59,99,7,63, +202,189,23,190, +20,150,83,190, +89,186,25,191, +190,94,245,189, +131,115,11,189, +143,125,170,59, +16,236,36,62, +209,167,13,61, +114,148,184,188, +192,206,153,189, +13,72,173,61, +20,5,49,62, +109,27,137,191, +124,102,122,190, +83,170,214,62, +199,236,37,62, +22,31,29,63, +160,10,158,62, +83,244,125,191, +250,64,180,190, +113,127,204,62, +67,147,51,62, +247,121,26,63, +92,4,55,61, +// Patterns\DSP\BasicMaths\BasicMathsF32\Input2_f32.txt +184,38,150,60, +141,77,79,62, +200,118,16,61, +144,112,1,61, +135,150,147,189, +104,183,31,188, +57,88,236,188, +35,89,52,188, +200,199,181,186, +178,230,227,61, +228,108,217,190, +158,8,76,62, +132,200,12,190, +58,197,187,187, +49,229,250,61, +174,120,79,62, +233,94,47,61, +113,76,96,189, +77,245,183,190, +166,252,210,61, +80,124,90,60, +161,148,44,60, +214,80,77,190, +230,26,57,189, +83,199,4,190, +158,221,54,62, +253,199,205,189, +197,157,157,189, +52,127,70,62, +11,207,163,62, +118,29,143,60, +92,188,239,189, +56,55,22,62, +85,223,247,61, +203,57,44,62, +88,83,110,190, +35,228,94,61, +126,18,254,189, +21,174,104,61, +63,226,125,190, +38,101,41,190, +175,126,154,62, +151,187,189,62, +234,129,157,190, +189,149,127,62, +236,34,34,60, +195,210,181,188, +209,119,141,190, +255,156,169,60, +140,218,140,189, +36,40,51,62, +17,14,75,61, +252,222,57,189, +120,182,174,189, +127,128,68,62, +163,104,50,190, +13,216,58,62, +81,227,84,190, +214,136,224,60, +40,208,160,189, +246,189,59,190, +84,73,110,188, +137,62,14,190, +37,129,10,189, +152,111,141,60, +228,195,252,189, +61,162,29,62, +142,174,250,60, +2,72,80,61, +107,11,117,186, +19,58,198,189, +176,255,80,190, +80,2,19,61, +218,108,125,62, +130,90,211,188, +135,89,120,189, +29,90,114,62, +178,201,100,190, +88,129,113,61, +67,34,49,62, +24,20,241,189, +155,248,20,189, +240,150,0,62, +66,16,88,189, +247,106,81,189, +112,128,3,190, +73,32,183,61, +163,139,129,189, +175,183,60,190, +237,35,214,61, +36,230,168,61, +161,112,212,61, +122,14,154,59, +144,231,227,189, +152,106,157,62, +24,42,224,189, +209,37,10,60, +109,90,65,190, +46,112,3,187, +215,253,56,62, +16,67,151,189, +31,158,176,189, +151,127,4,62, +168,188,4,190, +21,73,77,62, +176,169,75,189, +168,59,221,189, +94,187,88,61, +128,57,129,190, +120,191,208,189, +229,89,217,60, +65,79,144,190, +64,235,166,62, +100,134,202,61, +181,58,78,189, +119,86,17,62, +168,63,131,61, +233,153,58,62, +44,181,230,61, +58,8,51,62, +59,13,162,61, +205,138,108,190, +14,15,148,189, +167,152,128,60, +119,95,169,189, +60,111,170,60, +80,174,18,61, +138,32,207,189, +72,2,77,190, +120,34,175,189, +103,31,17,61, +9,92,113,60, +220,197,139,61, +150,0,147,62, +79,74,86,190, +72,70,172,189, +35,248,212,189, +250,94,34,190, +253,224,154,189, +47,51,128,189, +172,30,42,190, +26,168,198,189, +59,102,79,190, +123,47,24,62, +196,39,140,190, +127,8,45,62, +14,100,65,61, +156,205,188,60, +124,26,14,190, +41,228,27,62, +160,49,144,62, +206,231,137,189, +84,222,172,189, +86,188,9,62, +3,167,189,187, +125,135,18,190, +40,154,180,189, +145,129,100,62, +153,44,128,60, +217,59,230,188, +91,6,32,190, +180,89,233,59, +151,90,200,187, +35,236,196,187, +208,175,31,189, +92,197,221,189, +74,111,202,61, +54,89,70,62, +180,57,73,62, +61,169,37,190, +101,89,64,189, +83,235,184,189, +146,123,105,61, +189,25,195,188, +0,175,174,61, +89,94,154,190, +214,182,23,62, +102,195,60,190, +180,100,189,61, +125,95,233,189, +118,216,4,190, +37,167,40,61, +71,250,31,62, +22,4,110,190, +222,221,79,190, +230,77,155,61, +252,14,103,189, +154,152,111,61, +137,177,12,59, +134,61,145,190, +75,195,63,190, +135,107,140,61, +168,128,76,190, +94,153,93,61, +47,32,188,61, +111,157,52,190, +123,69,207,189, +100,35,200,189, +229,58,152,61, +239,229,224,60, +123,186,102,61, +146,70,163,61, +227,16,123,190, +170,135,53,61, +28,163,131,190, +8,77,175,187, +182,176,26,190, +242,151,216,61, +193,86,53,62, +25,51,201,60, +193,142,6,187, +78,124,103,189, +192,243,169,189, +24,121,43,62, +112,60,238,61, +136,98,80,190, +63,101,17,60, +20,49,81,190, +205,201,139,189, +170,102,211,61, +101,166,77,189, +122,7,11,190, +165,47,139,189, +194,75,106,62, +64,176,218,189, +255,148,19,190, +132,141,124,189, +94,209,31,189, +65,21,239,189, +109,13,191,60, +135,229,124,189, +240,174,72,62, +158,236,96,189, +216,208,156,189, +116,222,99,190, +192,218,53,189, +239,180,78,188, +67,183,252,58, +67,118,116,61, +101,249,81,60, +218,204,8,188, +178,252,227,188, +44,109,0,61, +119,50,131,61, +110,59,203,190, +38,149,185,189, +13,25,31,62, +201,242,117,61, +43,230,104,62, +78,67,234,61, +120,55,188,190, +15,152,5,190, +241,143,23,62, +79,23,133,61, +123,250,100,62, +84,164,135,60, +// Parameters\DSP\BasicMaths\BasicMathsF32 +// Patterns\DSP\BasicMaths\BasicMathsQ31\Input1_q31.txt +15,188,220,68, +59,57,218,66, +251,96,148,240, +18,200,253,11, +87,93,13,215, +2,67,206,9, +200,246,125,247, +27,111,85,11, +161,253,137,63, +178,138,83,105, +25,57,108,253, +118,155,217,209, +5,210,77,101, +208,72,61,211, +36,98,250,65, +102,124,0,81, +96,191,35,202, +94,232,236,242, +182,246,15,242, +10,106,222,246, +243,149,110,28, +49,41,41,122, +50,125,199,254, +9,105,91,88, +80,74,37,208, +15,159,146,204, +75,118,139,188, +113,93,39,242, +31,20,88,237, +0,12,2,168, +178,104,83,238, +17,110,85,38, +94,124,30,213, +223,34,221,4, +17,238,157,238, +243,99,99,248, +237,210,107,182, +190,114,195,85, +192,178,220,58, +205,103,138,252, +180,102,49,226, +128,241,129,57, +190,55,138,195, +64,1,10,197, +103,14,95,253, +216,216,240,28, +164,199,145,217, +49,147,41,194, +39,63,94,47, +187,78,169,198, +198,108,72,241, +110,147,87,0, +213,163,30,40, +65,209,180,28, +238,6,128,7, +146,121,132,37, +69,33,90,68, +159,225,187,14, +200,4,208,39, +110,207,239,12, +158,218,6,218, +94,209,7,25, +143,140,212,234, +150,38,175,141, +245,191,232,94, +28,19,70,217, +216,84,170,168, +78,88,121,21, +216,115,44,80, +249,50,170,225, +75,232,74,241, +7,91,161,24, +241,31,30,49, +34,171,118,47, +189,94,237,217, +78,50,70,38, +38,232,214,14, +196,229,232,10, +58,38,9,207, +206,167,102,221, +179,10,220,222, +21,196,52,23, +27,108,161,78, +89,153,170,76, +95,178,36,234, +149,104,184,32, +227,12,68,169, +128,3,122,21, +113,198,22,177, +153,244,227,204, +123,132,195,217, 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+242,131,26,65, +252,160,48,23, +54,91,97,4, +109,209,105,65, +162,142,219,30, +160,231,181,48, +252,20,247,99, +157,163,134,215, +148,93,254,12, +234,48,20,209, +71,23,36,253, +153,160,61,238, +238,50,41,220, +212,95,35,82, +78,180,90,76, +21,82,113,57, +233,65,89,67, +0,0,0,128, +31,62,253,184, +107,44,195,191, +9,204,183,177, +69,84,194,247, +0,214,102,190, +34,40,234,38, +205,10,190,232, +245,174,27,218, +53,86,75,36, +197,105,89,240, +128,13,139,248, +193,131,145,10, +139,156,60,245, +148,105,17,193, +113,140,39,220, +46,233,93,17, +35,230,190,86, +208,68,213,35, +203,23,222,3, +55,83,95,248, +219,242,151,106, +130,77,95,191, +115,171,105,241, +13,27,106,7, +// Patterns\DSP\BasicMaths\BasicMathsQ31\Input2_q31.txt +250,221,56,25, +219,106,124,24, +96,27,90,250, +2,94,100,4, +227,135,0,241, +165,110,151,3, +126,64,226,252, +232,180,38,4, +82,188,69,23, +255,235,147,38, +7,88,14,255, +175,191,24,239, +49,196,26,37, +191,5,155,239, +124,110,42,24, +57,36,171,29, +196,200,69,236, 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+57,242, +114,98, +195,10, +54,42, +9,41, +10,28, +101,24, +60,21, +251,35, +0,128, +104,86, +194,219, +247,98, +139,163, +193,214, +85,211, +48,76, +22,247, +118,17, +20,47, +201,220, +147,83, +238,233, +159,14, +11,26, +37,15, +85,38, +173,243, +70,109, +0,128, +168,16, +109,31, +11,19, +190,69, +117,14, +28,121, +250,238, +95,8, +28,232, +33,159, +141,13, +3,200, +141,245, +48,255, +89,34, +50,244, +158,13, +119,10, +137,251, +46,157, +13,25, +119,14, +18,41, +197,250, +18,29, +137,40, +137,12, +127,25, +219,245, +222,175, +84,159, +233,209, +138,187, +220,239, +42,21, +204,235, +155,54, +153,248, +193,30, +234,199, +46,208, +135,204, +26,46, +169,64, +188,243, +254,249, +125,160, +110,5, +175,157, +13,228, +49,221, +68,88, +128,214, +222,135, +125,53, +0,233, +89,246, +172,52, +33,10, +230,236, +161,52, +209,16, +53,251, +44,247, +28,228, +76,46, +54,205, +255,127, +82,110, +250,192, +207,60, +211,41, +33,253, +94,163, +94,25, +111,228, +121,207, +41,15, +167,27, +64,228, +195,171, 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+18, +253, +1, +68, +247, +71, +94, +239, +241, +64, +218, +202, +252, +218, +37, +230, +215, +251, +5, +30, +65, +24, +14, +35, +7, +248, +30, +30, +179, +0, +7, +47, +238, +4, +242, +15, +24, +249, +171, +92, +253, +198, +182, +52, +214, +6, +235, +59, +72, +6, +205, +188, +215, +236, +58, +253, +232, +17, +205, +127, +209, +208, +247, +12, +226, +241, +31, +86, +192, +253, +66, +23, +221, +7, +228, +249, +204, +3, +191, +224, +63, +222, +253, +234, +237, +247, +210, +11, +65, +38, +64, +232, +57, +42, +15, +56, +212, +1, +53, +47, +3, +232, +176, +22, +203, +174, +63, +84, +41, +37, +205, +24, +236, +164, +49, +100, +25, +4, +91, +164, +218, +207, +227, +59, +224, +43, +13, +240, +4, +236, +234, +58, +58, +39, +250, +69, +67, +205, +47, +239, +49, +26, +11, +249, +168, +20, +235, +248, +250, +184, +201, +228, +250, +230, +51, +211, +17, +31, +32, +27, +5, +193, +49, +8, +233, +24, +3, +8, +16, +180, +224, +177, +26, +19, +216, +150, +8, +148, +55, +223, +183, +10, +206, +76, +32, +250, +37, +201, +200, +246, +30, +12, +27, +235, +219, +26, +219, +15, +64, +25, +82, +206, +// Patterns\DSP\BasicMaths\BasicMathsQ7\Input2_q7.txt +19, +242, +8, +246, +236, +26, +6, +246, +243, +253, +18, +18, +249, +6, +43, +11, +0, +6, +25, +225, +6, +22, +10, +16, +26, +216, +20, +24, +22, +39, +248, +26, +16, +235, +251, +8, +1, +26, +14, +2, +239, +230, +0, +12, +6, +231, +253, +9, +243, +236, +245, +7, +45, +239, +6, +255, +0, +24, +253, +26, +34, +250, +251, +23, +242, +237, +255, +242, +13, +247, +241, +254, +2, +11, +23, +9, +5, +12, +2, +253, +11, +11, +229, +0, +3, +17, +250, +1, +251, +5, +9, +254, +226, +33, +255, +235, +229, +19, +241, +2, +248, +21, +26, +2, +238, +232, +241, +249, +21, +255, +247, +6, +238, +46, +239, +239, +253, +4, +245, +251, +11, +31, +233, +255, +24, +8, +244, +3, +246, +253, +237, +1, +233, +245, +23, +244, +255, +248, +249, +253, +240, +4, +23, +14, +23, +247, +20, +15, +5, +20, +240, +0, +19, +17, +1, +247, +227, +8, +237, +227, +23, +30, +15, +13, +238, +8, +249, +223, +18, +36, +9, +1, +32, +223, +242, +239, +246, +21, +245, +15, +5, +250, +1, +249, +248, +21, +21, +14, +254, +25, +24, +238, +17, +250, +17, +9, +4, +254, +224, +7, +248, +253, +254, +230, +236, +246, +254, +247, +18, +240, +6, +11, +11, +10, +2, +233, +18, +3, +248, +9, +1, +3, +6, +229, +245, +228, +9, +7, +242, +218, +3, +218, +20, +244, +230, +4, +238, +27, +11, +254, +13, +236, +236, +252, +11, +4, +10, +249, +243, +9, +243, +5, +23, +9, +29, +238, +// Parameters\DSP\BasicMaths\BasicMathsQ7 +// Patterns\NN\FullyConnected\TestCase_1_10_4_input_1.txt 1, 3, 5, @@ -18,7 +10441,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_10_4_bias_1.txt +// Patterns\NN\FullyConnected\TestCase_1_10_4_bias_1.txt 4, 8, 12, @@ -27,7 +10450,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_10_4_weights_1.txt +// Patterns\NN\FullyConnected\TestCase_1_10_4_weights_1.txt 1, 3, 5, @@ -68,7 +10491,7 @@ __ALIGNED(8) const char patterns[]={ 15, 17, 19, -// Patterns/NN/FullyConnected/TestCase_1_10_4_output_1.txt +// Patterns\NN\FullyConnected\TestCase_1_10_4_output_1.txt 57, 58, 59, @@ -77,7 +10500,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_8_9_input_2.txt +// Patterns\NN\FullyConnected\TestCase_1_8_9_input_2.txt 254, 0, 255, @@ -86,7 +10509,7 @@ __ALIGNED(8) const char patterns[]={ 21, 255, 246, -// Patterns/NN/FullyConnected/TestCase_1_8_9_bias_2.txt +// Patterns\NN\FullyConnected\TestCase_1_8_9_bias_2.txt 253, 1, 254, @@ -103,7 +10526,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_8_9_weights_2.txt +// Patterns\NN\FullyConnected\TestCase_1_8_9_weights_2.txt 0, 253, 2, @@ -176,7 +10599,7 @@ __ALIGNED(8) const char patterns[]={ 127, 255, 255, -// Patterns/NN/FullyConnected/TestCase_1_8_9_output_2.txt +// Patterns\NN\FullyConnected\TestCase_1_8_9_output_2.txt 103, 102, 175, @@ -193,7 +10616,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_10_4_input_3.txt +// Patterns\NN\FullyConnected\TestCase_1_10_4_input_3.txt 245, 1, 2, @@ -210,7 +10633,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_10_4_bias_3.txt +// Patterns\NN\FullyConnected\TestCase_1_10_4_bias_3.txt 1, 2, 3, @@ -219,7 +10642,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_10_4_weights_3.txt +// Patterns\NN\FullyConnected\TestCase_1_10_4_weights_3.txt 0, 1, 2, @@ -260,7 +10683,7 @@ __ALIGNED(8) const char patterns[]={ 7, 8, 245, -// Patterns/NN/FullyConnected/TestCase_1_10_4_output_3.txt +// Patterns\NN\FullyConnected\TestCase_1_10_4_output_3.txt 25, 255, 255, @@ -269,7 +10692,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_9_1_input_4.txt +// Patterns\NN\FullyConnected\TestCase_1_9_1_input_4.txt 245, 0, 0, @@ -286,7 +10709,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_9_1_bias_4.txt +// Patterns\NN\FullyConnected\TestCase_1_9_1_bias_4.txt 253, 0, 0, @@ -295,7 +10718,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_9_1_weights_4.txt +// Patterns\NN\FullyConnected\TestCase_1_9_1_weights_4.txt 0, 253, 2, @@ -312,7 +10735,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_9_1_output_4.txt +// Patterns\NN\FullyConnected\TestCase_1_9_1_output_4.txt 168, 0, 0, @@ -321,7 +10744,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_1_8_8_input_5.txt +// Patterns\NN\FullyConnected\TestCase_1_8_8_input_5.txt 254, 0, 255, @@ -330,7 +10753,7 @@ __ALIGNED(8) const char patterns[]={ 21, 255, 246, -// Patterns/NN/FullyConnected/TestCase_1_8_8_bias_5.txt +// Patterns\NN\FullyConnected\TestCase_1_8_8_bias_5.txt 253, 1, 254, @@ -339,7 +10762,7 @@ __ALIGNED(8) const char patterns[]={ 8, 3, 2, -// Patterns/NN/FullyConnected/TestCase_1_8_8_weights_5.txt +// Patterns\NN\FullyConnected\TestCase_1_8_8_weights_5.txt 0, 253, 2, @@ -404,7 +10827,7 @@ __ALIGNED(8) const char patterns[]={ 248, 7, 8, -// Patterns/NN/FullyConnected/TestCase_1_8_8_output_5.txt +// Patterns\NN\FullyConnected\TestCase_1_8_8_output_5.txt 103, 102, 175, @@ -413,7 +10836,7 @@ __ALIGNED(8) const char patterns[]={ 127, 128, 128, -// Patterns/NN/FullyConnected/TestCase_9_6_1_input_6.txt +// Patterns\NN\FullyConnected\TestCase_9_6_1_input_6.txt 3, 5, 7, @@ -470,7 +10893,7 @@ __ALIGNED(8) const char patterns[]={ 13, 0, 0, -// Patterns/NN/FullyConnected/TestCase_9_6_1_bias_6.txt +// Patterns\NN\FullyConnected\TestCase_9_6_1_bias_6.txt 4, 0, 0, @@ -479,7 +10902,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_9_6_1_weights_6.txt +// Patterns\NN\FullyConnected\TestCase_9_6_1_weights_6.txt 1, 3, 5, @@ -488,7 +10911,7 @@ __ALIGNED(8) const char patterns[]={ 11, 0, 0, -// Patterns/NN/FullyConnected/TestCase_9_6_1_output_6.txt +// Patterns\NN\FullyConnected\TestCase_9_6_1_output_6.txt 82, 58, 248, @@ -505,7 +10928,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_1_input_7.txt +// Patterns\NN\FullyConnected\TestCase_8_8_1_input_7.txt 1, 3, 5, @@ -570,7 +10993,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_1_bias_7.txt +// Patterns\NN\FullyConnected\TestCase_8_8_1_bias_7.txt 4, 0, 0, @@ -579,7 +11002,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_1_weights_7.txt +// Patterns\NN\FullyConnected\TestCase_8_8_1_weights_7.txt 1, 3, 5, @@ -588,7 +11011,7 @@ __ALIGNED(8) const char patterns[]={ 11, 13, 239, -// Patterns/NN/FullyConnected/TestCase_8_8_1_output_7.txt +// Patterns\NN\FullyConnected\TestCase_8_8_1_output_7.txt 107, 49, 22, @@ -597,7 +11020,7 @@ __ALIGNED(8) const char patterns[]={ 58, 128, 8, -// Patterns/NN/FullyConnected/TestCase_4_10_1_input_8.txt +// Patterns\NN\FullyConnected\TestCase_4_10_1_input_8.txt 1, 3, 5, @@ -638,7 +11061,7 @@ __ALIGNED(8) const char patterns[]={ 239, 17, 235, -// Patterns/NN/FullyConnected/TestCase_4_10_1_bias_8.txt +// Patterns\NN\FullyConnected\TestCase_4_10_1_bias_8.txt 4, 0, 0, @@ -647,7 +11070,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_4_10_1_weights_8.txt +// Patterns\NN\FullyConnected\TestCase_4_10_1_weights_8.txt 1, 3, 5, @@ -664,7 +11087,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_4_10_1_output_8.txt +// Patterns\NN\FullyConnected\TestCase_4_10_1_output_8.txt 23, 57, 39, @@ -673,7 +11096,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_9_6_1_input_9.txt +// Patterns\NN\FullyConnected\TestCase_9_6_1_input_9.txt 3, 5, 7, @@ -730,7 +11153,7 @@ __ALIGNED(8) const char patterns[]={ 13, 0, 0, -// Patterns/NN/FullyConnected/TestCase_9_6_1_bias_9.txt +// Patterns\NN\FullyConnected\TestCase_9_6_1_bias_9.txt 4, 0, 0, @@ -739,7 +11162,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_9_6_1_weights_9.txt +// Patterns\NN\FullyConnected\TestCase_9_6_1_weights_9.txt 1, 3, 5, @@ -748,7 +11171,7 @@ __ALIGNED(8) const char patterns[]={ 11, 0, 0, -// Patterns/NN/FullyConnected/TestCase_9_6_1_output_9.txt +// Patterns\NN\FullyConnected\TestCase_9_6_1_output_9.txt 82, 58, 248, @@ -765,7 +11188,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_4_10_1_input_10.txt +// Patterns\NN\FullyConnected\TestCase_4_10_1_input_10.txt 1, 3, 5, @@ -806,7 +11229,7 @@ __ALIGNED(8) const char patterns[]={ 239, 17, 235, -// Patterns/NN/FullyConnected/TestCase_4_10_1_bias_10.txt +// Patterns\NN\FullyConnected\TestCase_4_10_1_bias_10.txt 4, 0, 0, @@ -815,7 +11238,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_4_10_1_weights_10.txt +// Patterns\NN\FullyConnected\TestCase_4_10_1_weights_10.txt 1, 3, 5, @@ -832,7 +11255,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_4_10_1_output_10.txt +// Patterns\NN\FullyConnected\TestCase_4_10_1_output_10.txt 23, 57, 39, @@ -841,7 +11264,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_1_input_11.txt +// Patterns\NN\FullyConnected\TestCase_8_8_1_input_11.txt 1, 3, 5, @@ -906,7 +11329,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_1_bias_11.txt +// Patterns\NN\FullyConnected\TestCase_8_8_1_bias_11.txt 4, 0, 0, @@ -915,7 +11338,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_1_weights_11.txt +// Patterns\NN\FullyConnected\TestCase_8_8_1_weights_11.txt 1, 3, 5, @@ -924,7 +11347,7 @@ __ALIGNED(8) const char patterns[]={ 11, 13, 239, -// Patterns/NN/FullyConnected/TestCase_8_8_1_output_11.txt +// Patterns\NN\FullyConnected\TestCase_8_8_1_output_11.txt 107, 49, 22, @@ -933,7 +11356,7 @@ __ALIGNED(8) const char patterns[]={ 58, 128, 8, -// Patterns/NN/FullyConnected/TestCase_9_8_4_input_12.txt +// Patterns\NN\FullyConnected\TestCase_9_8_4_input_12.txt 180, 1, 1, @@ -1006,7 +11429,7 @@ __ALIGNED(8) const char patterns[]={ 244, 2, 9, -// Patterns/NN/FullyConnected/TestCase_9_8_4_bias_12.txt +// Patterns\NN\FullyConnected\TestCase_9_8_4_bias_12.txt 254, 1, 255, @@ -1015,7 +11438,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_9_8_4_weights_12.txt +// Patterns\NN\FullyConnected\TestCase_9_8_4_weights_12.txt 2, 1, 1, @@ -1048,7 +11471,7 @@ __ALIGNED(8) const char patterns[]={ 254, 2, 0, -// Patterns/NN/FullyConnected/TestCase_9_8_4_output_12.txt +// Patterns\NN\FullyConnected\TestCase_9_8_4_output_12.txt 128, 151, 128, @@ -1089,7 +11512,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_5_input_13.txt +// Patterns\NN\FullyConnected\TestCase_8_8_5_input_13.txt 180, 1, 1, @@ -1154,7 +11577,7 @@ __ALIGNED(8) const char patterns[]={ 244, 2, 9, -// Patterns/NN/FullyConnected/TestCase_8_8_5_bias_13.txt +// Patterns\NN\FullyConnected\TestCase_8_8_5_bias_13.txt 254, 1, 255, @@ -1163,7 +11586,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_5_weights_13.txt +// Patterns\NN\FullyConnected\TestCase_8_8_5_weights_13.txt 2, 1, 1, @@ -1204,7 +11627,7 @@ __ALIGNED(8) const char patterns[]={ 254, 2, 0, -// Patterns/NN/FullyConnected/TestCase_8_8_5_output_13.txt +// Patterns\NN\FullyConnected\TestCase_8_8_5_output_13.txt 128, 128, 128, @@ -1245,7 +11668,7 @@ __ALIGNED(8) const char patterns[]={ 127, 127, 91, -// Patterns/NN/FullyConnected/TestCase_4_7_3_input_14.txt +// Patterns\NN\FullyConnected\TestCase_4_7_3_input_14.txt 0, 0, 0, @@ -1278,7 +11701,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_4_7_3_bias_14.txt +// Patterns\NN\FullyConnected\TestCase_4_7_3_bias_14.txt 0, 0, 0, @@ -1287,7 +11710,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_4_7_3_weights_14.txt +// Patterns\NN\FullyConnected\TestCase_4_7_3_weights_14.txt 0, 0, 0, @@ -1312,7 +11735,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_4_7_3_output_14.txt +// Patterns\NN\FullyConnected\TestCase_4_7_3_output_14.txt 6, 6, 6, @@ -1329,7 +11752,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_7_4_input_15.txt +// Patterns\NN\FullyConnected\TestCase_8_7_4_input_15.txt 254, 0, 255, @@ -1386,7 +11809,7 @@ __ALIGNED(8) const char patterns[]={ 243, 1, 98, -// Patterns/NN/FullyConnected/TestCase_8_7_4_bias_15.txt +// Patterns\NN\FullyConnected\TestCase_8_7_4_bias_15.txt 254, 1, 255, @@ -1395,7 +11818,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_7_4_weights_15.txt +// Patterns\NN\FullyConnected\TestCase_8_7_4_weights_15.txt 0, 0, 0, @@ -1428,7 +11851,7 @@ __ALIGNED(8) const char patterns[]={ 0, 0, 0, -// Patterns/NN/FullyConnected/TestCase_8_7_4_output_15.txt +// Patterns\NN\FullyConnected\TestCase_8_7_4_output_15.txt 238, 213, 127, @@ -1461,5 +11884,82 @@ __ALIGNED(8) const char patterns[]={ 128, 127, 127, +// Patterns\NN\FullyConnected\TestCase_1_10_4_input_1.txt +1, +3, +5, +7, +9, +11, +13, +239, +17, +235, +0, +0, +0, +0, +0, +0, +// Patterns\NN\FullyConnected\TestCase_1_10_4_bias_1.txt +4, +8, +12, +16, +0, +0, +0, +0, +// Patterns\NN\FullyConnected\TestCase_1_10_4_weights_1.txt +1, +3, +5, +7, +9, +11, +13, +15, +17, +19, +1, +3, +5, +7, +9, +11, +13, +15, +17, +19, +1, +3, +5, +7, +9, +11, +13, +15, +17, +19, +1, +3, +5, +7, +9, +11, +13, +15, +17, +19, +// Patterns\NN\FullyConnected\TestCase_1_10_4_output_1.txt +57, +58, +59, +60, +0, +0, +0, +0, +// Parameters\NN\FullyConnected }; #endif diff --git a/Testing/GeneratedInclude/SVMF32_decl.h b/Testing/GeneratedInclude/SVMF32_decl.h new file mode 100755 index 00000000..c16b79aa --- /dev/null +++ b/Testing/GeneratedInclude/SVMF32_decl.h @@ -0,0 +1,36 @@ +void test_svm_linear_predict_f32(); +void test_svm_polynomial_predict_f32(); +void test_svm_rbf_predict_f32(); +void test_svm_sigmoid_predict_f32(); + +// Pattern IDs +static const int SAMPLES1_F32_ID=0; +static const int PARAMS1_F32_ID=1; +static const int DIMS1_S16_ID=2; +static const int REF1_S32_ID=3; +static const int SAMPLES2_F32_ID=4; +static const int PARAMS2_F32_ID=5; +static const int DIMS2_S16_ID=6; +static const int REF2_S32_ID=7; +static const int SAMPLES3_F32_ID=8; +static const int PARAMS3_F32_ID=9; +static const int DIMS3_S16_ID=10; +static const int REF3_S32_ID=11; +static const int SAMPLES4_F32_ID=12; +static const int PARAMS4_F32_ID=13; +static const int DIMS4_S16_ID=14; +static const int REF4_S32_ID=15; +static const int SAMPLES5_F32_ID=16; +static const int PARAMS5_F32_ID=17; +static const int DIMS5_S16_ID=18; +static const int REF5_S32_ID=19; + +// Output IDs +static const int OUT_S32_ID=0; + +// Test IDs +static const int TEST_SVM_LINEAR_PREDICT_F32_1=1; +static const int TEST_SVM_POLYNOMIAL_PREDICT_F32_2=2; +static const int TEST_SVM_RBF_PREDICT_F32_3=3; +static const int TEST_SVM_SIGMOID_PREDICT_F32_4=4; +static const int TEST_SVM_RBF_PREDICT_F32_5=5; diff --git a/Testing/GeneratedInclude/TestDesc.h b/Testing/GeneratedInclude/TestDesc.h index ef4bda52..b3679090 100644 --- a/Testing/GeneratedInclude/TestDesc.h +++ b/Testing/GeneratedInclude/TestDesc.h @@ -1,6 +1,95 @@ #include "Test.h" #include "Pattern.h" +#include "BasicTestsF32.h" +#include "SVMF32.h" +#include "BasicMathsBenchmarksF32.h" +#include "BasicMathsBenchmarksQ31.h" +#include "BasicMathsBenchmarksQ15.h" +#include "BasicMathsBenchmarksQ7.h" #include "FullyConnected.h" +#include "FullyConnectedBench.h" +class BasicTests : public Client::Group +{ + public: + BasicTests(Testing::testID_t id):Client::Group(id) + ,BasicTestsF32Var(1) + + { + this->addContainer(&BasicTestsF32Var); + + } + private: + BasicTestsF32 BasicTestsF32Var; +; +}; +class SVMTests : public Client::Group +{ + public: + SVMTests(Testing::testID_t id):Client::Group(id) + ,SVMF32Var(1) + + { + this->addContainer(&SVMF32Var); + + } + private: + SVMF32 SVMF32Var; +; +}; +class DSPTests : public Client::Group +{ + public: + DSPTests(Testing::testID_t id):Client::Group(id) + ,BasicTestsVar(1) +,SVMTestsVar(2) + + { + this->addContainer(&BasicTestsVar); +this->addContainer(&SVMTestsVar); + + } + private: + BasicTests BasicTestsVar; +SVMTests SVMTestsVar; +; +}; +class BasicBenchmarks : public Client::Group +{ + public: + BasicBenchmarks(Testing::testID_t id):Client::Group(id) + ,BasicMathsBenchmarksF32Var(1) +,BasicMathsBenchmarksQ31Var(2) +,BasicMathsBenchmarksQ15Var(3) +,BasicMathsBenchmarksQ7Var(4) + + { + this->addContainer(&BasicMathsBenchmarksF32Var); +this->addContainer(&BasicMathsBenchmarksQ31Var); +this->addContainer(&BasicMathsBenchmarksQ15Var); +this->addContainer(&BasicMathsBenchmarksQ7Var); + + } + private: + BasicMathsBenchmarksF32 BasicMathsBenchmarksF32Var; +BasicMathsBenchmarksQ31 BasicMathsBenchmarksQ31Var; +BasicMathsBenchmarksQ15 BasicMathsBenchmarksQ15Var; +BasicMathsBenchmarksQ7 BasicMathsBenchmarksQ7Var; +; +}; +class DSPBenchmarks : public Client::Group +{ + public: + DSPBenchmarks(Testing::testID_t id):Client::Group(id) + ,BasicBenchmarksVar(1) + + { + this->addContainer(&BasicBenchmarksVar); + + } + private: + BasicBenchmarks BasicBenchmarksVar; +; +}; class NNTests : public Client::Group { public: @@ -15,17 +104,40 @@ class NNTests : public Client::Group FullyConnected FullyConnectedVar; ; }; +class NNBenchmarks : public Client::Group +{ + public: + NNBenchmarks(Testing::testID_t id):Client::Group(id) + ,FullyConnectedBenchVar(1) + + { + this->addContainer(&FullyConnectedBenchVar); + + } + private: + FullyConnectedBench FullyConnectedBenchVar; +; +}; class Root : public Client::Group { public: Root(Testing::testID_t id):Client::Group(id) - ,NNTestsVar(3) + ,DSPTestsVar(1) +,DSPBenchmarksVar(2) +,NNTestsVar(3) +,NNBenchmarksVar(4) { - this->addContainer(NULL);this->addContainer(NULL);this->addContainer(&NNTestsVar); -this->addContainer(NULL); + this->addContainer(&DSPTestsVar); +this->addContainer(&DSPBenchmarksVar); +this->addContainer(&NNTestsVar); +this->addContainer(&NNBenchmarksVar); + } private: - NNTests NNTestsVar; + DSPTests DSPTestsVar; +DSPBenchmarks DSPBenchmarksVar; +NNTests NNTestsVar; +NNBenchmarks NNBenchmarksVar; ; }; diff --git a/Testing/GeneratedInclude/TestDrive.h b/Testing/GeneratedInclude/TestDrive.h index 0ace594a..823337d8 100644 --- a/Testing/GeneratedInclude/TestDrive.h +++ b/Testing/GeneratedInclude/TestDrive.h @@ -5,6 +5,409 @@ __ALIGNED(8) const char testDesc[]={ 1,0,0,0, 'n','n', 3,0,0,0, +1,0,0,0, +'n','y','D','S','P','\0', +3,0,0,0, +1,0,0,0, +'n','y','B','a','s','i','c','M','a','t','h','s','\0', +2,0,0,0, +1,0,0,0, +'n','y','B','a','s','i','c','M','a','t','h','s','F','3','2','\0', +0,0,0,0, +12,0,0,0, +0,0,0,0, +0,1,0,0, +0,4,0,0, +0,1,0,0, +0,8,0,0, +0,1,0,0, +0,12,0,0, +0,1,0,0, +0,16,0,0, +0,1,0,0, +0,20,0,0, +0,1,0,0, +0,24,0,0, +0,1,0,0, +0,28,0,0, +0,1,0,0, +0,32,0,0, +1,0,0,0, +8,32,0,0, +1,0,0,0, +16,32,0,0, +1,0,0,0, +24,32,0,0, +0,1,0,0, +2,0,0,0, +'O','u','t','p','u','t','\0', +'S','t','a','t','e','\0', +0,0,0,0, +1,0,0,0, +1,0,0,0, +'n','n', +1,0,0,0, +2,0,0,0, +'n','n', +1,0,0,0, +3,0,0,0, +'n','n', +1,0,0,0, +4,0,0,0, +'n','n', +1,0,0,0, +5,0,0,0, +'n','n', +1,0,0,0, +6,0,0,0, +'n','n', +1,0,0,0, +7,0,0,0, +'n','n', +1,0,0,0, +8,0,0,0, +'n','n', +1,0,0,0, +9,0,0,0, +'n','n', +1,0,0,0, +10,0,0,0, +'n','n', +1,0,0,0, +11,0,0,0, +'n','n', +1,0,0,0, +12,0,0,0, +'n','n', +1,0,0,0, +13,0,0,0, +'n','n', +1,0,0,0, +14,0,0,0, +'n','n', +1,0,0,0, +15,0,0,0, +'n','n', +1,0,0,0, +16,0,0,0, +'n','n', +1,0,0,0, +17,0,0,0, +'n','n', +1,0,0,0, +18,0,0,0, +'n','n', +1,0,0,0, +19,0,0,0, +'n','n', +1,0,0,0, +20,0,0,0, +'n','n', +1,0,0,0, +21,0,0,0, +'n','n', +1,0,0,0, +22,0,0,0, +'n','n', +1,0,0,0, +23,0,0,0, +'n','n', +1,0,0,0, +24,0,0,0, +'n','n', +3,0,0,0, +2,0,0,0, +'n','y','S','V','M','\0', +2,0,0,0, +1,0,0,0, +'n','y','S','V','M','F','3','2','\0', +0,0,0,0, +20,0,0,0, +24,36,0,0, +232,3,0,0, +184,51,0,0, +67,0,0,0, +200,52,0,0, +6,0,0,0, +216,52,0,0, +100,0,0,0, +104,54,0,0, +232,3,0,0, +8,70,0,0, +113,0,0,0, +208,71,0,0, +7,0,0,0, +224,71,0,0, +100,0,0,0, +112,73,0,0, +232,3,0,0, +16,89,0,0, +112,0,0,0, +208,90,0,0, +6,0,0,0, +224,90,0,0, +100,0,0,0, +112,92,0,0, +232,3,0,0, +16,108,0,0, +113,0,0,0, +216,109,0,0, +6,0,0,0, +232,109,0,0, +100,0,0,0, +120,111,0,0, +232,3,0,0, +24,127,0,0, +46,0,0,0, +208,127,0,0, +6,0,0,0, +224,127,0,0, +100,0,0,0, +1,0,0,0, +'O','u','t','p','u','t','\0', +0,0,0,0, +1,0,0,0, +1,0,0,0, +'n','n', +1,0,0,0, +2,0,0,0, +'n','n', +1,0,0,0, +3,0,0,0, +'n','n', +1,0,0,0, +4,0,0,0, +'n','n', +1,0,0,0, +5,0,0,0, +'n','n', +3,0,0,0, +2,0,0,0, +'n','y','D','S','P','\0', +3,0,0,0, +1,0,0,0, +'n','y','B','a','s','i','c','M','a','t','h','s','\0', +2,0,0,0, +1,0,0,0, +'y',0,0,0,0, +'y','B','a','s','i','c','M','a','t','h','s','F','3','2','\0', +1,0,0,0, +2,0,0,0, +112,129,0,0, +0,1,0,0, +112,133,0,0, +0,1,0,0, +1,0,0,0, +'O','u','t','p','u','t','\0', +1,0,0,0, +'g',1,0,0,0, +6,0,0,0, +5,0,0,0, +1,0,0,0, +5,0,0,0, +16,0,0,0, +32,0,0,0, +64,0,0,0, +128,0,0,0, +0,1,0,0, +1,0,0,0, +1,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +2,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +3,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +4,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +5,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +6,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +7,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +8,0,0,0, +'y',0,0,0,0, +'n', +2,0,0,0, +2,0,0,0, +'y',0,0,0,0, +'y','B','a','s','i','c','M','a','t','h','s','Q','3','1','\0', +1,0,0,0, +2,0,0,0, +112,137,0,0, +0,1,0,0, +112,141,0,0, +0,1,0,0, +1,0,0,0, +'O','u','t','p','u','t','\0', +1,0,0,0, +'g',1,0,0,0, +6,0,0,0, +5,0,0,0, +1,0,0,0, +5,0,0,0, +16,0,0,0, +32,0,0,0, +64,0,0,0, +128,0,0,0, +0,1,0,0, +1,0,0,0, +1,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +2,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +3,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +4,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +5,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +6,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +7,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +8,0,0,0, +'y',0,0,0,0, +'n', +2,0,0,0, +3,0,0,0, +'y',0,0,0,0, +'y','B','a','s','i','c','M','a','t','h','s','Q','1','5','\0', +1,0,0,0, +2,0,0,0, +112,145,0,0, +0,1,0,0, +112,147,0,0, +0,1,0,0, +1,0,0,0, +'O','u','t','p','u','t','\0', +1,0,0,0, +'g',1,0,0,0, +6,0,0,0, +5,0,0,0, +1,0,0,0, +5,0,0,0, +16,0,0,0, +32,0,0,0, +64,0,0,0, +128,0,0,0, +0,1,0,0, +1,0,0,0, +1,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +2,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +3,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +4,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +5,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +6,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +7,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +8,0,0,0, +'y',0,0,0,0, +'n', +2,0,0,0, +4,0,0,0, +'y',0,0,0,0, +'y','B','a','s','i','c','M','a','t','h','s','Q','7','\0', +1,0,0,0, +2,0,0,0, +112,149,0,0, +0,1,0,0, +112,150,0,0, +0,1,0,0, +1,0,0,0, +'O','u','t','p','u','t','\0', +1,0,0,0, +'g',1,0,0,0, +6,0,0,0, +5,0,0,0, +1,0,0,0, +5,0,0,0, +16,0,0,0, +32,0,0,0, +64,0,0,0, +128,0,0,0, +0,1,0,0, +1,0,0,0, +1,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +2,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +3,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +4,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +5,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +6,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +7,0,0,0, +'y',0,0,0,0, +'n', +1,0,0,0, +8,0,0,0, +'y',0,0,0,0, +'n', +3,0,0,0, 3,0,0,0, 'n','y','N','N','\0', 2,0,0,0, @@ -12,157 +415,129 @@ __ALIGNED(8) const char testDesc[]={ 'n','y','F','u','l','l','y','C','o','n','n','e','c','t','e','d','\0', 0,0,0,0, 60,0,0,0, -0,0,0,0, +112,151,0,0, 10,0,0,0, -16,0,0,0, +128,151,0,0, 4,0,0,0, -24,0,0,0, +136,151,0,0, 40,0,0,0, -64,0,0,0, +176,151,0,0, 4,0,0,0, -72,0,0,0, +184,151,0,0, 8,0,0,0, -80,0,0,0, +192,151,0,0, 9,0,0,0, -96,0,0,0, +208,151,0,0, 72,0,0,0, -168,0,0,0, +24,152,0,0, 9,0,0,0, -184,0,0,0, +40,152,0,0, 10,0,0,0, -200,0,0,0, +56,152,0,0, 4,0,0,0, -208,0,0,0, +64,152,0,0, 40,0,0,0, -248,0,0,0, +104,152,0,0, 4,0,0,0, -0,1,0,0, +112,152,0,0, 9,0,0,0, -16,1,0,0, +128,152,0,0, 1,0,0,0, -24,1,0,0, +136,152,0,0, 9,0,0,0, -40,1,0,0, +152,152,0,0, 1,0,0,0, -48,1,0,0, +160,152,0,0, 8,0,0,0, -56,1,0,0, +168,152,0,0, 8,0,0,0, -64,1,0,0, +176,152,0,0, 64,0,0,0, -128,1,0,0, +240,152,0,0, 8,0,0,0, -136,1,0,0, +248,152,0,0, 54,0,0,0, -192,1,0,0, +48,153,0,0, 1,0,0,0, -200,1,0,0, +56,153,0,0, 6,0,0,0, -208,1,0,0, +64,153,0,0, 9,0,0,0, -224,1,0,0, +80,153,0,0, 64,0,0,0, -32,2,0,0, +144,153,0,0, 1,0,0,0, -40,2,0,0, +152,153,0,0, 8,0,0,0, -48,2,0,0, +160,153,0,0, 8,0,0,0, -56,2,0,0, +168,153,0,0, 40,0,0,0, -96,2,0,0, +208,153,0,0, 1,0,0,0, -104,2,0,0, +216,153,0,0, 10,0,0,0, -120,2,0,0, +232,153,0,0, 4,0,0,0, -128,2,0,0, +240,153,0,0, 54,0,0,0, -184,2,0,0, +40,154,0,0, 1,0,0,0, -192,2,0,0, +48,154,0,0, 6,0,0,0, -200,2,0,0, +56,154,0,0, 9,0,0,0, -216,2,0,0, +72,154,0,0, 40,0,0,0, -0,3,0,0, +112,154,0,0, 1,0,0,0, -8,3,0,0, +120,154,0,0, 10,0,0,0, -24,3,0,0, +136,154,0,0, 4,0,0,0, -32,3,0,0, +144,154,0,0, 64,0,0,0, -96,3,0,0, +208,154,0,0, 1,0,0,0, -104,3,0,0, +216,154,0,0, 8,0,0,0, -112,3,0,0, +224,154,0,0, 8,0,0,0, -120,3,0,0, +232,154,0,0, 72,0,0,0, -192,3,0,0, +48,155,0,0, 4,0,0,0, -200,3,0,0, +56,155,0,0, 32,0,0,0, -232,3,0,0, +88,155,0,0, 36,0,0,0, -16,4,0,0, +128,155,0,0, 64,0,0,0, -80,4,0,0, +192,155,0,0, 5,0,0,0, -88,4,0,0, +200,155,0,0, 40,0,0,0, -128,4,0,0, +240,155,0,0, 40,0,0,0, -168,4,0,0, +24,156,0,0, 28,0,0,0, -200,4,0,0, +56,156,0,0, 3,0,0,0, -208,4,0,0, +64,156,0,0, 21,0,0,0, -232,4,0,0, +88,156,0,0, 12,0,0,0, -248,4,0,0, +104,156,0,0, 56,0,0,0, -48,5,0,0, +160,156,0,0, 4,0,0,0, -56,5,0,0, +168,156,0,0, 28,0,0,0, -88,5,0,0, +200,156,0,0, 32,0,0,0, -30,0,0,0, -'O','u','t','p','u','t','1','\0', -'T','e','m','p','1','\0', -'O','u','t','p','u','t','1','9','\0', -'T','e','m','p','1','9','\0', -'O','u','t','p','u','t','2','\0', -'T','e','m','p','2','\0', -'O','u','t','p','u','t','3','\0', -'T','e','m','p','3','\0', -'O','u','t','p','u','t','4','\0', -'T','e','m','p','4','\0', -'O','u','t','p','u','t','5','\0', -'T','e','m','p','5','\0', -'O','u','t','p','u','t','6','\0', -'T','e','m','p','6','\0', -'O','u','t','p','u','t','7','\0', -'T','e','m','p','7','\0', -'O','u','t','p','u','t','8','\0', -'T','e','m','p','8','\0', -'O','u','t','p','u','t','9','\0', -'T','e','m','p','9','\0', -'O','u','t','p','u','t','1','0','\0', -'T','e','m','p','1','0','\0', -'O','u','t','p','u','t','1','1','\0', -'T','e','m','p','1','1','\0', -'O','u','t','p','u','t','1','2','\0', -'T','e','m','p','1','2','\0', -'O','u','t','p','u','t','1','3','\0', -'T','e','m','p','1','3','\0', -'O','u','t','p','u','t','1','4','\0', -'T','e','m','p','1','4','\0', +2,0,0,0, +'O','u','t','p','u','t','\0', +'T','e','m','p','\0', 0,0,0,0, 1,0,0,0, 1,0,0,0, @@ -209,5 +584,38 @@ __ALIGNED(8) const char testDesc[]={ 1,0,0,0, 15,0,0,0, 'n','n', +3,0,0,0, +4,0,0,0, +'n','y','N','N','\0', +2,0,0,0, +1,0,0,0, +'n','y','F','u','l','l','y','C','o','n','n','e','c','t','e','d','\0', +1,0,0,0, +4,0,0,0, +232,156,0,0, +10,0,0,0, +248,156,0,0, +4,0,0,0, +0,157,0,0, +40,0,0,0, +40,157,0,0, +4,0,0,0, +2,0,0,0, +'O','u','t','p','u','t','\0', +'T','e','m','p','\0', +1,0,0,0, +'g',1,0,0,0, +5,0,0,0, +4,0,0,0, +1,0,0,0, +4,0,0,0, +10,0,0,0, +20,0,0,0, +100,0,0,0, +200,0,0,0, +1,0,0,0, +1,0,0,0, +'y',0,0,0,0, +'n', }; #endif diff --git a/Testing/GeneratedSource/TestDesc.cpp b/Testing/GeneratedSource/TestDesc.cpp index 0bb120f3..dfb930c9 100644 --- a/Testing/GeneratedSource/TestDesc.cpp +++ b/Testing/GeneratedSource/TestDesc.cpp @@ -1,5 +1,102 @@ #include "Test.h" +#include "BasicTestsF32.h" + BasicTestsF32::BasicTestsF32(Testing::testID_t id):Client::Suite(id) + { + this->addTest(1,(Client::test)&BasicTestsF32::test_add_f32); +this->addTest(2,(Client::test)&BasicTestsF32::test_add_f32); +this->addTest(3,(Client::test)&BasicTestsF32::test_add_f32); +this->addTest(4,(Client::test)&BasicTestsF32::test_sub_f32); +this->addTest(5,(Client::test)&BasicTestsF32::test_sub_f32); +this->addTest(6,(Client::test)&BasicTestsF32::test_sub_f32); +this->addTest(7,(Client::test)&BasicTestsF32::test_mult_f32); +this->addTest(8,(Client::test)&BasicTestsF32::test_mult_f32); +this->addTest(9,(Client::test)&BasicTestsF32::test_mult_f32); +this->addTest(10,(Client::test)&BasicTestsF32::test_negate_f32); +this->addTest(11,(Client::test)&BasicTestsF32::test_negate_f32); +this->addTest(12,(Client::test)&BasicTestsF32::test_negate_f32); +this->addTest(13,(Client::test)&BasicTestsF32::test_offset_f32); +this->addTest(14,(Client::test)&BasicTestsF32::test_offset_f32); +this->addTest(15,(Client::test)&BasicTestsF32::test_offset_f32); +this->addTest(16,(Client::test)&BasicTestsF32::test_scale_f32); +this->addTest(17,(Client::test)&BasicTestsF32::test_scale_f32); +this->addTest(18,(Client::test)&BasicTestsF32::test_scale_f32); +this->addTest(19,(Client::test)&BasicTestsF32::test_dot_prod_f32); +this->addTest(20,(Client::test)&BasicTestsF32::test_dot_prod_f32); +this->addTest(21,(Client::test)&BasicTestsF32::test_dot_prod_f32); +this->addTest(22,(Client::test)&BasicTestsF32::test_abs_f32); +this->addTest(23,(Client::test)&BasicTestsF32::test_abs_f32); +this->addTest(24,(Client::test)&BasicTestsF32::test_abs_f32); + + } + +#include "SVMF32.h" + SVMF32::SVMF32(Testing::testID_t id):Client::Suite(id) + { + this->addTest(1,(Client::test)&SVMF32::test_svm_linear_predict_f32); +this->addTest(2,(Client::test)&SVMF32::test_svm_polynomial_predict_f32); +this->addTest(3,(Client::test)&SVMF32::test_svm_rbf_predict_f32); +this->addTest(4,(Client::test)&SVMF32::test_svm_sigmoid_predict_f32); +this->addTest(5,(Client::test)&SVMF32::test_svm_rbf_predict_f32); + + } + +#include "BasicMathsBenchmarksF32.h" + BasicMathsBenchmarksF32::BasicMathsBenchmarksF32(Testing::testID_t id):Client::Suite(id) + { + this->addTest(1,(Client::test)&BasicMathsBenchmarksF32::vec_mult_f32); +this->addTest(2,(Client::test)&BasicMathsBenchmarksF32::vec_add_f32); +this->addTest(3,(Client::test)&BasicMathsBenchmarksF32::vec_sub_f32); +this->addTest(4,(Client::test)&BasicMathsBenchmarksF32::vec_abs_f32); +this->addTest(5,(Client::test)&BasicMathsBenchmarksF32::vec_negate_f32); +this->addTest(6,(Client::test)&BasicMathsBenchmarksF32::vec_offset_f32); +this->addTest(7,(Client::test)&BasicMathsBenchmarksF32::vec_scale_f32); +this->addTest(8,(Client::test)&BasicMathsBenchmarksF32::vec_dot_f32); + + } + +#include "BasicMathsBenchmarksQ31.h" + BasicMathsBenchmarksQ31::BasicMathsBenchmarksQ31(Testing::testID_t id):Client::Suite(id) + { + this->addTest(1,(Client::test)&BasicMathsBenchmarksQ31::vec_mult_q31); +this->addTest(2,(Client::test)&BasicMathsBenchmarksQ31::vec_add_q31); +this->addTest(3,(Client::test)&BasicMathsBenchmarksQ31::vec_sub_q31); +this->addTest(4,(Client::test)&BasicMathsBenchmarksQ31::vec_abs_q31); +this->addTest(5,(Client::test)&BasicMathsBenchmarksQ31::vec_negate_q31); +this->addTest(6,(Client::test)&BasicMathsBenchmarksQ31::vec_offset_q31); +this->addTest(7,(Client::test)&BasicMathsBenchmarksQ31::vec_scale_q31); +this->addTest(8,(Client::test)&BasicMathsBenchmarksQ31::vec_dot_q31); + + } + +#include "BasicMathsBenchmarksQ15.h" + BasicMathsBenchmarksQ15::BasicMathsBenchmarksQ15(Testing::testID_t id):Client::Suite(id) + { + this->addTest(1,(Client::test)&BasicMathsBenchmarksQ15::vec_mult_q15); +this->addTest(2,(Client::test)&BasicMathsBenchmarksQ15::vec_add_q15); +this->addTest(3,(Client::test)&BasicMathsBenchmarksQ15::vec_sub_q15); +this->addTest(4,(Client::test)&BasicMathsBenchmarksQ15::vec_abs_q15); +this->addTest(5,(Client::test)&BasicMathsBenchmarksQ15::vec_negate_q15); +this->addTest(6,(Client::test)&BasicMathsBenchmarksQ15::vec_offset_q15); +this->addTest(7,(Client::test)&BasicMathsBenchmarksQ15::vec_scale_q15); +this->addTest(8,(Client::test)&BasicMathsBenchmarksQ15::vec_dot_q15); + + } + +#include "BasicMathsBenchmarksQ7.h" + BasicMathsBenchmarksQ7::BasicMathsBenchmarksQ7(Testing::testID_t id):Client::Suite(id) + { + this->addTest(1,(Client::test)&BasicMathsBenchmarksQ7::vec_mult_q7); +this->addTest(2,(Client::test)&BasicMathsBenchmarksQ7::vec_add_q7); +this->addTest(3,(Client::test)&BasicMathsBenchmarksQ7::vec_sub_q7); +this->addTest(4,(Client::test)&BasicMathsBenchmarksQ7::vec_abs_q7); +this->addTest(5,(Client::test)&BasicMathsBenchmarksQ7::vec_negate_q7); +this->addTest(6,(Client::test)&BasicMathsBenchmarksQ7::vec_offset_q7); +this->addTest(7,(Client::test)&BasicMathsBenchmarksQ7::vec_scale_q7); +this->addTest(8,(Client::test)&BasicMathsBenchmarksQ7::vec_dot_q7); + + } + #include "FullyConnected.h" FullyConnected::FullyConnected(Testing::testID_t id):Client::Suite(id) { @@ -20,3 +117,10 @@ this->addTest(14,(Client::test)&FullyConnected::test_fully_connected_tflite_s8); this->addTest(15,(Client::test)&FullyConnected::test_fully_connected_tflite_s8); } + +#include "FullyConnectedBench.h" + FullyConnectedBench::FullyConnectedBench(Testing::testID_t id):Client::Suite(id) + { + this->addTest(1,(Client::test)&FullyConnectedBench::test_fully_connected_tflite_s8); + + } diff --git a/Testing/Include/BasicMathsBenchmarksQ15.h b/Testing/Include/BasicMathsBenchmarksQ15.h new file mode 100755 index 00000000..07818bcb --- /dev/null +++ b/Testing/Include/BasicMathsBenchmarksQ15.h @@ -0,0 +1,17 @@ +#include "Test.h" +#include "Pattern.h" +class BasicMathsBenchmarksQ15:public Client::Suite + { + public: + BasicMathsBenchmarksQ15(Testing::testID_t id); + void setUp(Testing::testID_t,std::vector& params,Client::PatternMgr *mgr); + void tearDown(Testing::testID_t,Client::PatternMgr *mgr); + private: + #include "BasicMathsBenchmarksQ15_decl.h" + Client::Pattern input1; + Client::Pattern input2; + Client::LocalPattern output; + + int nb; + + }; \ No newline at end of file diff --git a/Testing/Include/BasicMathsBenchmarksQ7.h b/Testing/Include/BasicMathsBenchmarksQ7.h new file mode 100755 index 00000000..8dbff0d7 --- /dev/null +++ b/Testing/Include/BasicMathsBenchmarksQ7.h @@ -0,0 +1,17 @@ +#include "Test.h" +#include "Pattern.h" +class BasicMathsBenchmarksQ7:public Client::Suite + { + public: + BasicMathsBenchmarksQ7(Testing::testID_t id); + void setUp(Testing::testID_t,std::vector& params,Client::PatternMgr *mgr); + void tearDown(Testing::testID_t,Client::PatternMgr *mgr); + private: + #include "BasicMathsBenchmarksQ7_decl.h" + Client::Pattern input1; + Client::Pattern input2; + Client::LocalPattern output; + + int nb; + + }; \ No newline at end of file diff --git a/Testing/Include/SVMF32.h b/Testing/Include/SVMF32.h new file mode 100755 index 00000000..2912495d --- /dev/null +++ b/Testing/Include/SVMF32.h @@ -0,0 +1,38 @@ +#include "Test.h" +#include "Pattern.h" +class SVMF32:public Client::Suite + { + public: + SVMF32(Testing::testID_t id); + void setUp(Testing::testID_t,std::vector& params,Client::PatternMgr *mgr); + void tearDown(Testing::testID_t,Client::PatternMgr *mgr); + private: + #include "SVMF32_decl.h" + Client::Pattern samples; + Client::Pattern dims; + Client::Pattern params; + + Client::RefPattern ref; + Client::LocalPattern output; + + arm_svm_linear_instance_f32 linear; + arm_svm_polynomial_instance_f32 poly; + arm_svm_rbf_instance_f32 rbf; + arm_svm_sigmoid_instance_f32 sigmoid; + + int vecDim,nbSupportVectors,nbTestSamples,degree; + int classes[2]={0,0}; + float32_t intercept; + const float32_t *supportVectors; + const float32_t *dualCoefs; + float32_t coef0, gamma; + + enum { + LINEAR=1, + POLY=2, + RBF=3, + SIGMOID=4 + } kind; + + + }; \ No newline at end of file diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_1.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_1.txt index 370b68ad..085ea945 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_1.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_1.txt @@ -1,3 +1,3 @@ -0x3f50f0a2 -0x3e9dfdde -0x3f1b759e +0x3d8ad5b6 +0x3f3faddc +0x3e059380 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_10.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_10.txt index 675c0a02..1ba93b89 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_10.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_10.txt @@ -1,3 +1,3 @@ -0xbf93509c -0xbf1cde02 -0xbf4d4504 +0xbd4a980f +0xbf0bda79 +0xbdc2eb9d diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_11.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_11.txt index 1f1cbe6f..7b54dea5 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_11.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_11.txt @@ -1,8 +1,8 @@ -0xbf93509c -0xbf1cde02 -0xbf4d4504 -0xc0125f3b -0xbf180356 -0x3fdf54f1 -0xbec49138 -0xbfceaf77 +0xbd4a980f +0xbf0bda79 +0xbdc2eb9d +0xbdaea60a +0x3e4722af +0x3cd77ffd +0x3d9f7226 +0x3cf35673 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_12.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_12.txt index 49e09b17..092d9494 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_12.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_12.txt @@ -1,9 +1,9 @@ -0xbf93509c -0xbf1cde02 -0xbf4d4504 -0xc0125f3b -0xbf180356 -0x3fdf54f1 -0xbec49138 -0xbfceaf77 -0xbedf6939 +0xbd4a980f +0xbf0bda79 +0xbdc2eb9d +0xbdaea60a +0x3e4722af +0x3cd77ffd +0x3d9f7226 +0x3cf35673 +0x3b754527 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_13.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_13.txt index 0683e2e5..9894897a 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_13.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_13.txt @@ -1,3 +1,3 @@ -0x3fd3509c -0x3f8e6f01 -0x3fa6a282 +0x3f0ca981 +0x3f85ed3c +0x3f185d74 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_14.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_14.txt index 26d28c14..40d8f1a7 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_14.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_14.txt @@ -1,8 +1,8 @@ -0x3fd3509c -0x3f8e6f01 -0x3fa6a282 -0x40325f3b -0x3f8c01ab -0xbf9f54f1 -0x3f62489c -0x400757bc +0x3f0ca981 +0x3f85ed3c +0x3f185d74 +0x3f15d4c1 +0x3e9c6ea8 +0x3ef28800 +0x3ed82376 +0x3ef0ca99 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_15.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_15.txt index 0bc37c4a..b8a5730a 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_15.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_15.txt @@ -1,9 +1,9 @@ -0x3fd3509c -0x3f8e6f01 -0x3fa6a282 -0x40325f3b -0x3f8c01ab -0xbf9f54f1 -0x3f62489c -0x400757bc -0x3f6fb49c +0x3f0ca981 +0x3f85ed3c +0x3f185d74 +0x3f15d4c1 +0x3e9c6ea8 +0x3ef28800 +0x3ed82376 +0x3ef0ca99 +0x3efe1576 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_16.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_16.txt index 5d5b1268..729a31b1 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_16.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_16.txt @@ -1,3 +1,3 @@ -0x3f13509c -0x3e9cde02 -0x3ecd4504 +0x3cca980f +0x3e8bda79 +0x3d42eb9d diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_17.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_17.txt index 1e09cdc8..d5f8b11f 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_17.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_17.txt @@ -1,8 +1,8 @@ -0x3f13509c -0x3e9cde02 -0x3ecd4504 -0x3f925f3b -0x3e980356 -0xbf5f54f1 -0x3e449138 -0x3f4eaf77 +0x3cca980f +0x3e8bda79 +0x3d42eb9d +0x3d2ea60a +0xbdc722af +0xbc577ffd +0xbd1f7226 +0xbc735673 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_18.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_18.txt index 4e405fab..166cf07b 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_18.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_18.txt @@ -1,9 +1,9 @@ -0x3f13509c -0x3e9cde02 -0x3ecd4504 -0x3f925f3b -0x3e980356 -0xbf5f54f1 -0x3e449138 -0x3f4eaf77 -0x3e5f6939 +0x3cca980f +0x3e8bda79 +0x3d42eb9d +0x3d2ea60a +0xbdc722af +0xbc577ffd +0xbd1f7226 +0xbc735673 +0xbaf54527 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_2.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_2.txt index f937772a..74a3b56f 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_2.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_2.txt @@ -1,8 +1,8 @@ -0x3f50f0a2 -0x3e9dfdde -0x3f1b759e -0x3fea6ff6 -0x3ed90c26 -0xbf7bca6c -0x3fcd7bc2 -0x3fb3463e +0x3d8ad5b6 +0x3f3faddc +0x3e059380 +0x3def5e52 +0xbe8876f9 +0xbd13add8 +0xbdda8834 +0xbd26c182 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_22.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_22.txt index e493d962..654f8f8d 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_22.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_22.txt @@ -1,3 +1,3 @@ -0x3f93509c -0x3f1cde02 -0x3f4d4504 +0x3d4a980f +0x3f0bda79 +0x3dc2eb9d diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_23.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_23.txt index 55d96789..ada32d5b 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_23.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_23.txt @@ -1,8 +1,8 @@ -0x3f93509c -0x3f1cde02 -0x3f4d4504 -0x40125f3b -0x3f180356 -0x3fdf54f1 -0x3ec49138 -0x3fceaf77 +0x3d4a980f +0x3f0bda79 +0x3dc2eb9d +0x3daea60a +0x3e4722af +0x3cd77ffd +0x3d9f7226 +0x3cf35673 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_24.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_24.txt index 27c5707c..e10e19de 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_24.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_24.txt @@ -1,9 +1,9 @@ -0x3f93509c -0x3f1cde02 -0x3f4d4504 -0x40125f3b -0x3f180356 -0x3fdf54f1 -0x3ec49138 -0x3fceaf77 -0x3edf6939 +0x3d4a980f +0x3f0bda79 +0x3dc2eb9d +0x3daea60a +0x3e4722af +0x3cd77ffd +0x3d9f7226 +0x3cf35673 +0x3b754527 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_3.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_3.txt index d5a31c6d..eab19da4 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_3.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_3.txt @@ -1,9 +1,9 @@ -0x3f50f0a2 -0x3e9dfdde -0x3f1b759e -0x3fea6ff6 -0x3ed90c26 -0xbf7bca6c -0x3fcd7bc2 -0x3fb3463e -0x3f472a19 +0x3d8ad5b6 +0x3f3faddc +0x3e059380 +0x3def5e52 +0xbe8876f9 +0xbd13add8 +0xbdda8834 +0xbd26c182 +0xbba81486 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_4.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_4.txt index 1d417e81..3489527a 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_4.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_4.txt @@ -1,3 +1,3 @@ -0x3fbe28e7 -0x3f6abd15 -0x3f7f146a +0x3cff0966 +0x3eb00e2c +0x3d756072 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_5.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_5.txt index 4015feeb..a3eef4ae 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_5.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_5.txt @@ -1,8 +1,8 @@ -0x3fbe28e7 -0x3f6abd15 -0x3f7f146a -0x402f867b -0x3f438099 -0xc0206256 -0xbf56664c -0x3fea18b0 +0x3cff0966 +0x3eb00e2c +0x3d756072 +0x3d5bdb84 +0xbdfaaed7 +0xbc87a449 +0xbd48b830 +0xbc9929e2 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_6.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_6.txt index 16eef838..e17b774e 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_6.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_6.txt @@ -1,9 +1,9 @@ -0x3fbe28e7 -0x3f6abd15 -0x3f7f146a -0x402f867b -0x3f438099 -0xc0206256 -0xbf56664c -0x3fea18b0 -0x3dc1f900 +0x3cff0966 +0x3eb00e2c +0x3d756072 +0x3d5bdb84 +0xbdfaaed7 +0xbc87a449 +0xbd48b830 +0xbc9929e2 +0xbb1a6143 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_7.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_7.txt index 8ccbef8e..9b3df585 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_7.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_7.txt @@ -1,3 +1,3 @@ -0xbec53d86 -0xbe3edddf -0xbe1fc20a +0x3a6da77a +0x3de2800b +0x3b5bfdf2 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_8.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_8.txt index f7013a7f..b888eaad 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_8.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_8.txt @@ -1,8 +1,8 @@ -0xbec53d86 -0xbe3edddf -0xbe1fc20a -0xbf8559d7 -0xbdce9786 -0xbfaa0151 -0x3ef01749 -0xbeb10ba9 +0x3a6da77a +0x3de2800b +0x3b5bfdf2 +0x3b309cec +0x3c659c04 +0x398672e2 +0x3b13342e +0x39ab6d83 diff --git a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_9.txt b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_9.txt index 0ad6b6b1..c17bc40e 100644 --- a/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_9.txt +++ b/Testing/Output/DSP/BasicMaths/BasicMathsF32/Output_9.txt @@ -1,9 +1,9 @@ -0xbec53d86 -0xbe3edddf -0xbe1fc20a -0xbf8559d7 -0xbdce9786 -0xbfaa0151 -0x3ef01749 -0xbeb10ba9 -0x3e18a694 +0x3a6da77a +0x3de2800b +0x3b5bfdf2 +0x3b309cec +0x3c659c04 +0x398672e2 +0x3b13342e +0x39ab6d83 +0x36ae294d diff --git a/Testing/Output/DSP/SVM/SVMF32/Output_1.txt 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b/Testing/Output/DSP/SVM/SVMF32/Output_3.txt @@ -0,0 +1,100 @@ +0x00000001 +0x00000000 +0x00000001 +0x00000000 +0x00000001 +0x00000001 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000001 +0x00000001 +0x00000001 +0x00000000 +0x00000001 +0x00000001 +0x00000001 +0x00000000 +0x00000001 +0x00000001 +0x00000001 +0x00000000 +0x00000000 +0x00000001 +0x00000000 +0x00000001 +0x00000001 +0x00000000 +0x00000000 +0x00000000 +0x00000001 +0x00000001 +0x00000000 +0x00000000 +0x00000001 +0x00000000 +0x00000000 +0x00000000 +0x00000001 +0x00000001 +0x00000001 +0x00000000 +0x00000000 +0x00000000 +0x00000001 +0x00000001 +0x00000001 +0x00000001 +0x00000000 +0x00000001 +0x00000000 +0x00000001 +0x00000001 +0x00000000 +0x00000001 +0x00000001 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000001 +0x00000000 +0x00000001 +0x00000001 +0x00000000 +0x00000001 +0x00000000 +0x00000000 +0x00000000 +0x00000001 +0x00000001 +0x00000000 +0x00000001 +0x00000001 +0x00000000 +0x00000000 +0x00000000 +0x00000000 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+0x00000001 +0x00000001 +0x00000001 +0x00000001 +0x00000001 +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0xffffffff +0xffffffff +0xffffffff +0x00000001 +0x00000001 +0x00000001 +0x00000001 +0xffffffff +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0xffffffff +0x00000001 +0xffffffff +0xffffffff +0xffffffff +0x00000001 +0xffffffff +0x00000001 +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0xffffffff +0xffffffff +0x00000001 +0x00000001 +0x00000001 +0xffffffff +0x00000001 +0xffffffff +0x00000001 +0xffffffff +0xffffffff +0x00000001 +0x00000001 +0x00000001 +0xffffffff +0xffffffff +0x00000001 +0xffffffff +0xffffffff +0x00000001 +0xffffffff +0xffffffff +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0x00000001 +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0xffffffff +0x00000001 +0xffffffff +0x00000001 +0x00000001 +0x00000001 +0x00000001 +0x00000001 +0xffffffff +0x00000001 +0x00000001 +0xffffffff +0x00000001 +0xffffffff +0xffffffff +0x00000001 +0x00000001 +0x00000001 +0xffffffff +0xffffffff diff --git a/Testing/Output/NN/FullyConnected/Output1_1.txt b/Testing/Output/NN/FullyConnected/Output_1.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output1_1.txt rename to Testing/Output/NN/FullyConnected/Output_1.txt diff --git a/Testing/Output/NN/FullyConnected/Output7_8.txt b/Testing/Output/NN/FullyConnected/Output_10.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output7_8.txt rename to Testing/Output/NN/FullyConnected/Output_10.txt diff --git a/Testing/Output/NN/FullyConnected/Output10_11.txt b/Testing/Output/NN/FullyConnected/Output_11.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output10_11.txt rename to Testing/Output/NN/FullyConnected/Output_11.txt diff --git a/Testing/Output/NN/FullyConnected/Output11_12.txt b/Testing/Output/NN/FullyConnected/Output_12.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output11_12.txt rename to Testing/Output/NN/FullyConnected/Output_12.txt diff --git a/Testing/Output/NN/FullyConnected/Output12_13.txt b/Testing/Output/NN/FullyConnected/Output_13.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output12_13.txt rename to Testing/Output/NN/FullyConnected/Output_13.txt diff --git a/Testing/Output/NN/FullyConnected/Output13_14.txt b/Testing/Output/NN/FullyConnected/Output_14.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output13_14.txt rename to Testing/Output/NN/FullyConnected/Output_14.txt diff --git a/Testing/Output/NN/FullyConnected/Output14_15.txt b/Testing/Output/NN/FullyConnected/Output_15.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output14_15.txt rename to Testing/Output/NN/FullyConnected/Output_15.txt diff --git a/Testing/Output/NN/FullyConnected/Output19_2.txt b/Testing/Output/NN/FullyConnected/Output_2.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output19_2.txt rename to Testing/Output/NN/FullyConnected/Output_2.txt diff --git a/Testing/Output/NN/FullyConnected/Output2_3.txt b/Testing/Output/NN/FullyConnected/Output_3.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output2_3.txt rename to Testing/Output/NN/FullyConnected/Output_3.txt diff --git a/Testing/Output/NN/FullyConnected/Output3_4.txt b/Testing/Output/NN/FullyConnected/Output_4.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output3_4.txt rename to Testing/Output/NN/FullyConnected/Output_4.txt diff --git a/Testing/Output/NN/FullyConnected/Output4_5.txt b/Testing/Output/NN/FullyConnected/Output_5.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output4_5.txt rename to Testing/Output/NN/FullyConnected/Output_5.txt diff --git a/Testing/Output/NN/FullyConnected/Output5_6.txt b/Testing/Output/NN/FullyConnected/Output_6.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output5_6.txt rename to Testing/Output/NN/FullyConnected/Output_6.txt diff --git a/Testing/Output/NN/FullyConnected/Output6_7.txt b/Testing/Output/NN/FullyConnected/Output_7.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output6_7.txt rename to Testing/Output/NN/FullyConnected/Output_7.txt diff --git a/Testing/Output/NN/FullyConnected/Output9_10.txt b/Testing/Output/NN/FullyConnected/Output_8.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output9_10.txt rename to Testing/Output/NN/FullyConnected/Output_8.txt diff --git a/Testing/Output/NN/FullyConnected/Output8_9.txt b/Testing/Output/NN/FullyConnected/Output_9.txt old mode 100644 new mode 100755 similarity index 100% rename from Testing/Output/NN/FullyConnected/Output8_9.txt rename to Testing/Output/NN/FullyConnected/Output_9.txt diff --git a/Testing/PatternGeneration/BasicMaths.py b/Testing/PatternGeneration/BasicMaths.py index a178c1b9..e010731a 100644 --- a/Testing/PatternGeneration/BasicMaths.py +++ b/Testing/PatternGeneration/BasicMaths.py @@ -1,241 +1,7 @@ import os.path import numpy as np -import struct import itertools - - -def createMissingDir(destPath): - theDir=os.path.normpath(destPath) - if not os.path.exists(theDir): - os.makedirs(theDir) - -def float_to_hex(f): - """ Convert and x86 float to an ARM unsigned long int. - - Args: - f (float): value to be converted - Raises: - Nothing - Returns: - str : representation of the hex value - """ - return hex(struct.unpack(' 0x07FFFFFFF): - r = 0x07FFFFFFF - if (r < -0x080000000): - r = -0x080000000 - return hex(struct.unpack(' 0x07FFF): - r = 0x07FFF - if (r < -0x08000): - r = -0x08000 - return hex(struct.unpack(' 0x07F): - r = 0x07F - if (r < -0x080): - r = -0x080 - return hex(struct.unpack(' 0x07FFFFFFF): + r = 0x07FFFFFFF + if (r < -0x080000000): + r = -0x080000000 + return ("0x%s" % format(struct.unpack(' 0x07FFF): + r = 0x07FFF + if (r < -0x08000): + r = -0x08000 + return ("0x%s" % format(struct.unpack(' 0x07F): + r = 0x07F + if (r < -0x080): + r = -0x080 + return ("0x%s" % format(struct.unpack('nb); + + } + + void BasicMathsBenchmarksQ15::vec_add_q15() + { + + q15_t *inp1=input1.ptr(); + q15_t *inp2=input2.ptr(); + q15_t *outp=output.ptr(); + + + arm_add_q15(inp1,inp2,outp,this->nb); + + } + + void BasicMathsBenchmarksQ15::vec_sub_q15() + { + + q15_t *inp1=input1.ptr(); + q15_t *inp2=input2.ptr(); + q15_t *outp=output.ptr(); + + + arm_sub_q15(inp1,inp2,outp,this->nb); + + } + + void BasicMathsBenchmarksQ15::vec_abs_q15() + { + + q15_t *inp1=input1.ptr(); + q15_t *inp2=input2.ptr(); + q15_t *outp=output.ptr(); + + + arm_abs_q15(inp1,outp,this->nb); + + } + + void BasicMathsBenchmarksQ15::vec_negate_q15() + { + + q15_t *inp1=input1.ptr(); + q15_t *outp=output.ptr(); + + + arm_negate_q15(inp1,outp,this->nb); + + } + + void BasicMathsBenchmarksQ15::vec_offset_q15() + { + + q15_t *inp1=input1.ptr(); + q15_t *inp2=input2.ptr(); + q15_t *outp=output.ptr(); + + + arm_offset_q15(inp1,1.0,outp,this->nb); + + } + + void BasicMathsBenchmarksQ15::vec_scale_q15() + { + + q15_t *inp1=input1.ptr(); + q15_t *inp2=input2.ptr(); + q15_t *outp=output.ptr(); + + + arm_scale_q15(inp1,0x45,1,outp,this->nb); + + } + + void BasicMathsBenchmarksQ15::vec_dot_q15() + { + + q15_t *inp1=input1.ptr(); + q15_t *inp2=input2.ptr(); + q63_t result; + + + arm_dot_prod_q15(inp1,inp2,this->nb,&result); + + } + + + + void BasicMathsBenchmarksQ15::setUp(Testing::testID_t id,std::vector& params,Client::PatternMgr *mgr) + { + + + std::vector::iterator it = params.begin(); + this->nb = *it; + + input1.reload(BasicMathsBenchmarksQ15::INPUT1_Q15_ID,mgr,this->nb); + input2.reload(BasicMathsBenchmarksQ15::INPUT2_Q15_ID,mgr,this->nb); + + + output.create(this->nb,BasicMathsBenchmarksQ15::OUT_SAMPLES_Q15_ID,mgr); + + } + + void BasicMathsBenchmarksQ15::tearDown(Testing::testID_t id,Client::PatternMgr *mgr) + { + } diff --git a/Testing/Source/BasicMathsBenchmarksQ7.cpp b/Testing/Source/BasicMathsBenchmarksQ7.cpp new file mode 100755 index 00000000..8edd1509 --- /dev/null +++ b/Testing/Source/BasicMathsBenchmarksQ7.cpp @@ -0,0 +1,119 @@ +#include "BasicMathsBenchmarksQ7.h" +#include "Error.h" + + + void BasicMathsBenchmarksQ7::vec_mult_q7() + { + + q7_t *inp1=input1.ptr(); + q7_t *inp2=input2.ptr(); + q7_t *outp=output.ptr(); + + + arm_mult_q7(inp1,inp2,outp,this->nb); + + } + + void BasicMathsBenchmarksQ7::vec_add_q7() + { + + q7_t *inp1=input1.ptr(); + q7_t *inp2=input2.ptr(); + q7_t *outp=output.ptr(); + + + arm_add_q7(inp1,inp2,outp,this->nb); + + } + + void BasicMathsBenchmarksQ7::vec_sub_q7() + { + + q7_t *inp1=input1.ptr(); + q7_t *inp2=input2.ptr(); + q7_t *outp=output.ptr(); + + + arm_sub_q7(inp1,inp2,outp,this->nb); + + } + + void BasicMathsBenchmarksQ7::vec_abs_q7() + { + + q7_t *inp1=input1.ptr(); + q7_t *inp2=input2.ptr(); + q7_t *outp=output.ptr(); + + + arm_abs_q7(inp1,outp,this->nb); + + } + + void BasicMathsBenchmarksQ7::vec_negate_q7() + { + + q7_t *inp1=input1.ptr(); + q7_t *outp=output.ptr(); + + + arm_negate_q7(inp1,outp,this->nb); + + } + + void BasicMathsBenchmarksQ7::vec_offset_q7() + { + + q7_t *inp1=input1.ptr(); + q7_t *inp2=input2.ptr(); + q7_t *outp=output.ptr(); + + + arm_offset_q7(inp1,1.0,outp,this->nb); + + } + + void BasicMathsBenchmarksQ7::vec_scale_q7() + { + + q7_t *inp1=input1.ptr(); + q7_t *inp2=input2.ptr(); + q7_t *outp=output.ptr(); + + + arm_scale_q7(inp1,0x45,1,outp,this->nb); + + } + + void BasicMathsBenchmarksQ7::vec_dot_q7() + { + + q7_t *inp1=input1.ptr(); + q7_t *inp2=input2.ptr(); + q31_t result; + + + arm_dot_prod_q7(inp1,inp2,this->nb,&result); + + } + + + + void BasicMathsBenchmarksQ7::setUp(Testing::testID_t id,std::vector& params,Client::PatternMgr *mgr) + { + + + std::vector::iterator it = params.begin(); + this->nb = *it; + + input1.reload(BasicMathsBenchmarksQ7::INPUT1_Q7_ID,mgr,this->nb); + input2.reload(BasicMathsBenchmarksQ7::INPUT2_Q7_ID,mgr,this->nb); + + + output.create(this->nb,BasicMathsBenchmarksQ7::OUT_SAMPLES_Q7_ID,mgr); + + } + + void BasicMathsBenchmarksQ7::tearDown(Testing::testID_t id,Client::PatternMgr *mgr) + { + } diff --git a/Testing/Source/FullyConnected.cpp b/Testing/Source/FullyConnected.cpp index 4d3dc3c3..17329d48 100644 --- a/Testing/Source/FullyConnected.cpp +++ b/Testing/Source/FullyConnected.cpp @@ -71,8 +71,8 @@ void printPattern(char *s,Client::AnyPattern pat) ref.reload(FullyConnected::REF1_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT1_S8_ID,mgr); - temp.create(input.nbSamples(),FullyConnected::TEMP1_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(input.nbSamples(),FullyConnected::TEMP_S16_ID,mgr); colDim=input.nbSamples(); rowDim=output.nbSamples(); @@ -87,14 +87,14 @@ void printPattern(char *s,Client::AnyPattern pat) act_min =-128; act_max= 127; - input.reload(FullyConnected::INPUT19_S8_ID,mgr); - bias.reload(FullyConnected::BIAS19_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT19_S8_ID,mgr); + input.reload(FullyConnected::INPUT2_S8_ID,mgr); + bias.reload(FullyConnected::BIAS2_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT2_S8_ID,mgr); - ref.reload(FullyConnected::REF19_S8_ID,mgr); + ref.reload(FullyConnected::REF2_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT19_S8_ID,mgr); - temp.create(input.nbSamples(),FullyConnected::TEMP19_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(input.nbSamples(),FullyConnected::TEMP_S16_ID,mgr); colDim=input.nbSamples(); rowDim=output.nbSamples(); @@ -109,14 +109,14 @@ void printPattern(char *s,Client::AnyPattern pat) act_min =-1; act_max= 127; - input.reload(FullyConnected::INPUT2_S8_ID,mgr); - bias.reload(FullyConnected::BIAS2_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT2_S8_ID,mgr); + input.reload(FullyConnected::INPUT3_S8_ID,mgr); + bias.reload(FullyConnected::BIAS3_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT3_S8_ID,mgr); - ref.reload(FullyConnected::REF2_S8_ID,mgr); + ref.reload(FullyConnected::REF3_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT2_S8_ID,mgr); - temp.create(input.nbSamples(),FullyConnected::TEMP2_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(input.nbSamples(),FullyConnected::TEMP_S16_ID,mgr); colDim=input.nbSamples(); rowDim=output.nbSamples(); @@ -133,14 +133,14 @@ void printPattern(char *s,Client::AnyPattern pat) act_max= 127; - input.reload(FullyConnected::INPUT3_S8_ID,mgr); - bias.reload(FullyConnected::BIAS3_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT3_S8_ID,mgr); + input.reload(FullyConnected::INPUT4_S8_ID,mgr); + bias.reload(FullyConnected::BIAS4_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT4_S8_ID,mgr); - ref.reload(FullyConnected::REF3_S8_ID,mgr); + ref.reload(FullyConnected::REF4_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT3_S8_ID,mgr); - temp.create(input.nbSamples(),FullyConnected::TEMP3_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(input.nbSamples(),FullyConnected::TEMP_S16_ID,mgr); colDim=input.nbSamples(); rowDim=output.nbSamples(); @@ -157,14 +157,14 @@ void printPattern(char *s,Client::AnyPattern pat) act_max= 127; - input.reload(FullyConnected::INPUT4_S8_ID,mgr); - bias.reload(FullyConnected::BIAS4_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT4_S8_ID,mgr); + input.reload(FullyConnected::INPUT5_S8_ID,mgr); + bias.reload(FullyConnected::BIAS5_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT5_S8_ID,mgr); - ref.reload(FullyConnected::REF4_S8_ID,mgr); + ref.reload(FullyConnected::REF5_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT4_S8_ID,mgr); - temp.create(input.nbSamples(),FullyConnected::TEMP4_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(input.nbSamples(),FullyConnected::TEMP_S16_ID,mgr); colDim=input.nbSamples(); rowDim=output.nbSamples(); @@ -185,14 +185,14 @@ void printPattern(char *s,Client::AnyPattern pat) colDim=6; rowDim=1; - input.reload(FullyConnected::INPUT5_S8_ID,mgr); - bias.reload(FullyConnected::BIAS5_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT5_S8_ID,mgr); + input.reload(FullyConnected::INPUT6_S8_ID,mgr); + bias.reload(FullyConnected::BIAS6_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT6_S8_ID,mgr); - ref.reload(FullyConnected::REF5_S8_ID,mgr); + ref.reload(FullyConnected::REF6_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT5_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP5_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_7: @@ -211,14 +211,14 @@ void printPattern(char *s,Client::AnyPattern pat) rowDim=1; - input.reload(FullyConnected::INPUT6_S8_ID,mgr); - bias.reload(FullyConnected::BIAS6_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT6_S8_ID,mgr); + input.reload(FullyConnected::INPUT7_S8_ID,mgr); + bias.reload(FullyConnected::BIAS7_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT7_S8_ID,mgr); - ref.reload(FullyConnected::REF6_S8_ID,mgr); + ref.reload(FullyConnected::REF7_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT6_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP6_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_8: @@ -237,14 +237,14 @@ void printPattern(char *s,Client::AnyPattern pat) rowDim=1; - input.reload(FullyConnected::INPUT7_S8_ID,mgr); - bias.reload(FullyConnected::BIAS7_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT7_S8_ID,mgr); + input.reload(FullyConnected::INPUT8_S8_ID,mgr); + bias.reload(FullyConnected::BIAS8_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT8_S8_ID,mgr); - ref.reload(FullyConnected::REF7_S8_ID,mgr); + ref.reload(FullyConnected::REF8_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT7_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP7_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_9: @@ -262,14 +262,14 @@ void printPattern(char *s,Client::AnyPattern pat) colDim=6; rowDim=1; - input.reload(FullyConnected::INPUT8_S8_ID,mgr); - bias.reload(FullyConnected::BIAS8_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT8_S8_ID,mgr); + input.reload(FullyConnected::INPUT9_S8_ID,mgr); + bias.reload(FullyConnected::BIAS9_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT9_S8_ID,mgr); - ref.reload(FullyConnected::REF8_S8_ID,mgr); + ref.reload(FullyConnected::REF9_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT8_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP8_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_10: @@ -287,14 +287,14 @@ void printPattern(char *s,Client::AnyPattern pat) colDim=10; rowDim=1; - input.reload(FullyConnected::INPUT9_S8_ID,mgr); - bias.reload(FullyConnected::BIAS9_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT9_S8_ID,mgr); + input.reload(FullyConnected::INPUT10_S8_ID,mgr); + bias.reload(FullyConnected::BIAS10_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT10_S8_ID,mgr); - ref.reload(FullyConnected::REF9_S8_ID,mgr); + ref.reload(FullyConnected::REF10_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT9_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP9_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_11: @@ -312,14 +312,14 @@ void printPattern(char *s,Client::AnyPattern pat) colDim=8; rowDim=1; - input.reload(FullyConnected::INPUT10_S8_ID,mgr); - bias.reload(FullyConnected::BIAS10_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT10_S8_ID,mgr); + input.reload(FullyConnected::INPUT11_S8_ID,mgr); + bias.reload(FullyConnected::BIAS11_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT11_S8_ID,mgr); - ref.reload(FullyConnected::REF10_S8_ID,mgr); + ref.reload(FullyConnected::REF11_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT10_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP10_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_12: @@ -338,14 +338,14 @@ void printPattern(char *s,Client::AnyPattern pat) rowDim=4; - input.reload(FullyConnected::INPUT11_S8_ID,mgr); - bias.reload(FullyConnected::BIAS11_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT11_S8_ID,mgr); + input.reload(FullyConnected::INPUT12_S8_ID,mgr); + bias.reload(FullyConnected::BIAS12_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT12_S8_ID,mgr); - ref.reload(FullyConnected::REF11_S8_ID,mgr); + ref.reload(FullyConnected::REF12_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT11_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP11_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_13: @@ -363,14 +363,14 @@ void printPattern(char *s,Client::AnyPattern pat) colDim=8; rowDim=5; - input.reload(FullyConnected::INPUT12_S8_ID,mgr); - bias.reload(FullyConnected::BIAS12_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT12_S8_ID,mgr); + input.reload(FullyConnected::INPUT13_S8_ID,mgr); + bias.reload(FullyConnected::BIAS13_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT13_S8_ID,mgr); - ref.reload(FullyConnected::REF12_S8_ID,mgr); + ref.reload(FullyConnected::REF13_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT12_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP12_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_14: @@ -389,14 +389,14 @@ void printPattern(char *s,Client::AnyPattern pat) rowDim=3; - input.reload(FullyConnected::INPUT13_S8_ID,mgr); - bias.reload(FullyConnected::BIAS13_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT13_S8_ID,mgr); + input.reload(FullyConnected::INPUT14_S8_ID,mgr); + bias.reload(FullyConnected::BIAS14_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT14_S8_ID,mgr); - ref.reload(FullyConnected::REF13_S8_ID,mgr); + ref.reload(FullyConnected::REF14_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT13_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP13_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; case FullyConnected::TEST_FULLY_CONNECTED_TFLITE_S8_15: @@ -415,14 +415,14 @@ void printPattern(char *s,Client::AnyPattern pat) rowDim=4; - input.reload(FullyConnected::INPUT14_S8_ID,mgr); - bias.reload(FullyConnected::BIAS14_S8_ID,mgr); - weight.reload(FullyConnected::WEIGHT14_S8_ID,mgr); + input.reload(FullyConnected::INPUT15_S8_ID,mgr); + bias.reload(FullyConnected::BIAS15_S8_ID,mgr); + weight.reload(FullyConnected::WEIGHT15_S8_ID,mgr); - ref.reload(FullyConnected::REF14_S8_ID,mgr); + ref.reload(FullyConnected::REF15_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnected::OUTPUT14_S8_ID,mgr); - temp.create(colDim,FullyConnected::TEMP14_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnected::OUTPUT_S8_ID,mgr); + temp.create(colDim,FullyConnected::TEMP_S16_ID,mgr); break; } diff --git a/Testing/Source/FullyConnectedBench.cpp b/Testing/Source/FullyConnectedBench.cpp index b5c26aec..3bf87c94 100644 --- a/Testing/Source/FullyConnectedBench.cpp +++ b/Testing/Source/FullyConnectedBench.cpp @@ -52,14 +52,14 @@ input.reload(FullyConnectedBench::INPUT1_S8_ID,mgr); - bias.reload(FullyConnectedBench::BIAS_S8_ID,mgr); - weight.reload(FullyConnectedBench::WEIGHT_S8_ID,mgr); + bias.reload(FullyConnectedBench::BIAS1_S8_ID,mgr); + weight.reload(FullyConnectedBench::WEIGHT1_S8_ID,mgr); ref.reload(FullyConnectedBench::REF1_S8_ID,mgr); - output.create(ref.nbSamples(),FullyConnectedBench::OUTPUT1_S8_ID,mgr); - temp.create(input.nbSamples(),FullyConnectedBench::TEMP1_S16_ID,mgr); + output.create(ref.nbSamples(),FullyConnectedBench::OUTPUT_S8_ID,mgr); + temp.create(input.nbSamples(),FullyConnectedBench::TEMP_S16_ID,mgr); } diff --git a/Testing/Source/SVMF32.cpp b/Testing/Source/SVMF32.cpp new file mode 100755 index 00000000..939fe157 --- /dev/null +++ b/Testing/Source/SVMF32.cpp @@ -0,0 +1,259 @@ +#include "SVMF32.h" +#include "Error.h" + + +void SVMF32::test_svm_linear_predict_f32() +{ + const float32_t *inp = samples.ptr(); + int32_t *refp = ref.ptr(); + int32_t *outp = output.ptr(); + int32_t *result; + + result=outp; + + for(int i =0; i < this->nbTestSamples; i++) + { + arm_svm_linear_predict_f32(&this->linear,inp,result); + result++; + inp += this->vecDim; + } + + ASSERT_EQ(ref,output); + +} + + +void SVMF32::test_svm_polynomial_predict_f32() +{ + const float32_t *inp = samples.ptr(); + int32_t *refp = ref.ptr(); + int32_t *outp = output.ptr(); + int32_t *result; + + result=outp; + + for(int i =0; i < this->nbTestSamples; i++) + { + arm_svm_polynomial_predict_f32(&this->poly,inp,result); + result++; + inp += this->vecDim; + } + + ASSERT_EQ(ref,output); + +} + +void SVMF32::test_svm_rbf_predict_f32() +{ + const float32_t *inp = samples.ptr(); + int32_t *refp = ref.ptr(); + int32_t *outp = output.ptr(); + int32_t *result; + + result=outp; + + for(int i =0; i < this->nbTestSamples; i++) + { + arm_svm_rbf_predict_f32(&this->rbf,inp,result); + result++; + inp += this->vecDim; + } + + ASSERT_EQ(ref,output); + +} + +void SVMF32::test_svm_sigmoid_predict_f32() +{ + const float32_t *inp = samples.ptr(); + int32_t *refp = ref.ptr(); + int32_t *outp = output.ptr(); + int32_t *result; + + result=outp; + + for(int i =0; i < this->nbTestSamples; i++) + { + arm_svm_sigmoid_predict_f32(&this->sigmoid,inp,result); + result++; + inp += this->vecDim; + } + + ASSERT_EQ(ref,output); + +} + +void SVMF32::setUp(Testing::testID_t id,std::vector& testparams,Client::PatternMgr *mgr) +{ + + int kind; + Testing::nbSamples_t nb=MAX_NB_SAMPLES; + + switch(id) + { + case SVMF32::TEST_SVM_LINEAR_PREDICT_F32_1: + { + + samples.reload(SVMF32::SAMPLES1_F32_ID,mgr,nb); + params.reload(SVMF32::PARAMS1_F32_ID,mgr,nb); + dims.reload(SVMF32::DIMS1_S16_ID,mgr,nb); + ref.reload(SVMF32::REF1_S32_ID,mgr,nb); + } + break; + + case SVMF32::TEST_SVM_POLYNOMIAL_PREDICT_F32_2: + { + + samples.reload(SVMF32::SAMPLES2_F32_ID,mgr,nb); + params.reload(SVMF32::PARAMS2_F32_ID,mgr,nb); + dims.reload(SVMF32::DIMS2_S16_ID,mgr,nb); + ref.reload(SVMF32::REF2_S32_ID,mgr,nb); + } + break; + + case SVMF32::TEST_SVM_RBF_PREDICT_F32_3: + { + + samples.reload(SVMF32::SAMPLES3_F32_ID,mgr,nb); + params.reload(SVMF32::PARAMS3_F32_ID,mgr,nb); + dims.reload(SVMF32::DIMS3_S16_ID,mgr,nb); + ref.reload(SVMF32::REF3_S32_ID,mgr,nb); + } + break; + + case SVMF32::TEST_SVM_SIGMOID_PREDICT_F32_4: + { + + samples.reload(SVMF32::SAMPLES4_F32_ID,mgr,nb); + params.reload(SVMF32::PARAMS4_F32_ID,mgr,nb); + dims.reload(SVMF32::DIMS4_S16_ID,mgr,nb); + ref.reload(SVMF32::REF4_S32_ID,mgr,nb); + } + break; + + case SVMF32::TEST_SVM_RBF_PREDICT_F32_5: + { + + samples.reload(SVMF32::SAMPLES5_F32_ID,mgr,nb); + params.reload(SVMF32::PARAMS5_F32_ID,mgr,nb); + dims.reload(SVMF32::DIMS5_S16_ID,mgr,nb); + ref.reload(SVMF32::REF5_S32_ID,mgr,nb); + } + break; + } + + + + + const int16_t *dimsp = dims.ptr(); + const float32_t *paramsp = params.ptr(); + + kind = dimsp[0]; + + this->classes[0] = dimsp[1]; + this->classes[1] = dimsp[2]; + this->nbTestSamples=dimsp[3]; + this->vecDim = dimsp[4]; + this->nbSupportVectors = dimsp[5]; + this->intercept=paramsp[this->vecDim*this->nbSupportVectors + this->nbSupportVectors]; + this->supportVectors=paramsp; + this->dualCoefs=paramsp + (this->vecDim*this->nbSupportVectors); + + switch(kind) + { + + + case SVMF32::POLY: + this->degree = dimsp[6]; + this->coef0 =paramsp[this->vecDim*this->nbSupportVectors + this->nbSupportVectors + 1] ; + this->gamma=paramsp[this->vecDim*this->nbSupportVectors + this->nbSupportVectors + 2]; + break; + + case SVMF32::RBF: + this->gamma=paramsp[this->vecDim*this->nbSupportVectors + this->nbSupportVectors + 1]; + break; + + case SVMF32::SIGMOID: + this->coef0 =paramsp[this->vecDim*this->nbSupportVectors + this->nbSupportVectors + 1] ; + this->gamma=paramsp[this->vecDim*this->nbSupportVectors + this->nbSupportVectors + 2]; + break; + } + + + switch(id) + { + case SVMF32::TEST_SVM_LINEAR_PREDICT_F32_1: + { + + arm_svm_linear_init_f32(&linear, + this->nbSupportVectors, + this->vecDim, + this->intercept, + this->dualCoefs, + this->supportVectors, + this->classes); + } + break; + + case SVMF32::TEST_SVM_POLYNOMIAL_PREDICT_F32_2: + { + + arm_svm_polynomial_init_f32(&poly, + this->nbSupportVectors, + this->vecDim, + this->intercept, + this->dualCoefs, + this->supportVectors, + this->classes, + this->degree, + this->coef0, + this->gamma + ); + } + break; + + case SVMF32::TEST_SVM_RBF_PREDICT_F32_3: + case SVMF32::TEST_SVM_RBF_PREDICT_F32_5: + { + + arm_svm_rbf_init_f32(&rbf, + this->nbSupportVectors, + this->vecDim, + this->intercept, + this->dualCoefs, + this->supportVectors, + this->classes, + this->gamma + ); + } + break; + + case SVMF32::TEST_SVM_SIGMOID_PREDICT_F32_4: + { + + arm_svm_sigmoid_init_f32(&sigmoid, + this->nbSupportVectors, + this->vecDim, + this->intercept, + this->dualCoefs, + this->supportVectors, + this->classes, + this->coef0, + this->gamma + ); + } + break; + } + + + output.create(ref.nbSamples(),SVMF32::OUT_S32_ID,mgr); + +} + +void SVMF32::tearDown(Testing::testID_t id,Client::PatternMgr *mgr) +{ + output.dump(mgr); +} + + + diff --git a/Testing/TestDesc.txt b/Testing/TestDesc.txt index e37aa46a..21ffc12b 100644 --- a/Testing/TestDesc.txt +++ b/Testing/TestDesc.txt @@ -1,6 +1,384 @@ 3 1 n n +3 1 +n +y +DSP +3 1 +n +y +BasicMaths +2 1 +n +y +BasicMathsF32 +0 +12 +Input1_f32.txt +Input2_f32.txt +Reference1_f32.txt +Reference2_f32.txt +Reference3_f32.txt +Reference4_f32.txt +Reference5_f32.txt +Reference6_f32.txt +Reference7_f32.txt +Reference8_f32.txt +Reference9_f32.txt +Reference10_f32.txt +2 +Output +State +0 +1 1 +n +n +1 2 +n +n +1 3 +n +n +1 4 +n +n +1 5 +n +n +1 6 +n +n +1 7 +n +n +1 8 +n +n +1 9 +n +n +1 10 +n +n +1 11 +n +n +1 12 +n +n +1 13 +n +n +1 14 +n +n +1 15 +n +n +1 16 +n +n +1 17 +n +n +1 18 +n +n +1 19 +n +n +1 20 +n +n +1 21 +n +n +1 22 +n +n +1 23 +n +n +1 24 +n +n +3 2 +n +y +SVM +2 1 +n +y +SVMF32 +0 +20 +Samples1_f32.txt +Params1_f32.txt +Dims1_s16.txt +Reference1_s32.txt +Samples2_f32.txt +Params2_f32.txt +Dims2_s16.txt +Reference2_s32.txt +Samples3_f32.txt +Params3_f32.txt +Dims3_s16.txt +Reference3_s32.txt +Samples4_f32.txt +Params4_f32.txt +Dims4_s16.txt +Reference4_s32.txt +Samples5_f32.txt +Params5_f32.txt +Dims5_s16.txt +Reference5_s32.txt +1 +Output +0 +1 1 +n +n +1 2 +n +n +1 3 +n +n +1 4 +n +n +1 5 +n +n +3 2 +n +y +DSP +3 1 +n +y +BasicMaths +2 1 +y +0 +y +BasicMathsF32 +1 +2 +Input1_f32.txt +Input2_f32.txt +1 +Output +1 +g +1 +6 +5 +1 +5 +16 +32 +64 +128 +256 +1 1 +y +0 +n +1 2 +y +0 +n +1 3 +y +0 +n +1 4 +y +0 +n +1 5 +y +0 +n +1 6 +y +0 +n +1 7 +y +0 +n +1 8 +y +0 +n +2 2 +y +0 +y +BasicMathsQ31 +1 +2 +Input1_q31.txt +Input2_q31.txt +1 +Output +1 +g +1 +6 +5 +1 +5 +16 +32 +64 +128 +256 +1 1 +y +0 +n +1 2 +y +0 +n +1 3 +y +0 +n +1 4 +y +0 +n +1 5 +y +0 +n +1 6 +y +0 +n +1 7 +y +0 +n +1 8 +y +0 +n +2 3 +y +0 +y +BasicMathsQ15 +1 +2 +Input1_q15.txt +Input2_q15.txt +1 +Output +1 +g +1 +6 +5 +1 +5 +16 +32 +64 +128 +256 +1 1 +y +0 +n +1 2 +y +0 +n +1 3 +y +0 +n +1 4 +y +0 +n +1 5 +y +0 +n +1 6 +y +0 +n +1 7 +y +0 +n +1 8 +y +0 +n +2 4 +y +0 +y +BasicMathsQ7 +1 +2 +Input1_q7.txt +Input2_q7.txt +1 +Output +1 +g +1 +6 +5 +1 +5 +16 +32 +64 +128 +256 +1 1 +y +0 +n +1 2 +y +0 +n +1 3 +y +0 +n +1 4 +y +0 +n +1 5 +y +0 +n +1 6 +y +0 +n +1 7 +y +0 +n +1 8 +y +0 +n 3 3 n y @@ -71,37 +449,9 @@ TestCase_8_7_4_input_15.txt TestCase_8_7_4_bias_15.txt TestCase_8_7_4_weights_15.txt TestCase_8_7_4_output_15.txt -30 -Output1 -Temp1 -Output19 -Temp19 -Output2 -Temp2 -Output3 -Temp3 -Output4 -Temp4 -Output5 -Temp5 -Output6 -Temp6 -Output7 -Temp7 -Output8 -Temp8 -Output9 -Temp9 -Output10 -Temp10 -Output11 -Temp11 -Output12 -Temp12 -Output13 -Temp13 -Output14 -Temp14 +2 +Output +Temp 0 1 1 n @@ -148,3 +498,35 @@ n 1 15 n n +3 4 +n +y +NN +2 1 +n +y +FullyConnected +1 +4 +TestCase_1_10_4_input_1.txt +TestCase_1_10_4_bias_1.txt +TestCase_1_10_4_weights_1.txt +TestCase_1_10_4_output_1.txt +2 +Output +Temp +1 +g +1 +5 +4 +1 +4 +10 +20 +100 +200 +1 1 +y +0 +n diff --git a/Testing/TestScripts/Deprecate.py b/Testing/TestScripts/Deprecate.py new file mode 100755 index 00000000..d5227bd6 --- /dev/null +++ b/Testing/TestScripts/Deprecate.py @@ -0,0 +1,40 @@ +from collections import deque +import TestScripts.Parser + +# When deprecation is forced on some nodes +# we ensure that a parent of a valid node is also valid +def correctDeprecation(node): + current = node.data["deprecated"] + for c in node.children: + if not correctDeprecation(c): + current = False + node.data["deprecated"] = current + return(current) + +def deprecateRec(root,others,deprecated): + if others: + newOthers=others.copy() + newOthers.popleft() + if root.kind == TestScripts.Parser.TreeElem.TEST: + if others[0].isdigit() and int(root.id) == int(others[0]): + root.data["deprecated"]=False + for c in root.children: + deprecateRec(c,newOthers,False) + else: + root.data["deprecated"]=True + for c in root.children: + deprecateRec(c,others,deprecated) + else: + if root.data["class"] == others[0]: + root.data["deprecated"]=False + for c in root.children: + deprecateRec(c,newOthers,False) + else: + root.data["deprecated"]=deprecated + for c in root.children: + deprecateRec(c,others,deprecated) + +def deprecate(root,others): + if others: + deprecateRec(root,deque(others),True) + correctDeprecation(root) \ No newline at end of file diff --git a/Testing/addToDB.py b/Testing/addToDB.py new file mode 100755 index 00000000..0ef54b43 --- /dev/null +++ b/Testing/addToDB.py @@ -0,0 +1,286 @@ +# Process the test results +# Test status (like passed, or failed with error code) + +import argparse +import re +import TestScripts.NewParser as parse +import TestScripts.CodeGen +from collections import deque +import os.path +import numpy as np +import pandas as pd +import statsmodels.api as sm +import statsmodels.formula.api as smf +import csv +import TestScripts.Deprecate as d +import sqlite3 +import datetime, time +import re + +# For table creation +MKSTRFIELD=['NAME'] +MKBOOLFIELD=['HARDFP', 'FASTMATH', 'NEON', 'UNROLL', 'ROUNDING','OPTIMIZED'] +MKINTFIELD=['ID', 'CYCLES'] +MKDATEFIELD=['DATE'] +MKKEYFIELD=['CATEGORY', 'PLATFORM', 'CORE', 'COMPILER','TYPE'] +MKKEYFIELDID={'CATEGORY':'categoryid', + 'PLATFORM':'platformid', + 'CORE':'coreid', + 'COMPILER':'compilerid', + 'TYPE':'typeid'} + +# For table value extraction +VALSTRFIELD=['NAME','VERSION'] +VALBOOLFIELD=['HARDFP', 'FASTMATH', 'NEON', 'UNROLL', 'ROUNDING','OPTIMIZED'] +VALINTFIELD=['ID', 'CYCLES'] +VALDATEFIELD=['DATE'] +VALKEYFIELD=['CATEGORY', 'PLATFORM', 'CORE', 'COMPILER','TYPE'] + +def joinit(iterable, delimiter): + it = iter(iterable) + yield next(it) + for x in it: + yield delimiter + yield x + +def tableExists(c,tableName): + req=(tableName,) + r=c.execute("SELECT name FROM sqlite_master WHERE type='table' AND name=?",req) + return(r.fetchone() != None) + +def diff(first, second): + second = set(second) + return [item for item in first if item not in second] + +def getColumns(elem,full): + colsToKeep=[] + cols = list(full.columns) + params = list(joinit(elem.params.full,",")) + common = diff(cols + ["TYPE"] , ['OLDID'] + params) + + for field in common: + if field in MKSTRFIELD: + colsToKeep.append(field) + if field in MKINTFIELD: + colsToKeep.append(field) + if field in MKKEYFIELD: + colsToKeep.append(field) + if field in MKDATEFIELD: + colsToKeep.append(field) + if field in MKBOOLFIELD: + colsToKeep.append(field) + return(colsToKeep) + +def createTableIfMissing(conn,elem,tableName,full): + if not tableExists(conn,tableName): + sql = "CREATE TABLE %s (" % tableName + cols = list(full.columns) + params = list(joinit(elem.params.full,",")) + common = diff(cols + ["TYPE"] , ['OLDID'] + params) + start = "" + + for field in params: + sql += " %s\n %s INTEGER" % (start,field) + start = "," + + for field in common: + if field in MKSTRFIELD: + sql += "%s\n %s TEXT" % (start,field) + if field in MKINTFIELD: + sql += "%s\n %s INTEGER" % (start,field) + if field in MKKEYFIELD: + sql += "%s\n %s INTEGER" % (start,MKKEYFIELDID[field]) + if field in MKDATEFIELD: + sql += "%s\n %s TEXT" % (start,field) + if field in MKBOOLFIELD: + sql += "%s\n %s INTEGER" % (start,field) + start = "," + # Create foreign keys + sql += "%sFOREIGN KEY(typeid) REFERENCES TYPE(typeid)," % start + sql += "FOREIGN KEY(categoryid) REFERENCES CATEGORY(categoryid)," + sql += "FOREIGN KEY(platformid) REFERENCES PLATFORM(platformid)," + sql += "FOREIGN KEY(coreid) REFERENCES CORE(coreid)," + sql += "FOREIGN KEY(compilerid) REFERENCES COMPILER(compilerid)" + sql += " )" + #print(sql) + conn.execute(sql) + +# Find the key or add it in a table +def findInTable(conn,table,keystr,strv,key): + #print(sql) + r = conn.execute("select %s from %s where %s=?" % (key,table,keystr),(strv,)) + result=r.fetchone() + if result != None: + return(result[0]) + else: + conn.execute("INSERT INTO %s(%s) VALUES(?)" % (table,keystr),(strv,)) + conn.commit() + r = conn.execute("select %s from %s where %s=?" % (key,table,keystr),(strv,)) + result=r.fetchone() + if result != None: + #print(result) + return(result[0]) + else: + return(None) + +def findInCompilerTable(conn,kind,version): + #print(sql) + r = conn.execute("select compilerid from COMPILER where compilerkindid=? AND version=?" , (kind,version)) + result=r.fetchone() + if result != None: + return(result[0]) + else: + conn.execute("INSERT INTO COMPILER(compilerkindid,version) VALUES(?,?)" ,(kind,version)) + conn.commit() + r = conn.execute("select compilerid from COMPILER where compilerkindid=? AND version=?" , (kind,version)) + result=r.fetchone() + if result != None: + #print(result) + return(result[0]) + else: + return(None) + + +def addRows(conn,elem,tableName,full): + # List of columns we have in DB which is + # different from the columns in the table + keep = getColumns(elem,full) + cols = list(full.columns) + params = list(joinit(elem.params.full,",")) + common = diff(["TYPE"] + cols , ['OLDID'] + params) + #print(full) + for index, row in full.iterrows(): + sql = "INSERT INTO %s VALUES(" % tableName + keys = {} + + # Get data from columns + for field in common: + if field in VALSTRFIELD: + keys[field]=row[field] + if field == "NAME": + name = row[field] + if re.match(r'^.*_f64',name): + keys["TYPE"] = "f64" + if re.match(r'^.*_f32',name): + keys["TYPE"] = "f32" + if re.match(r'^.*_f16',name): + keys["TYPE"] = "f16" + if re.match(r'^.*_q31',name): + keys["TYPE"] = "q31" + if re.match(r'^.*_q15',name): + keys["TYPE"] = "q15" + if re.match(r'^.*_q7',name): + keys["TYPE"] = "q7" + + if re.match(r'^.*_s8',name): + keys["TYPE"] = "s8" + if re.match(r'^.*_u8',name): + keys["TYPE"] = "u8" + if re.match(r'^.*_s16',name): + keys["TYPE"] = "s16" + if re.match(r'^.*_u16',name): + keys["TYPE"] = "u16" + if re.match(r'^.*_s32',name): + keys["TYPE"] = "s32" + if re.match(r'^.*_u32',name): + keys["TYPE"] = "u32" + if re.match(r'^.*_s64',name): + keys["TYPE"] = "s64" + if re.match(r'^.*_u64',name): + keys["TYPE"] = "u64" + + if field in VALINTFIELD: + keys[field]=row[field] + if field in VALDATEFIELD: + keys[field]=row[field] + if field in VALBOOLFIELD: + keys[field]=row[field] + + + # Get foreign keys and create missing data + for field in common: + if field in VALKEYFIELD: + if field == "CATEGORY": + val = findInTable(conn,"CATEGORY","category",row[field],"categoryid") + keys[field]=val + if field == "CORE": + val = findInTable(conn,"CORE","coredef",row[field],"coreid") + keys[field]=val + if field == "PLATFORM": + val = findInTable(conn,"PLATFORM","platform",row[field],"platformid") + keys[field]=val + if field == "TYPE": + val = findInTable(conn,"TYPE","type",keys["TYPE"],"typeid") + keys[field]=val + if field == "COMPILER": + compilerkind = findInTable(conn,"COMPILERKIND","compiler",row[field],"compilerkindid") + compiler = findInCompilerTable(conn,compilerkind,keys["VERSION"]) + keys[field]=compiler + + # Generate sql command + start = "" + for field in params: + sql += " %s\n %d" % (start,row[field]) + start = "," + + for field in keep: + if field in MKSTRFIELD or field in MKDATEFIELD: + sql += " %s\n \"%s\"" % (start,keys[field]) + elif field in keep: + sql += " %s\n %d" % (start,keys[field]) + start = "," + + sql += " )" + #print(sql) + conn.execute(sql) + conn.commit() + +def addOneBenchmark(elem,fullPath,db,group): + full=pd.read_csv(fullPath,dtype={'OLDID': str} ,keep_default_na = False) + full['DATE'] = datetime.datetime.now() + if group: + tableName = group + else: + tableName = elem.data["class"] + conn = sqlite3.connect(db) + createTableIfMissing(conn,elem,tableName,full) + addRows(conn,elem,tableName,full) + conn.close() + + +def addToDB(benchmark,dbpath,elem,group): + if not elem.data["deprecated"]: + if elem.params: + benchPath = os.path.join(benchmark,elem.fullPath(),"fullBenchmark.csv") + print("Processing %s" % benchPath) + addOneBenchmark(elem,benchPath,dbpath,group) + + for c in elem.children: + addToDB(benchmark,dbpath,c,group) + + + +parser = argparse.ArgumentParser(description='Generate summary benchmarks') + +parser.add_argument('-f', nargs='?',type = str, default=None, help="Test description file path") +parser.add_argument('-b', nargs='?',type = str, default="FullBenchmark", help="Full Benchmark dir path") +parser.add_argument('-e', action='store_true', help="Embedded test") +parser.add_argument('-o', nargs='?',type = str, default="bench.db", help="Benchmark database") + +parser.add_argument('others', nargs=argparse.REMAINDER) + +args = parser.parse_args() + +if args.f is not None: + p = parse.Parser() + # Parse the test description file + root = p.parse(args.f) + d.deprecate(root,args.others) + if args.others: + group=args.others[0] + else: + group=None + addToDB(args.b,args.o,root,group) + +else: + parser.print_help() \ No newline at end of file diff --git a/Testing/bench.db b/Testing/bench.db new file mode 100755 index 0000000000000000000000000000000000000000..2654de0ec136d66b31280a003712c4d63cbf24cd GIT binary patch literal 57344 zcmeI*U2NM#00(e8PMkP#b1PXXQ#H*zOw`)C<)ca3@c>!sw$Yjo(rl~53Kup zP0#n?^WE<*R-H?h>4&D8orX5I*lyK2T0+<(h@$YIrU`;DL?2=Lu(uw%VvhP=CBtYoA?l?uWBwBU3T7O6K^Kp*eH3K`p3hWurv%wOpZM zOc>?EG^JkaG#*=QpKs1OQwy0qt;9H8VMTId&aCWAcFLG`rW8w+Tt4@R;VL$nDUXep zoW;g7)0KRtGU-e!7{!7!ezH(5PE9#e%Egm~v0P!onYJ`v>##r8+-z|{>q)yD2l1^el?wL5l; z%+q$unImB}f_K+UaXm|{>diy9osB2xq}tRoosY3zm*xK0LGc+E9jnRB$13n|OSn;% zPg2Xnbwd3qAHT}3-S4tvWo#+7FK=teayB_`GICB_b~UCm*Ag*j?zGqO+_RthX7}tX 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z8Bw_0X{>arb8LaTTDMoYtDU*|W~WhI84>^V`Qp*o=uk906pw4M;bX(eWAV`=qseq? zIOZ?X_s?&tadzhlg}<)tRAIrxEA%*;xOe9YqgQsSuPpNVe2)5pJJ%-&e+!YHcB=Cq DTF^w# literal 0 HcmV?d00001 diff --git a/Testing/convertToOld.py b/Testing/convertToOld.py new file mode 100755 index 00000000..59201555 --- /dev/null +++ b/Testing/convertToOld.py @@ -0,0 +1,111 @@ +# Process the test results +# Test status (like passed, or failed with error code) + +import argparse +import re +import TestScripts.NewParser as parse +import TestScripts.CodeGen +from collections import deque +import os.path +import numpy as np +import pandas as pd +import statsmodels.api as sm +import statsmodels.formula.api as smf +import csv +import TestScripts.Deprecate as d + +result = [] +commonParams = [] + +def findItem(root,path): + """ Find a node in a tree + + Args: + path (list) : A list of node ID + This list is describing a path in the tree. + By starting from the root and following this path, + we can find the node in the tree. + Raises: + Nothing + Returns: + TreeItem : A node + """ + # The list is converted into a queue. + q = deque(path) + q.popleft() + c = root + while q: + n = q.popleft() + # We get the children based on its ID and continue + c = c[n-1] + return(c) + + + +NORMAL = 1 +INTEST = 2 +TESTPARAM = 3 + +def joinit(iterable, delimiter): + it = iter(iterable) + yield next(it) + for x in it: + yield delimiter + yield x + +def formatProd(a,b): + if a == "Intercept": + return(str(b)) + return("%s * %s" % (a,b)) + +def convert(elem,fullPath): + global commonParams + global result + regressionPath=os.path.join(os.path.dirname(fullPath),"regression.csv") + full=pd.read_csv(fullPath,dtype={'OLDID': str} ,keep_default_na = False) + reg=pd.read_csv(regressionPath,dtype={'OLDID': str} ,keep_default_na = False) + commonParams = list(joinit(elem.params.full,",")) + header = ["OLDID"] + commonParams + ["CYCLES"] + + r=full[header].rename(columns = {"OLDID":"TESTNB"}) + r["TESTNB"] = pd.to_numeric(r["TESTNB"]) + r["PASSED"]=1 + result.append(r) + + +def extractBenchmarks(benchmark,elem): + if not elem.data["deprecated"]: + if elem.params: + benchPath = os.path.join(benchmark,elem.fullPath(),"fullBenchmark.csv") + print("Processing %s" % benchPath) + convert(elem,benchPath) + + for c in elem.children: + extractBenchmarks(benchmark,c) + + + +parser = argparse.ArgumentParser(description='Generate summary benchmarks') + +parser.add_argument('-f', nargs='?',type = str, default=None, help="Test description file path") +parser.add_argument('-b', nargs='?',type = str, default="FullBenchmark", help="Full Benchmark dir path") +parser.add_argument('-e', action='store_true', help="Embedded test") +parser.add_argument('-o', nargs='?',type = str, default="bench.csv", help="Output csv file using old format") + +parser.add_argument('others', nargs=argparse.REMAINDER) + +args = parser.parse_args() + +if args.f is not None: + p = parse.Parser() + # Parse the test description file + root = p.parse(args.f) + d.deprecate(root,args.others) + extractBenchmarks(args.b,root) + finalResult = pd.concat(result) + cols = ['TESTNB'] + commonParams + finalResult=finalResult.sort_values(by=cols) + finalResult.to_csv(args.o,index=False,quoting=csv.QUOTE_NONNUMERIC) + +else: + parser.print_help() \ No newline at end of file diff --git a/Testing/createDb.sql b/Testing/createDb.sql new file mode 100755 index 00000000..64737b35 --- /dev/null +++ b/Testing/createDb.sql @@ -0,0 +1,72 @@ +CREATE TABLE CORE ( + coreid INTEGER PRIMARY KEY, + core text, + coredef text); + +CREATE INDEX coredef_index ON CORE(coredef); + +CREATE TABLE PLATFORM ( + platformid INTEGER PRIMARY KEY, + platform text ); + +CREATE INDEX platform_index ON PLATFORM(platform); + +CREATE TABLE COMPILERKIND ( + compilerkindid INTEGER PRIMARY KEY, + compiler text); + +CREATE INDEX compilerkind_index ON COMPILERKIND(compiler); + +CREATE TABLE COMPILER ( + compilerid INTEGER PRIMARY KEY, + compilerkindid INTEGER , + version text, + FOREIGN KEY(compilerkindid) REFERENCES COMPILERKIND(compilerkindid) + ); + +CREATE INDEX compiler_index ON COMPILER(compilerkindid,version); + +CREATE TABLE TYPE ( + typeid INTEGER PRIMARY KEY, + type text ); + +CREATE INDEX type_index ON TYPE(type); + +CREATE TABLE CATEGORY ( + categoryid INTEGER PRIMARY KEY, + category text); + +CREATE INDEX category_index ON CATEGORY(category); + +INSERT INTO TYPE VALUES(1, "q7"); +INSERT INTO TYPE VALUES(2, "q15"); +INSERT INTO TYPE VALUES(3, "q31"); +INSERT INTO TYPE VALUES(4, "f16"); +INSERT INTO TYPE VALUES(5, "f32"); +INSERT INTO TYPE VALUES(6, "f64"); +INSERT INTO TYPE VALUES(7, "s8"); +INSERT INTO TYPE VALUES(8, "u8"); +INSERT INTO TYPE VALUES(9, "s16"); +INSERT INTO TYPE VALUES(10,"u16"); +INSERT INTO TYPE VALUES(11,"s32"); +INSERT INTO TYPE VALUES(12,"u32"); +INSERT INTO TYPE VALUES(13,"s64"); +INSERT INTO TYPE VALUES(14,"u64"); + +INSERT INTO COMPILERKIND VALUES(1,"AC6"); +INSERT INTO COMPILERKIND VALUES(2,"GCC"); + +INSERT INTO COMPILER VALUES(1,1,"6120001"); + +INSERT INTO CORE VALUES(1,"m0","ARMCM0"); +INSERT INTO CORE VALUES(2,"m0p","ARMCM0P"); +INSERT INTO CORE VALUES(3,"m3","ARMCM3"); +INSERT INTO CORE VALUES(4,"m4f","ARMCM4_FP"); +INSERT INTO CORE VALUES(5,"m7","ARMCM7_DP"); +INSERT INTO CORE VALUES(6,"m23","ARMCM23"); +INSERT INTO CORE VALUES(7,"m33","ARMCM33_DSP_FP"); +INSERT INTO CORE VALUES(8,"m35","ARMCM35P_DSP_FP"); +INSERT INTO CORE VALUES(9,"a5","ARMCA5"); +INSERT INTO CORE VALUES(10,"a7","ARMCA7"); +INSERT INTO CORE VALUES(11,"a9","ARMCA9"); +INSERT INTO CORE VALUES(12,"a15","ARMCA15"); diff --git a/Testing/currentConfig.csv b/Testing/currentConfig.csv index 0878d54a..ca8c4002 100644 --- a/Testing/currentConfig.csv +++ b/Testing/currentConfig.csv @@ -1,2 +1,2 @@ OPTIMIZED,HARDFP,FASTMATH,NEON,UNROLL,ROUNDING,PLATFORM,CORE,COMPILER,VERSION -1,1,1,1,1,0,YaminFVP,ARMCM33_DSP_FP,AC6,6120001 +1,1,1,0,1,0,FVP,ARMCM7_DP,AC6,6120001 diff --git a/Testing/desc.txt b/Testing/desc.txt index 209c23a5..27d0f5bf 100644 --- a/Testing/desc.txt +++ b/Testing/desc.txt @@ -65,6 +65,51 @@ group Root { } } } + + group SVM Tests { + class = SVMTests + folder = SVM + + suite SVM F32 { + class = SVMF32 + folder = SVMF32 + + Pattern SAMPLES1_F32_ID : Samples1_f32.txt + Pattern PARAMS1_F32_ID : Params1_f32.txt + Pattern DIMS1_S16_ID : Dims1_s16.txt + Pattern REF1_S32_ID : Reference1_s32.txt + + Pattern SAMPLES2_F32_ID : Samples2_f32.txt + Pattern PARAMS2_F32_ID : Params2_f32.txt + Pattern DIMS2_S16_ID : Dims2_s16.txt + Pattern REF2_S32_ID : Reference2_s32.txt + + Pattern SAMPLES3_F32_ID : Samples3_f32.txt + Pattern PARAMS3_F32_ID : Params3_f32.txt + Pattern DIMS3_S16_ID : Dims3_s16.txt + Pattern REF3_S32_ID : Reference3_s32.txt + + Pattern SAMPLES4_F32_ID : Samples4_f32.txt + Pattern PARAMS4_F32_ID : Params4_f32.txt + Pattern DIMS4_S16_ID : Dims4_s16.txt + Pattern REF4_S32_ID : Reference4_s32.txt + + Pattern SAMPLES5_F32_ID : Samples5_f32.txt + Pattern PARAMS5_F32_ID : Params5_f32.txt + Pattern DIMS5_S16_ID : Dims5_s16.txt + Pattern REF5_S32_ID : Reference5_s32.txt + + Output OUT_S32_ID : Output + + Functions { + arm_svm_linear_predict_f32:test_svm_linear_predict_f32 + arm_svm_polynomial_predict_f32:test_svm_polynomial_predict_f32 + arm_svm_rbf_predict_f32:test_svm_rbf_predict_f32 + arm_svm_sigmoid_predict_f32:test_svm_sigmoid_predict_f32 + arm_svm_oneclass_predict_f32:test_svm_rbf_predict_f32 + } + } + } } group DSP Benchmarks { @@ -94,14 +139,30 @@ group Root { } Functions { - vec_mult_f32:vec_mult_f32 - vec_add_f32:vec_add_f32 - vec_sub_f32:vec_sub_f32 - vec_abs_f32:vec_abs_f32 - vec_negate_f32:vec_negate_f32 - vec_offset_f32:vec_offset_f32 - vec_scale_f32:vec_scale_f32 - vec_dot_f32:vec_dot_f32 + vec_mult_f32:vec_mult_f32 { + oldID = 0 + } + vec_add_f32:vec_add_f32 { + oldID = 5 + } + vec_sub_f32:vec_sub_f32 { + oldID = 10 + } + vec_abs_f32:vec_abs_f32 { + oldID = 15 + } + vec_negate_f32:vec_negate_f32 { + oldID = 20 + } + vec_offset_f32:vec_offset_f32 { + oldID = 25 + } + vec_scale_f32:vec_scale_f32 { + oldID = 30 + } + vec_dot_f32:vec_dot_f32 { + oldID = 38 + } } -> PARAM1_ID } @@ -124,14 +185,123 @@ group Root { } Functions { - vec_mult_q31:vec_mult_q31 - vec_add_q31:vec_add_q31 + vec_mult_q31:vec_mult_q31 { + oldID = 2 + } + vec_add_q31:vec_add_q31 { + oldID = 7 + } vec_sub_q31:vec_sub_q31 - vec_abs_q31:vec_abs_q31 - vec_negate_q31:vec_negate_q31 - vec_offset_q31:vec_offset_q31 - vec_scale_q31:vec_scale_q31 - vec_dot_q31:vec_dot_q31 + { + oldID = 12 + } + vec_abs_q31:vec_abs_q31 { + oldID = 17 + } + vec_negate_q31:vec_negate_q31 { + oldID = 22 + } + vec_offset_q31:vec_offset_q31 { + oldID = 27 + } + vec_scale_q31:vec_scale_q31 { + oldID = 32 + } + vec_dot_q31:vec_dot_q31 { + oldID = 40 + } + } -> PARAM1_ID + } + + suite BasicMaths Benchmarks Q15 { + class = BasicMathsBenchmarksQ15 + folder = BasicMathsQ15 + + ParamList { + NB + Summary NB + Names "NB Samples" + Formula "NB" + } + + Pattern INPUT1_Q15_ID : Input1_q15.txt + Pattern INPUT2_Q15_ID : Input2_q15.txt + Output OUT_SAMPLES_Q15_ID : Output + Params PARAM1_ID = { + A = [16,32,64,128,256] + } + + Functions { + vec_mult_q15:vec_mult_q15 { + oldID = 3 + } + vec_add_q15:vec_add_q15 { + oldID = 8 + } + vec_sub_q15:vec_sub_q15 { + oldID = 13 + } + vec_abs_q15:vec_abs_q15 { + oldID = 18 + } + vec_negate_q15:vec_negate_q15 { + oldID = 23 + } + vec_offset_q15:vec_offset_q15 { + oldID = 28 + } + vec_scale_q15:vec_scale_q15 { + oldID = 33 + } + vec_dot_q15:vec_dot_q15 { + oldID = 41 + } + } -> PARAM1_ID + } + + suite BasicMaths Benchmarks Q7 { + class = BasicMathsBenchmarksQ7 + folder = BasicMathsQ7 + + ParamList { + NB + Summary NB + Names "NB Samples" + Formula "NB" + } + + Pattern INPUT1_Q7_ID : Input1_q7.txt + Pattern INPUT2_Q7_ID : Input2_q7.txt + Output OUT_SAMPLES_Q7_ID : Output + Params PARAM1_ID = { + A = [16,32,64,128,256] + } + + Functions { + vec_mult_q7:vec_mult_q7 { + oldID = 4 + } + vec_add_q7:vec_add_q7 { + oldID = 9 + } + vec_sub_q7:vec_sub_q7 { + oldID = 14 + } + vec_abs_q7:vec_abs_q7 { + oldID = 19 + } + vec_negate_q7:vec_negate_q7 { + oldID = 24 + } + vec_offset_q7:vec_offset_q7 { + oldID = 29 + } + vec_scale_q7:vec_scale_q7 { + oldID = 34 + } + vec_dot_q7:vec_dot_q7 { + oldID = 42 + } } -> PARAM1_ID } } @@ -154,140 +324,108 @@ group Root { Pattern REF1_S8_ID : TestCase_1_10_4_output_1.txt // 2 - Pattern INPUT19_S8_ID : TestCase_1_8_9_input_2.txt - Pattern BIAS19_S8_ID : TestCase_1_8_9_bias_2.txt - Pattern WEIGHT19_S8_ID : TestCase_1_8_9_weights_2.txt - Pattern REF19_S8_ID : TestCase_1_8_9_output_2.txt + Pattern INPUT2_S8_ID : TestCase_1_8_9_input_2.txt + Pattern BIAS2_S8_ID : TestCase_1_8_9_bias_2.txt + Pattern WEIGHT2_S8_ID : TestCase_1_8_9_weights_2.txt + Pattern REF2_S8_ID : TestCase_1_8_9_output_2.txt // 3 - Pattern INPUT2_S8_ID : TestCase_1_10_4_input_3.txt - Pattern BIAS2_S8_ID : TestCase_1_10_4_bias_3.txt - Pattern WEIGHT2_S8_ID : TestCase_1_10_4_weights_3.txt - Pattern REF2_S8_ID : TestCase_1_10_4_output_3.txt + Pattern INPUT3_S8_ID : TestCase_1_10_4_input_3.txt + Pattern BIAS3_S8_ID : TestCase_1_10_4_bias_3.txt + Pattern WEIGHT3_S8_ID : TestCase_1_10_4_weights_3.txt + Pattern REF3_S8_ID : TestCase_1_10_4_output_3.txt // 4 - Pattern INPUT3_S8_ID : TestCase_1_9_1_input_4.txt - Pattern BIAS3_S8_ID : TestCase_1_9_1_bias_4.txt - Pattern WEIGHT3_S8_ID : TestCase_1_9_1_weights_4.txt - Pattern REF3_S8_ID : TestCase_1_9_1_output_4.txt + Pattern INPUT4_S8_ID : TestCase_1_9_1_input_4.txt + Pattern BIAS4_S8_ID : TestCase_1_9_1_bias_4.txt + Pattern WEIGHT4_S8_ID : TestCase_1_9_1_weights_4.txt + Pattern REF4_S8_ID : TestCase_1_9_1_output_4.txt // 5 - Pattern INPUT4_S8_ID : TestCase_1_8_8_input_5.txt - Pattern BIAS4_S8_ID : TestCase_1_8_8_bias_5.txt - Pattern WEIGHT4_S8_ID : TestCase_1_8_8_weights_5.txt - Pattern REF4_S8_ID : TestCase_1_8_8_output_5.txt + Pattern INPUT5_S8_ID : TestCase_1_8_8_input_5.txt + Pattern BIAS5_S8_ID : TestCase_1_8_8_bias_5.txt + Pattern WEIGHT5_S8_ID : TestCase_1_8_8_weights_5.txt + Pattern REF5_S8_ID : TestCase_1_8_8_output_5.txt // 6 - Pattern INPUT5_S8_ID : TestCase_9_6_1_input_6.txt - Pattern BIAS5_S8_ID : TestCase_9_6_1_bias_6.txt - Pattern WEIGHT5_S8_ID : TestCase_9_6_1_weights_6.txt - Pattern REF5_S8_ID : TestCase_9_6_1_output_6.txt + Pattern INPUT6_S8_ID : TestCase_9_6_1_input_6.txt + Pattern BIAS6_S8_ID : TestCase_9_6_1_bias_6.txt + Pattern WEIGHT6_S8_ID : TestCase_9_6_1_weights_6.txt + Pattern REF6_S8_ID : TestCase_9_6_1_output_6.txt // 7 - Pattern INPUT6_S8_ID : TestCase_8_8_1_input_7.txt - Pattern BIAS6_S8_ID : TestCase_8_8_1_bias_7.txt - Pattern WEIGHT6_S8_ID : TestCase_8_8_1_weights_7.txt - Pattern REF6_S8_ID : TestCase_8_8_1_output_7.txt + Pattern INPUT7_S8_ID : TestCase_8_8_1_input_7.txt + Pattern BIAS7_S8_ID : TestCase_8_8_1_bias_7.txt + Pattern WEIGHT7_S8_ID : TestCase_8_8_1_weights_7.txt + Pattern REF7_S8_ID : TestCase_8_8_1_output_7.txt // 8 - Pattern INPUT7_S8_ID : TestCase_4_10_1_input_8.txt - Pattern BIAS7_S8_ID : TestCase_4_10_1_bias_8.txt - Pattern WEIGHT7_S8_ID : TestCase_4_10_1_weights_8.txt - Pattern REF7_S8_ID : TestCase_4_10_1_output_8.txt + Pattern INPUT8_S8_ID : TestCase_4_10_1_input_8.txt + Pattern BIAS8_S8_ID : TestCase_4_10_1_bias_8.txt + Pattern WEIGHT8_S8_ID : TestCase_4_10_1_weights_8.txt + Pattern REF8_S8_ID : TestCase_4_10_1_output_8.txt // 9 - Pattern INPUT8_S8_ID : TestCase_9_6_1_input_9.txt - Pattern BIAS8_S8_ID : TestCase_9_6_1_bias_9.txt - Pattern WEIGHT8_S8_ID : TestCase_9_6_1_weights_9.txt - Pattern REF8_S8_ID : TestCase_9_6_1_output_9.txt + Pattern INPUT9_S8_ID : TestCase_9_6_1_input_9.txt + Pattern BIAS9_S8_ID : TestCase_9_6_1_bias_9.txt + Pattern WEIGHT9_S8_ID : TestCase_9_6_1_weights_9.txt + Pattern REF9_S8_ID : TestCase_9_6_1_output_9.txt // 10 - Pattern INPUT9_S8_ID : TestCase_4_10_1_input_10.txt - Pattern BIAS9_S8_ID : TestCase_4_10_1_bias_10.txt - Pattern WEIGHT9_S8_ID : TestCase_4_10_1_weights_10.txt - Pattern REF9_S8_ID : TestCase_4_10_1_output_10.txt + Pattern INPUT10_S8_ID : TestCase_4_10_1_input_10.txt + Pattern BIAS10_S8_ID : TestCase_4_10_1_bias_10.txt + Pattern WEIGHT10_S8_ID : TestCase_4_10_1_weights_10.txt + Pattern REF10_S8_ID : TestCase_4_10_1_output_10.txt // 11 - Pattern INPUT10_S8_ID : TestCase_8_8_1_input_11.txt - Pattern BIAS10_S8_ID : TestCase_8_8_1_bias_11.txt - Pattern WEIGHT10_S8_ID : TestCase_8_8_1_weights_11.txt - Pattern REF10_S8_ID : TestCase_8_8_1_output_11.txt + Pattern INPUT11_S8_ID : TestCase_8_8_1_input_11.txt + Pattern BIAS11_S8_ID : TestCase_8_8_1_bias_11.txt + Pattern WEIGHT11_S8_ID : TestCase_8_8_1_weights_11.txt + Pattern REF11_S8_ID : TestCase_8_8_1_output_11.txt // 12 - Pattern INPUT11_S8_ID : TestCase_9_8_4_input_12.txt - Pattern BIAS11_S8_ID : TestCase_9_8_4_bias_12.txt - Pattern WEIGHT11_S8_ID : TestCase_9_8_4_weights_12.txt - Pattern REF11_S8_ID : TestCase_9_8_4_output_12.txt + Pattern INPUT12_S8_ID : TestCase_9_8_4_input_12.txt + Pattern BIAS12_S8_ID : TestCase_9_8_4_bias_12.txt + Pattern WEIGHT12_S8_ID : TestCase_9_8_4_weights_12.txt + Pattern REF12_S8_ID : TestCase_9_8_4_output_12.txt // 13 - Pattern INPUT12_S8_ID : TestCase_8_8_5_input_13.txt - Pattern BIAS12_S8_ID : TestCase_8_8_5_bias_13.txt - Pattern WEIGHT12_S8_ID : TestCase_8_8_5_weights_13.txt - Pattern REF12_S8_ID : TestCase_8_8_5_output_13.txt + Pattern INPUT13_S8_ID : TestCase_8_8_5_input_13.txt + Pattern BIAS13_S8_ID : TestCase_8_8_5_bias_13.txt + Pattern WEIGHT13_S8_ID : TestCase_8_8_5_weights_13.txt + Pattern REF13_S8_ID : TestCase_8_8_5_output_13.txt // 14 - Pattern INPUT13_S8_ID : TestCase_4_7_3_input_14.txt - Pattern BIAS13_S8_ID : TestCase_4_7_3_bias_14.txt - Pattern WEIGHT13_S8_ID : TestCase_4_7_3_weights_14.txt - Pattern REF13_S8_ID : TestCase_4_7_3_output_14.txt + Pattern INPUT14_S8_ID : TestCase_4_7_3_input_14.txt + Pattern BIAS14_S8_ID : TestCase_4_7_3_bias_14.txt + Pattern WEIGHT14_S8_ID : TestCase_4_7_3_weights_14.txt + Pattern REF14_S8_ID : TestCase_4_7_3_output_14.txt // 15 - Pattern INPUT14_S8_ID : TestCase_8_7_4_input_15.txt - Pattern BIAS14_S8_ID : TestCase_8_7_4_bias_15.txt - Pattern WEIGHT14_S8_ID : TestCase_8_7_4_weights_15.txt - Pattern REF14_S8_ID : TestCase_8_7_4_output_15.txt - - Output OUTPUT1_S8_ID : Output1 - Output TEMP1_S16_ID : Temp1 - Output OUTPUT19_S8_ID : Output19 - Output TEMP19_S16_ID : Temp19 - Output OUTPUT2_S8_ID : Output2 - Output TEMP2_S16_ID : Temp2 - Output OUTPUT3_S8_ID : Output3 - Output TEMP3_S16_ID : Temp3 - Output OUTPUT4_S8_ID : Output4 - Output TEMP4_S16_ID : Temp4 - Output OUTPUT5_S8_ID : Output5 - Output TEMP5_S16_ID : Temp5 - Output OUTPUT6_S8_ID : Output6 - Output TEMP6_S16_ID : Temp6 - Output OUTPUT7_S8_ID : Output7 - Output TEMP7_S16_ID : Temp7 - Output OUTPUT8_S8_ID : Output8 - Output TEMP8_S16_ID : Temp8 - Output OUTPUT9_S8_ID : Output9 - Output TEMP9_S16_ID : Temp9 - Output OUTPUT10_S8_ID : Output10 - Output TEMP10_S16_ID : Temp10 - - Output OUTPUT11_S8_ID : Output11 - Output TEMP11_S16_ID : Temp11 - - Output OUTPUT12_S8_ID : Output12 - Output TEMP12_S16_ID : Temp12 - - Output OUTPUT13_S8_ID : Output13 - Output TEMP13_S16_ID : Temp13 - - Output OUTPUT14_S8_ID : Output14 - Output TEMP14_S16_ID : Temp14 + Pattern INPUT15_S8_ID : TestCase_8_7_4_input_15.txt + Pattern BIAS15_S8_ID : TestCase_8_7_4_bias_15.txt + Pattern WEIGHT15_S8_ID : TestCase_8_7_4_weights_15.txt + Pattern REF15_S8_ID : TestCase_8_7_4_output_15.txt + Output OUTPUT_S8_ID : Output + Output TEMP_S16_ID : Temp + Functions { fully_connected_tflite_s8 test1:test_fully_connected_tflite_s8 - fully_connected_tflite_s8 test19:test_fully_connected_tflite_s8 + fully_connected_tflite_s8 test2:test_fully_connected_tflite_s8 + fully_connected_tflite_s8 test3:test_fully_connected_tflite_s8 + fully_connected_tflite_s8 test4:test_fully_connected_tflite_s8 fully_connected_tflite_s8 test5:test_fully_connected_tflite_s8 - fully_connected_tflite_s8 test6:test_fully_connected_tflite_s8 - fully_connected_tflite_s8 test7:test_fully_connected_tflite_s8 + matmul_tflite_s8 test6:test_fully_connected_tflite_s8 + matmul_tflite_s8 test7:test_fully_connected_tflite_s8 + matmul_tflite_s8 test8:test_fully_connected_tflite_s8 matmul_tflite_s8 test9:test_fully_connected_tflite_s8 - matmul_tflite_s8 test5:test_fully_connected_tflite_s8 - matmul_tflite_s8 test4:test_fully_connected_tflite_s8 - matmul_tflite_s8 test9B:test_fully_connected_tflite_s8 - matmul_tflite_s8 test4B:test_fully_connected_tflite_s8 - matmul_tflite_s8 test5B:test_fully_connected_tflite_s8 - matmul_tflite_s8 test_4_9:test_fully_connected_tflite_s8 - matmul_tflite_s8 test_5_8:test_fully_connected_tflite_s8 - matmul_tflite_s8 test_3_4:test_fully_connected_tflite_s8 - matmul_tflite_s8 test_4_8:test_fully_connected_tflite_s8 + matmul_tflite_s8 test10:test_fully_connected_tflite_s8 + matmul_tflite_s8 test11:test_fully_connected_tflite_s8 + matmul_tflite_s8 test12:test_fully_connected_tflite_s8 + matmul_tflite_s8 test13:test_fully_connected_tflite_s8 + matmul_tflite_s8 test14:test_fully_connected_tflite_s8 + matmul_tflite_s8 test15:test_fully_connected_tflite_s8 } } } @@ -308,14 +446,14 @@ group Root { Formula "REPEAT" } - Pattern INPUT1_S8_ID : TestCase_1_input.txt - Pattern BIAS_S8_ID : TestCase_1_bias.txt - Pattern WEIGHT_S8_ID : TestCase_1_weights_1.txt + Pattern INPUT1_S8_ID : TestCase_1_10_4_input_1.txt + Pattern BIAS1_S8_ID : TestCase_1_10_4_bias_1.txt + Pattern WEIGHT1_S8_ID : TestCase_1_10_4_weights_1.txt - Pattern REF1_S8_ID : TestCase_1_output_1.txt + Pattern REF1_S8_ID : TestCase_1_10_4_output_1.txt - Output OUTPUT1_S8_ID : Output - Output TEMP1_S16_ID : Temp1 + Output OUTPUT_S8_ID : Output + Output TEMP_S16_ID : Temp Params PARAM1_ID = { NB = [10,20,100,200] diff --git a/Testing/examples.sql b/Testing/examples.sql new file mode 100755 index 00000000..c0517963 --- /dev/null +++ b/Testing/examples.sql @@ -0,0 +1,48 @@ +/* + +Build the table with the platform, compiler and core names. + +*/ +/* +select NB,CATEGORY.category,NAME,CYCLES,PLATFORM.platform,CORE.core,COMPILERKIND.compiler,COMPILER.version,DATE + from BasicBenchmarks + INNER JOIN CATEGORY USING(categoryid) + INNER JOIN PLATFORM USING(platformid) + INNER JOIN CORE USING(coreid) + INNER JOIN COMPILER USING(compilerid) + INNER JOIN COMPILERKIND USING(compilerkindid) + ; + +*/ + +/* + +Compute the max cycles for a test configuration (category + name) + +*/ +/* +select NAME,max(CYCLES),PLATFORM.platform,CORE.core,COMPILERKIND.compiler,COMPILER.version + from BasicBenchmarks + INNER JOIN CATEGORY USING(categoryid) + INNER JOIN PLATFORM USING(platformid) + INNER JOIN CORE USING(coreid) + INNER JOIN COMPILER USING(compilerid) + INNER JOIN COMPILERKIND USING(compilerkindid) + GROUP BY NAME,category + ; +*/ + +/* + +Get last values + +*/ + +select NB,CATEGORY.category,NAME,CYCLES,PLATFORM.platform,CORE.core,COMPILERKIND.compiler,COMPILER.version,DATE + from BasicBenchmarks + INNER JOIN CATEGORY USING(categoryid) + INNER JOIN PLATFORM USING(platformid) + INNER JOIN CORE USING(coreid) + INNER JOIN COMPILER USING(compilerid) + INNER JOIN COMPILERKIND USING(compilerkindid) + WHERE DATE BETWEEN datetime('now','localtime','-10 minutes') AND datetime('now', 'localtime'); diff --git a/Testing/processResult.py b/Testing/processResult.py index d186eb6d..543c36bb 100644 --- a/Testing/processResult.py +++ b/Testing/processResult.py @@ -220,7 +220,11 @@ def writeBenchmark(elem,benchFile,theId,theError,passed,cycles,params,config): if benchFile: name=elem.data["class"] category= elem.categoryDesc() - benchFile.write("\"%s\",\"%s\",%d,%s,%d,%s\n" % (category,name,theId,params,cycles,config)) + old="" + if "testData" in elem.data: + if "oldID" in elem.data["testData"]: + old=elem.data["testData"]["oldID"] + benchFile.write("\"%s\",\"%s\",%d,\"%s\",%s,%d,%s\n" % (category,name,theId,old,params,cycles,config)) def analyseResult(root,results,embedded,benchmark,formatter): formatter.start() @@ -295,7 +299,7 @@ def analyseResult(root,results,embedded,benchmark,formatter): #print(configList) config = "".join(list(joinit(configList[0],","))) configHeaders = "".join(list(joinit(csvheaders,","))) - benchFile.write("CATEGORY,NAME,ID,%s,CYCLES,%s\n" % (header,configHeaders)) + benchFile.write("CATEGORY,NAME,ID,OLDID,%s,CYCLES,%s\n" % (header,configHeaders)) formatter.printGroup(elem,theId) diff --git a/Testing/processTests.py b/Testing/processTests.py index d2caba87..8b1e9cd9 100644 --- a/Testing/processTests.py +++ b/Testing/processTests.py @@ -1,45 +1,8 @@ import argparse import TestScripts.NewParser as parse import TestScripts.CodeGen -from collections import deque +import TestScripts.Deprecate as d -# When deprecation is forced on some nodes -# we ensure that a parent of a valid node is also valid -def correctDeprecation(node): - current = node.data["deprecated"] - for c in node.children: - if not correctDeprecation(c): - current = False - node.data["deprecated"] = current - return(current) - -def deprecateRec(root,others,deprecated): - if others: - newOthers=others.copy() - newOthers.popleft() - if root.kind == TestScripts.Parser.TreeElem.TEST: - if others[0].isdigit() and int(root.id) == int(others[0]): - root.data["deprecated"]=False - for c in root.children: - deprecateRec(c,newOthers,False) - else: - root.data["deprecated"]=True - for c in root.children: - deprecateRec(c,others,deprecated) - else: - if root.data["class"] == others[0]: - root.data["deprecated"]=False - for c in root.children: - deprecateRec(c,newOthers,False) - else: - root.data["deprecated"]=deprecated - for c in root.children: - deprecateRec(c,others,deprecated) - -def deprecate(root,others): - if others: - deprecateRec(root,deque(others),True) - correctDeprecation(root) parser = argparse.ArgumentParser(description='Parse test description') parser.add_argument('-f', nargs='?',type = str, default="test.txt", help="File path") @@ -65,7 +28,7 @@ if args.f is not None: c = TestScripts.CodeGen.CodeGen(args.p,args.d, args.e) # Parse the test description. root = p.parse(args.f) - deprecate(root,args.others) + d.deprecate(root,args.others) print(root) # Generate code with the tree of tests c.genCodeForTree(root) diff --git a/Testing/summaryBench.py b/Testing/summaryBench.py index 18b4e8c7..e4fa4236 100644 --- a/Testing/summaryBench.py +++ b/Testing/summaryBench.py @@ -12,6 +12,7 @@ import pandas as pd import statsmodels.api as sm import statsmodels.formula.api as smf import csv +import TestScripts.Deprecate as d def findItem(root,path): """ Find a node in a tree @@ -56,7 +57,9 @@ def formatProd(a,b): def summaryBenchmark(elem,path): regressionPath=os.path.join(os.path.dirname(path),"regression.csv") - full=pd.read_csv(path) + print(" Generating %s" % regressionPath) + full=pd.read_csv(path,dtype={'OLDID': str} ,keep_default_na = False) + #print(full) csvheaders = [] with open('currentConfig.csv', 'r') as f: @@ -79,7 +82,7 @@ def summaryBenchmark(elem,path): #print(results.summary()) return(pd.Series({'Regression':"%s" % f,'MAX' : m})) - regList = ['ID','CATEGORY','NAME'] + csvheaders + groupList + regList = ['ID','OLDID','CATEGORY','NAME'] + csvheaders + groupList regression=full.groupby(regList).apply(reg) regression.reset_index(level=regression.index.names, inplace=True) @@ -88,129 +91,34 @@ def summaryBenchmark(elem,path): regression.to_csv(regressionPath,index=False,quoting=csv.QUOTE_NONNUMERIC) +def extractBenchmarks(benchmark,elem): + if not elem.data["deprecated"]: + if elem.params: + benchPath = os.path.join(benchmark,elem.fullPath(),"fullBenchmark.csv") + print("Processing %s" % benchPath) + summaryBenchmark(elem,benchPath) + + for c in elem.children: + extractBenchmarks(benchmark,c) -def analyseResult(root,results,embedded,benchmark): - path = [] - state = NORMAL - prefix="" - elem=None - theId=None - theError=None - theLine=None - passed=0 - cycles=None - benchFile = None - if embedded: - prefix = ".*S:[ ]" - - # Parse the result file. - # NORMAL mode is when we are parsing suite or group. - # Otherwise we are parsing a test and we need to analyse the - # test result. - # TESTPARAM is used to read parameters of the test. - # Format of output is: - #node ident : s id or g id or t or u - #test status : id error linenb status Y or N (Y when passing) - #param for this test b x,x,x,x or b alone if not param - #node end : p - # In FPGA mode: - #Prefix S:[ ] before driver dump - # D:[ ] before data dump (output patterns) - - for l in results: - l = l.strip() - if not re.match(r'^.*D:[ ].*$',l): - if state == NORMAL: - if len(l) > 0: - # Line starting with g or s is a suite or group. - # In FPGA mode, those line are prefixed with 'S: ' - # and data file with 'D: ' - if re.match(r'^%s[gs][ ]+[0-9]+.*$' % prefix,l): - # Extract the test id - theId=re.sub(r'^%s[gs][ ]+([0-9]+).*$' % prefix,r'\1',l) - theId=int(theId) - path.append(theId) - # From a list of id, find the TreeElem in the Parsed tree - # to know what is the node. - elem = findItem(root,path) - # Display formatted output for this node - if elem.params: - #print(elem.params.full) - benchPath = os.path.join(benchmark,elem.fullPath(),"fullBenchmark.csv") - summaryBenchmark(elem,benchPath) - - - # If we have detected a test, we switch to test mode - if re.match(r'^%s[t][ ]*$' % prefix,l): - state = INTEST - - - # Pop - # End of suite or group - if re.match(r'^%sp.*$' % prefix,l): - path.pop() - elif state == INTEST: - if len(l) > 0: - # In test mode, we are looking for test status. - # A line starting with S - # (There may be empty lines or line for data files) - passRe = r'^%s([0-9]+)[ ]+([0-9]+)[ ]+([0-9]+)[ ]+([0-9]+)[ ]+([YN]).*$' % prefix - if re.match(passRe,l): - # If we have found a test status then we will start again - # in normal mode after this. - - m = re.match(passRe,l) - - # Extract test ID, test error code, line number and status - theId=m.group(1) - theId=int(theId) - - status=m.group(5) - passed=0 - - # Convert status to number as used by formatter. - if status=="Y": - passed = 1 - if status=="N": - passed = 0 - # Compute path to this node - newPath=path.copy() - newPath.append(theId) - # Find the node in the Tree - elem = findItem(root,newPath) - - - state = TESTPARAM - else: - if re.match(r'^%sp.*$' % prefix,l): - path.pop() - if re.match(r'^%s[t][ ]*$' % prefix,l): - state = INTEST - else: - state = NORMAL - else: - if len(l) > 0: - state = INTEST - params="" parser = argparse.ArgumentParser(description='Generate summary benchmarks') parser.add_argument('-f', nargs='?',type = str, default=None, help="Test description file path") -# Where the result file can be found -parser.add_argument('-r', nargs='?',type = str, default=None, help="Result file path") - parser.add_argument('-b', nargs='?',type = str, default="FullBenchmark", help="Full Benchmark dir path") parser.add_argument('-e', action='store_true', help="Embedded test") +parser.add_argument('others', nargs=argparse.REMAINDER) + args = parser.parse_args() if args.f is not None: p = parse.Parser() # Parse the test description file root = p.parse(args.f) - with open(args.r,"r") as results: - analyseResult(root,results,args.e,args.b) + d.deprecate(root,args.others) + extractBenchmarks(args.b,root) else: parser.print_help() \ No newline at end of file