diff --git a/Examples/ARM/arm_class_marks_example/arm_class_marks_example.uvprojx b/Examples/ARM/arm_class_marks_example/arm_class_marks_example.uvprojx
index 4a9b7a91..45880344 100644
--- a/Examples/ARM/arm_class_marks_example/arm_class_marks_example.uvprojx
+++ b/Examples/ARM/arm_class_marks_example/arm_class_marks_example.uvprojx
@@ -1129,7 +1129,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1527,7 +1527,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_convolution_example/arm_convolution_example.uvprojx b/Examples/ARM/arm_convolution_example/arm_convolution_example.uvprojx
index 978a8bf7..3f19b8ed 100644
--- a/Examples/ARM/arm_convolution_example/arm_convolution_example.uvprojx
+++ b/Examples/ARM/arm_convolution_example/arm_convolution_example.uvprojx
@@ -1139,7 +1139,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1542,7 +1542,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example.uvprojx b/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example.uvprojx
index 5112f695..28dde310 100644
--- a/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example.uvprojx
+++ b/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example.uvprojx
@@ -1129,7 +1129,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1527,7 +1527,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example.uvprojx b/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example.uvprojx
index fcb2cb26..656f6328 100644
--- a/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example.uvprojx
+++ b/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example.uvprojx
@@ -1139,7 +1139,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1542,7 +1542,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_fir_example/arm_fir_example.uvprojx b/Examples/ARM/arm_fir_example/arm_fir_example.uvprojx
index 25aabeda..6e8253b8 100644
--- a/Examples/ARM/arm_fir_example/arm_fir_example.uvprojx
+++ b/Examples/ARM/arm_fir_example/arm_fir_example.uvprojx
@@ -1149,7 +1149,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1557,7 +1557,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example.uvprojx b/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example.uvprojx
index fe8b2a38..27aa0086 100644
--- a/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example.uvprojx
+++ b/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example.uvprojx
@@ -1149,7 +1149,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1557,7 +1557,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example.uvprojx b/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example.uvprojx
index 89909fc3..8cfbaa04 100644
--- a/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example.uvprojx
+++ b/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example.uvprojx
@@ -1149,7 +1149,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1557,7 +1557,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_matrix_example/arm_matrix_example.uvprojx b/Examples/ARM/arm_matrix_example/arm_matrix_example.uvprojx
index ab615f7d..34e1404d 100644
--- a/Examples/ARM/arm_matrix_example/arm_matrix_example.uvprojx
+++ b/Examples/ARM/arm_matrix_example/arm_matrix_example.uvprojx
@@ -1139,7 +1139,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1542,7 +1542,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example.uvprojx b/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example.uvprojx
index 3aa08b11..02d2cd19 100644
--- a/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example.uvprojx
+++ b/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example.uvprojx
@@ -1149,7 +1149,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1557,7 +1557,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example.uvprojx b/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example.uvprojx
index 4cf97093..43582874 100644
--- a/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example.uvprojx
+++ b/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example.uvprojx
@@ -1129,7 +1129,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1527,7 +1527,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Examples/ARM/arm_variance_example/arm_variance_example.uvprojx b/Examples/ARM/arm_variance_example/arm_variance_example.uvprojx
index 9be66f74..3d4534c9 100644
--- a/Examples/ARM/arm_variance_example/arm_variance_example.uvprojx
+++ b/Examples/ARM/arm_variance_example/arm_variance_example.uvprojx
@@ -1129,7 +1129,7 @@
0
- ARM_MATH_CM4 __FPU_PRESENT=1
+ ARM_MATH_CM4 __FPU_PRESENT=1U
@@ -1527,7 +1527,7 @@
0
- ARM_MATH_CM7 __FPU_PRESENT=1
+ ARM_MATH_CM7 __FPU_PRESENT=1U
diff --git a/Projects/ARM/arm_cortexM_math.uvprojx b/Projects/ARM/arm_cortexM_math.uvprojx
index 949b1d2a..9f7d5a22 100644
--- a/Projects/ARM/arm_cortexM_math.uvprojx
+++ b/Projects/ARM/arm_cortexM_math.uvprojx
@@ -11021,7 +11021,7 @@
0
--fpmode=ieee_full
- ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1
+ ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -12802,7 +12802,7 @@
0
- ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1, ARM_MATH_BIG_ENDIAN
+ ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -18145,7 +18145,7 @@
0
--fpmode=ieee_full
- ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1
+ ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -19926,7 +19926,7 @@
0
--fpmode=ieee_full
- ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1, ARM_MATH_BIG_ENDIAN
+ ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -21707,7 +21707,7 @@
0
--fpmode=ieee_full
- ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1
+ ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -23488,7 +23488,7 @@
0
--fpmode=ieee_full
- ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT = 1, ARM_MATH_BIG_ENDIAN
+ ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN
..\..\Include;..\..\..\Core\Include;..\..\..\Include
diff --git a/Projects/GCC/arm_cortexM_math.uvprojx b/Projects/GCC/arm_cortexM_math.uvprojx
index 7f7e688c..2ff769e4 100644
--- a/Projects/GCC/arm_cortexM_math.uvprojx
+++ b/Projects/GCC/arm_cortexM_math.uvprojx
@@ -10294,7 +10294,7 @@
1
-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off
- ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT = 1
+ ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -11970,7 +11970,7 @@
1
-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off
- ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT = 1, ARM_MATH_BIG_ENDIAN
+ ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -16998,7 +16998,7 @@
1
-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off
- ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT = 1
+ ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -18674,7 +18674,7 @@
1
-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off
- ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT = 1, ARM_MATH_BIG_ENDIAN
+ ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -20350,7 +20350,7 @@
1
-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off
- ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT = 1
+ ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U
..\..\Include;..\..\..\Core\Include;..\..\..\Include
@@ -22026,7 +22026,7 @@
1
-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off
- ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT = 1, ARM_MATH_BIG_ENDIAN
+ ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN
..\..\Include;..\..\..\Core\Include;..\..\..\Include