Update to the Python wrapper
Corrected issue with RFFT APIs Added some features to compute graph Improved documentation related to RFFT Changed how Python wrapper is built (to prepare fro future evolution).pull/94/head
Christophe Favergeon
3 years ago
parent
0fe2214dc7
commit
8b49478b1f
@ -1,74 +0,0 @@
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/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: RingPrivate.h
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* Description: Implementation for RTX + Keil MDK
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*
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* $Date: 30 July 2021
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* $Revision: V1.10.0
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*
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* Target Processor: Cortex-M and Cortex-A cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef _RINGPRIVATE_H_
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#define _RINGPRIVATE_H_
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/*
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Implementation for RTX + Keil MDK Event logger
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*/
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#include <stddef.h>
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#include "arm_vsi.h"
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#ifdef _RTE_
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#include "RTE_Components.h"
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#endif
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#include CMSIS_device_header
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#include "cmsis_os2.h"
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#include "SchedEvents.h"
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/*
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RTX dependent definition
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*/
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#define RING_BEGINCRITICALSECTION() NVIC_DisableIRQ ((IRQn_Type)config->interruptID);
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#define RING_ENDCRITICALSECTION() NVIC_EnableIRQ ((IRQn_Type)config->interruptID);
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#define RING_WAIT_BUFFER(TIMEOUT) osThreadFlagsWait(1,osFlagsWaitAny,(TIMEOUT))
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#define RING_HASWAITERROR(F) (F < 0)
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#define RING_RELEASE_BUFFER(THREADID) osThreadFlagsSet((osThreadId_t)(THREADID),1)
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/* Debug trace using Event Recorder */
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#define RING_DBG_USER_RESERVE_BUFFER(ID,CONF) EventRecord2 (Evt_UsrReserve, (ID), (uint32_t)(CONF))
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#define RING_DBG_USER_RELEASE_BUFFER(ID,CONF) EventRecord2 (Evt_UsrRelease, (ID), (uint32_t)(CONF))
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#define RING_DBG_USER_WAIT_BUFFER(ID,CONF) EventRecord2 (Evt_UsrWait, (ID), (uint32_t)(CONF))
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#define RING_DBG_USER_BUFFER_RELEASED(ID,CONF) EventRecord2 (Evt_UsrFree, (ID), (uint32_t)(CONF))
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#define RING_DBG_USER_STATUS(SA,SB,CONF) EventRecord4 (Evt_UsrStatus, config->SA,config->SB,(uint32_t)(CONF),0)
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#define RING_DBG_INT_RESERVE_BUFFER(ID,CONF) EventRecord2 (Evt_IntReserve, (ID), (uint32_t)(CONF))
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#define RING_DBG_INT_RELEASE_BUFFER(ID,CONF) EventRecord2 (Evt_IntRelease, (ID), (uint32_t)(CONF))
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#define RING_DBG_INT_RELEASE_USER(CONF) EventRecord2 (Evt_IntReleaseUser, (uint32_t)(CONF), 0)
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#define RING_DBG_INT_STATUS(SA,SB,CONF) EventRecord4 (Evt_IntStatus, config->SA,config->SB,(uint32_t)(CONF),0)
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#define RING_DBG_ERROR(ERROR,CONF) EventRecord2 (Evt_Error, (ERROR), (uint32_t)(CONF))
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#endif
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@ -1,69 +0,0 @@
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/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: SchedEvents.h
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* Description: Definition of the events for the Keil MDK Event logger
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*
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* $Date: 30 July 2021
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* $Revision: V1.10.0
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*
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* Target Processor: Cortex-M and Cortex-A cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef _SCHEDEVT_H
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#define _SCHEDEVT_H
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/*
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Definition of Event IDs for Keil MDK EventRecorder
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*/
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#include "EventRecorder.h"
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#define EvtNodes 0x00
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#define EvtRing_User 0x01
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#define EvtRing_Int 0x02
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#define EvtRing_All 0x03
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/* Node events */
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#define Evt_Sink EventID (EventLevelAPI, EvtNodes, 0x00)
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#define Evt_SinkVal EventID (EventLevelOp, EvtNodes, 0x01)
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#define Evt_Source EventID (EventLevelAPI, EvtNodes, 0x02)
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/* User Ring Events */
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#define Evt_UsrReserve EventID (EventLevelOp, EvtRing_User, 0x00)
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#define Evt_UsrRelease EventID (EventLevelOp, EvtRing_User, 0x01)
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#define Evt_UsrWait EventID (EventLevelOp, EvtRing_User, 0x02)
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#define Evt_UsrFree EventID (EventLevelOp, EvtRing_User, 0x03)
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#define Evt_UsrStatus EventID (EventLevelDetail, EvtRing_User, 0x04)
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/* Interrupt Ring Events */
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#define Evt_IntReserve EventID (EventLevelOp, EvtRing_Int, 0x00)
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#define Evt_IntRelease EventID (EventLevelOp, EvtRing_Int, 0x01)
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#define Evt_IntReleaseUser EventID (EventLevelOp, EvtRing_Int, 0x02)
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#define Evt_IntStatus EventID (EventLevelDetail, EvtRing_Int, 0x03)
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/* Other Ring Events */
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#define Evt_Error EventID (EventLevelError, EvtRing_All, 0x00)
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#endif
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@ -1,69 +0,0 @@
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#ifndef _AUDIOCONFIG_H_
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#define _AUDIOCONFIG_H_
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// <<< Use Configuration Wizard in Context Menu >>>
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// <e>Audio Configuration for RX
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#ifndef AUDIO_DRV_RX_ENABLED
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#define AUDIO_DRV_RX_ENABLED 1
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#endif
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// <o>Sampling Frequency <8000=> 8000 kHz <16000=> 16000 kHz
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// <44100=> 44100 kHz <48000=> 48000 kHz
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#ifndef AUDIO_DRV_SAMPLINGFREQUENCY_RX
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#define AUDIO_DRV_SAMPLINGFREQUENCY_RX 16000
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#endif
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// <o>Number of samples <256=> 256 <512=> 512 <1024=> 1024 <2048=> 2048
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// <i> Must be consistent with the settings of the Audio source
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#ifndef AUDIO_DRV_NBSAMPLES_RX
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#define AUDIO_DRV_NBSAMPLES_RX 2048
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#endif
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// <o>Number of channels <1=> Mono <2=> Stereo
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#ifndef AUDIO_DRV_NBCHANNELS_RX
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#define AUDIO_DRV_NBCHANNELS_RX 1U
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#endif
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// <o>Channel encoding <2=> 16 Bits
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#ifndef AUDIO_DRV_CHANNEL_ENCODING_RX
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#define AUDIO_DRV_CHANNEL_ENCODING_RX 2U
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#endif
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// </e>
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// <e>Audio Configuration for TX
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#ifndef AUDIO_DRV_TX_ENABLED
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#define AUDIO_DRV_TX_ENABLED 1
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#endif
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// <o>Sampling Frequency <8000=> 8000 kHz <16000=> 16000 kHz
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// <44100=> 44100 kHz <48000=> 48000 kHz
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#ifndef AUDIO_DRV_SAMPLINGFREQUENCY_TX
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#define AUDIO_DRV_SAMPLINGFREQUENCY_TX 16000
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#endif
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// <o>Number of samples <256=> 256 <512=> 512 <1024=> 1024 <2048=> 2048
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// <i> Must be consistent with the settings of the Audio source
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#ifndef AUDIO_DRV_NBSAMPLES_TX
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#define AUDIO_DRV_NBSAMPLES_TX 2048
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#endif
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// <o>Number of channels <1=> Mono <2=> Stereo
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#ifndef AUDIO_DRV_NBCHANNELS_TX
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#define AUDIO_DRV_NBCHANNELS_TX 1U
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#endif
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// <o>Channel encoding <2=> 16 Bits
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#ifndef AUDIO_DRV_CHANNEL_ENCODING_TX
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#define AUDIO_DRV_CHANNEL_ENCODING_TX 2U
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#endif
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// </e>
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// <q> CGSTATIC_VHT_TX_RX_ORDERING: Force TX RX ordering
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#define CGSTATIC_VHT_TX_RX_ORDERING 0
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// <<< end of configuration section >>>
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#define CGSTATIC_AUDIO_CONFIG
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#endif
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@ -1,26 +0,0 @@
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#ifndef _RINGCONFIG_H_
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#define _RINGCONFIG_H_
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h>Ring Buffer Configuration
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// <o>Number of buffers <2=> 2 <4=> 4 <8=> 8 <16=> 16 <32=> 32
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#ifndef RING_NBBUFS
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#define RING_NBBUFS 4
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#endif
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// </h>
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// <<< end of configuration section >>>
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#if defined(CGSTATIC_AUDIO_CONFIG)
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#define RING_BUFSIZE_RX (AUDIO_DRV_NBSAMPLES_RX * AUDIO_DRV_NBCHANNELS_RX * AUDIO_DRV_CHANNEL_ENCODING_RX)
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#define RING_BUFSIZE_TX (AUDIO_DRV_NBSAMPLES_TX * AUDIO_DRV_NBCHANNELS_TX * AUDIO_DRV_CHANNEL_ENCODING_TX)
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#endif
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#if defined(CGSTATIC_VIDEO_CONFIG)
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#define RING_BUFSIZE_RX (VIDEO_DRV_WIDTH * VIDEO_DRV_HEIGHT * VIDEO_DRV_PIXEL_SIZE)
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#define RING_BUFSIZE_TX 0
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#endif
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#endif
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@ -1,35 +0,0 @@
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#ifndef _VIDEOCONFIG_H_
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#define _VIDEOCONFIG_H_
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h>Video Configuration
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// <o>Width in pixels <16-640>
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#ifndef VIDEO_DRV_WIDTH
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#define VIDEO_DRV_WIDTH 32
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#endif
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// <o>Height in pixels <16-640>
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#ifndef VIDEO_DRV_HEIGHT
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#define VIDEO_DRV_HEIGHT 32
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#endif
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// <o>Pixel size in bytes <1=> 1 <2=> 2
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#ifndef VIDEO_DRV_PIXEL_SIZE
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#define VIDEO_DRV_PIXEL_SIZE 1
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#endif
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// <o>Frame rate <10=> 10 <25=> 25 <30=> 30 <60=> 60
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#ifndef VIDEO_DRV_FRAME_RATE
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#define VIDEO_DRV_FRAME_RATE 10
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#endif
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// </h>
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// <<< end of configuration section >>>
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#define CGSTATIC_VIDEO_CONFIG
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#endif
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@ -1,31 +0,0 @@
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# Streaming Nodes
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This is an example implementation to be used with Arm Virtual Hardware (AVH).
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It is requiring headers and source files provided by AVH.
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Those files are not needed at all to use the Compute Graph.
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Those files are kept because they are used in the AVH-SystemModeling example.
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But there are simpler way to interface the compute graph to an audio interrupt.
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Those nodes are considered as deprecated. Don't use them.
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## RingBuffer
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It is a way to connect the compute graph with static flow to an audio source or sink.
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The node part is implemented in the AudioSource and AudioSink parts.
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The main implementation is in `RingBuffer`.
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To port it to new environments:
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- A file RingPrivate.h must be written. It is included by RingBuffer.cpp to customize some part of the implementation
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- A file managing the audio interrupts must be written an interact with the Ring buffers
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- The file RingConfig.h must be provided to size the buffers
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- Most of the time the Ring buffer will have only 2 buffers and will be a ping-pong buffer.
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@ -1,278 +0,0 @@
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/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: RingBuffer.cpp
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* Description: Implementation of the Ring buffer.
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*
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* $Date: 30 July 2021
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* $Revision: V1.10.0
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*
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* Target Processor: Cortex-M and Cortex-A cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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RTOS dependent definitions must be in RingPrivate.h.
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Without a RingPrivate.h, this code cannot work.
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*/
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#include "RingPrivate.h"
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#include "RingBuffer.h"
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/*
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RTOS Integration
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*/
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#ifndef RING_BEGINCRITICALSECTION
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#define RING_BEGINCRITICALSECTION()
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#endif
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#ifndef RING_ENDCRITICALSECTION
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#define RING_ENDCRITICALSECTION()
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#endif
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#ifndef RING_WAIT_BUFFER
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#define RING_WAIT_BUFFER(ID) 0
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#endif
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#ifndef RING_RELEASE_BUFFER
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#define RING_RELEASE_BUFFER(THREADID)
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#endif
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#ifndef RING_HASWAITERROR
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#define RING_HASWAITERROR(ERR) 0
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#endif
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/*
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Debug integration
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*/
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#ifndef RING_DBG_USER_RESERVE_BUFFER
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#define RING_DBG_USER_RESERVE_BUFFER(ID,CONF)
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#endif
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#ifndef RING_DBG_USER_RELEASE_BUFFER
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#define RING_DBG_USER_RELEASE_BUFFER(ID,CONF)
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#endif
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#ifndef RING_DBG_USER_WAIT_BUFFER
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#define RING_DBG_USER_WAIT_BUFFER(ID,CONF)
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#endif
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#ifndef RING_DBG_USER_BUFFER_RELEASED
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#define RING_DBG_USER_BUFFER_RELEASED(ID,CONF)
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#endif
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#ifndef RING_DBG_USER_STATUS
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#define RING_DBG_USER_STATUS(SA,SB,CONF)
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#endif
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#ifndef RING_DBG_INT_RESERVE_BUFFER
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#define RING_DBG_INT_RESERVE_BUFFER(ID,CONF)
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#endif
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#ifndef RING_DBG_INT_RELEASE_BUFFER
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#define RING_DBG_INT_RELEASE_BUFFER(ID,CONF)
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#endif
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#ifndef RING_DBG_INT_RELEASE_USER
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#define RING_DBG_INT_RELEASE_USER(CONF)
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#endif
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#ifndef RING_DBG_INT_STATUS
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#define RING_DBG_INT_STATUS(SA,SB,CONF)
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#endif
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#ifndef RING_DBG_ERROR
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#define RING_DBG_ERROR(ERROR,CONF)
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#endif
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/*
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Implementation
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*/
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#define RING_SET(FIELD,BIT) (config->FIELD) |= (1 << (config->BIT))
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#define RING_CLEAR(FIELD,BIT) (config->FIELD) &= ~(1 << (config->BIT))
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#define RING_TEST(FIELD,BIT) (((config->FIELD) & (1 << (config->BIT))) != 0)
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#define RING_INC(ID) \
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config->ID++; \
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if (config->ID == config->nbBuffers)\
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{ \
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config->ID=0; \
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}
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#define RING_BUSY(ID) \
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(RING_TEST(userBufferStatus,ID) || RING_TEST(intBufferStatus,ID))
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void ringInit(ring_config_t *config,
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uint32_t nbBuffers,
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uint32_t bufferSize,
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uint8_t *buffer,
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int interruptID,
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int timeout)
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{
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config->buffer=buffer;
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config->nbBuffers = nbBuffers;
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config->bufferSize = bufferSize;
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config->interruptBufferIDStart = 0;
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config->interruptBufferIDStop = 0;
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config->userBufferIDStart = 0;
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config->userBufferIDStop = 0;
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config->error=kNoError;
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config->waiting=0;
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config->timeout=timeout;
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config->interruptID = interruptID;
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config->userBufferStatus = 0;
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config->intBufferStatus = 0;
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}
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void ringClean(ring_config_t *config)
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{
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}
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uint8_t *ringGetBufferAddress(ring_config_t *config,int id)
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{
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if (id < 0)
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{
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return(NULL);
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}
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else
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{
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return(&config->buffer[id*config->bufferSize]);
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}
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}
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int ringInterruptReserveBuffer(ring_config_t *config)
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{
|
||||
RING_DBG_INT_STATUS(userBufferStatus,intBufferStatus,config);
|
||||
if (config->error)
|
||||
{
|
||||
return(-1);
|
||||
}
|
||||
|
||||
/* Try to reserve a buffer */
|
||||
if (RING_BUSY(interruptBufferIDStop))
|
||||
{
|
||||
/* If buffer is already used then kErrorOverflowUnderflow*/
|
||||
config->error=kErrorOverflowUnderflow;
|
||||
RING_DBG_ERROR(config->error,config);
|
||||
return(-1);
|
||||
}
|
||||
else
|
||||
{
|
||||
RING_DBG_INT_RESERVE_BUFFER(config->interruptBufferIDStop,config);
|
||||
RING_SET(intBufferStatus,interruptBufferIDStop);
|
||||
RING_DBG_INT_STATUS(userBufferStatus,intBufferStatus,config);
|
||||
int id=config->interruptBufferIDStop;
|
||||
RING_INC(interruptBufferIDStop);
|
||||
return(id);
|
||||
}
|
||||
}
|
||||
|
||||
void ringInterruptReleaseBuffer(ring_config_t *config,void *threadId)
|
||||
{
|
||||
RING_DBG_INT_STATUS(userBufferStatus,intBufferStatus,config);
|
||||
if (config->error)
|
||||
{
|
||||
return;
|
||||
}
|
||||
if (config->interruptBufferIDStart != config->interruptBufferIDStop)
|
||||
{
|
||||
RING_DBG_INT_RELEASE_BUFFER(config->interruptBufferIDStart,config);
|
||||
RING_CLEAR(intBufferStatus,interruptBufferIDStart);
|
||||
/* Send release message in case the thread may be waiting */
|
||||
if (config->interruptBufferIDStart == config->userBufferIDStop)
|
||||
{
|
||||
if (config->waiting)
|
||||
{
|
||||
RING_DBG_INT_RELEASE_USER(config);
|
||||
RING_RELEASE_BUFFER(threadId);
|
||||
}
|
||||
}
|
||||
RING_INC(interruptBufferIDStart);
|
||||
}
|
||||
}
|
||||
|
||||
int ringUserReserveBuffer(ring_config_t *config)
|
||||
{
|
||||
RING_BEGINCRITICALSECTION();
|
||||
RING_DBG_USER_STATUS(userBufferStatus,intBufferStatus,config);
|
||||
if (config->error)
|
||||
{
|
||||
RING_ENDCRITICALSECTION();
|
||||
return(-1);
|
||||
}
|
||||
/* If buffer is busy we wait*/
|
||||
if (RING_BUSY(userBufferIDStop))
|
||||
{
|
||||
config->waiting=1;
|
||||
RING_DBG_USER_WAIT_BUFFER(config->userBufferIDStop,config);
|
||||
RING_ENDCRITICALSECTION();
|
||||
|
||||
int err = RING_WAIT_BUFFER(config->timeout);
|
||||
|
||||
RING_BEGINCRITICALSECTION();
|
||||
RING_DBG_USER_BUFFER_RELEASED(config->userBufferIDStop,config);
|
||||
if (RING_HASWAITERROR(err))
|
||||
{
|
||||
RING_DBG_ERROR(err,config);
|
||||
config->error=kTimeout;
|
||||
return(-1);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
RING_DBG_USER_RESERVE_BUFFER(config->userBufferIDStop,config);
|
||||
RING_SET(userBufferStatus,userBufferIDStop);
|
||||
int id=config->userBufferIDStop;
|
||||
RING_INC(userBufferIDStop);
|
||||
|
||||
RING_ENDCRITICALSECTION();
|
||||
|
||||
return(id);
|
||||
}
|
||||
|
||||
void ringUserReleaseBuffer(ring_config_t *config)
|
||||
{
|
||||
RING_BEGINCRITICALSECTION();
|
||||
RING_DBG_USER_STATUS(userBufferStatus,intBufferStatus,config);
|
||||
if (config->error)
|
||||
{
|
||||
RING_ENDCRITICALSECTION();
|
||||
return;
|
||||
}
|
||||
if (config->userBufferIDStart != config->userBufferIDStop)
|
||||
{
|
||||
RING_DBG_USER_RELEASE_BUFFER(config->userBufferIDStart,config);
|
||||
RING_CLEAR(userBufferStatus,userBufferIDStart);
|
||||
RING_INC(userBufferIDStart);
|
||||
}
|
||||
|
||||
RING_ENDCRITICALSECTION();
|
||||
}
|
||||
@ -1,125 +0,0 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: RingBuffer.h
|
||||
* Description: Ring buffer to connect the compute graph with static flow to audio sources and sinks
|
||||
*
|
||||
* $Date: 30 July 2021
|
||||
* $Revision: V1.10.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _RINGBUFFER_H_
|
||||
#define _RINGBUFFER_H_
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
kErrorOverflowUnderflow=-1,
|
||||
kTimeout=-2,
|
||||
kErrorHWOverlowUnderflow=-3,
|
||||
kNoError=0
|
||||
} ring_error_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t *buffer;
|
||||
uint32_t userBufferStatus;
|
||||
uint32_t intBufferStatus;
|
||||
|
||||
int32_t nbBuffers;
|
||||
uint32_t bufferSize;
|
||||
|
||||
int32_t interruptBufferIDStart;
|
||||
int32_t interruptBufferIDStop;
|
||||
int32_t userBufferIDStart;
|
||||
int32_t userBufferIDStop;
|
||||
int32_t waiting;
|
||||
int timeout;
|
||||
ring_error_t error;
|
||||
int interruptID;
|
||||
} ring_config_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Ring buffer initialization
|
||||
* @param[in, out] buf ring buffer configuration.
|
||||
* @param[in] nbBuffers number of buffers (max 32)
|
||||
* @param[in] bufferSize size of each buffer in bytes
|
||||
* @param[in] buffer array for the buffer storage (bufferSize*nbBuffers)
|
||||
* @param[in] interruptID interrupt ID
|
||||
* @param[in] timeout timeout (meaning is RTOS dependent)
|
||||
* @return Nothing
|
||||
*/
|
||||
void ringInit(ring_config_t *buf,
|
||||
uint32_t nbBuffers,
|
||||
uint32_t bufferSize,
|
||||
uint8_t *buffer,
|
||||
int interruptID,
|
||||
int timeout);
|
||||
|
||||
|
||||
|
||||
void ringClean(ring_config_t *buf);
|
||||
|
||||
/*
|
||||
|
||||
Try to reserve a buffer from a user thread.
|
||||
|
||||
*/
|
||||
int ringUserReserveBuffer(ring_config_t *buf);
|
||||
|
||||
/*
|
||||
|
||||
Release a buffer from user htread
|
||||
|
||||
*/
|
||||
void ringUserReleaseBuffer(ring_config_t *buf);
|
||||
|
||||
/*
|
||||
|
||||
Reserve a buffer from interrupt
|
||||
|
||||
*/
|
||||
int ringInterruptReserveBuffer(ring_config_t *buf);
|
||||
|
||||
/*
|
||||
|
||||
Release a buffer from interrupt
|
||||
|
||||
*/
|
||||
void ringInterruptReleaseBuffer(ring_config_t *buf,void *threadId);
|
||||
|
||||
/*
|
||||
|
||||
Get address of buffer
|
||||
|
||||
*/
|
||||
|
||||
uint8_t *ringGetBufferAddress(ring_config_t *buf,int id);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* #ifndef _RINGBUFFER_H_*/
|
||||
@ -1,57 +0,0 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: RingInit.cpp
|
||||
* Description: Initialization of the ring data structure for an audio source
|
||||
*
|
||||
* $Date: 30 July 2021
|
||||
* $Revision: V1.10.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "arm_math.h"
|
||||
#include "RingConfig.h"
|
||||
#include "RingInit.h"
|
||||
#include "RingBuffer.h"
|
||||
|
||||
|
||||
|
||||
|
||||
void initRing(ring_config_t *ringConfigRX,
|
||||
uint8_t *rxBuffer,
|
||||
uint32_t bufSizeRX,
|
||||
int rxInterruptID,
|
||||
ring_config_t *ringConfigTX,
|
||||
uint8_t *txBuffer,
|
||||
uint32_t bufSizeTX,
|
||||
int txInterruptID,
|
||||
int timeOut)
|
||||
{
|
||||
/* Initialization of the ring buffer data structure */
|
||||
if (ringConfigRX != NULL)
|
||||
{
|
||||
ringInit(ringConfigRX,RING_NBBUFS,bufSizeRX,rxBuffer,rxInterruptID,timeOut);
|
||||
}
|
||||
|
||||
if (ringConfigTX != NULL)
|
||||
{
|
||||
ringInit(ringConfigTX,RING_NBBUFS,bufSizeTX,txBuffer,txInterruptID,timeOut);
|
||||
}
|
||||
|
||||
}
|
||||
@ -1,58 +0,0 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: RingInit.h
|
||||
* Description: API to initialize the ring buffer
|
||||
*
|
||||
* $Date: 30 July 2021
|
||||
* $Revision: V1.10.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _RINGINIT_H
|
||||
#define _RINGINIT_H
|
||||
|
||||
|
||||
|
||||
#include "RingBuffer.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
extern ring_config_t ringConfigRX;
|
||||
extern ring_config_t ringConfigTX;
|
||||
|
||||
void initRing(ring_config_t *ringConfigRX,
|
||||
uint8_t *rxBuffer,
|
||||
uint32_t bufSizeRX,
|
||||
int rxInterruptID,
|
||||
ring_config_t *ringConfigTX,
|
||||
uint8_t *txBuffer,
|
||||
uint32_t bufSizeTX,
|
||||
int txInterruptID,
|
||||
int timeOut);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
@ -1,202 +0,0 @@
|
||||
#include <stddef.h>
|
||||
#include "audio_drv.h"
|
||||
#include "arm_vsi.h"
|
||||
#ifdef _RTE_
|
||||
#include "RTE_Components.h"
|
||||
#endif
|
||||
#include CMSIS_device_header
|
||||
|
||||
#include "cmsis_os2.h"
|
||||
|
||||
|
||||
|
||||
#include "RingBuffer.h"
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
#include "SchedEvents.h"
|
||||
#include "AudioConfig.h"
|
||||
#include "RingConfig.h"
|
||||
|
||||
#include "RingInit.h"
|
||||
|
||||
extern osThreadId_t gStreamingThreadID;
|
||||
|
||||
// Number of bytes read by DMA
|
||||
#define AUDIO_BLOCK_SIZE_RX RING_BUFSIZE_RX
|
||||
#define AUDIO_BLOCK_SIZE_TX RING_BUFSIZE_TX
|
||||
|
||||
// Number of DMA blocks
|
||||
#define AUDIO_DMA_NB_BLOCKS RING_NBBUFS
|
||||
|
||||
|
||||
|
||||
|
||||
#if AUDIO_DRV_RX_ENABLED
|
||||
extern ring_config_t ringConfigRX;
|
||||
|
||||
#ifdef __FVP_PY
|
||||
__attribute__((section(".ARM.__at_0x90000000")))
|
||||
#endif
|
||||
#if CGSTATIC_VHT_TX_RX_ORDERING
|
||||
__ALIGNED(16) static uint8_t dmaRX[AUDIO_BLOCK_SIZE_RX];
|
||||
int rxCount=0;
|
||||
#endif
|
||||
__ALIGNED(16) static uint8_t audio_bufferRX[AUDIO_DMA_NB_BLOCKS*AUDIO_BLOCK_SIZE_RX];
|
||||
static uint8_t *reservedBufRX=NULL;
|
||||
#endif
|
||||
|
||||
#if AUDIO_DRV_TX_ENABLED
|
||||
extern ring_config_t ringConfigTX;
|
||||
|
||||
#ifdef __FVP_PY
|
||||
__attribute__((section(".ARM.__at_0x9FFF0000")))
|
||||
#endif
|
||||
#if CGSTATIC_VHT_TX_RX_ORDERING
|
||||
__ALIGNED(16) static uint8_t dmaTX[AUDIO_BLOCK_SIZE_TX];
|
||||
int txCount=0;
|
||||
#endif
|
||||
__ALIGNED(16) static uint8_t audio_bufferTX[AUDIO_DMA_NB_BLOCKS*AUDIO_BLOCK_SIZE_TX];
|
||||
static uint8_t *reservedBufTX=NULL;
|
||||
#endif
|
||||
|
||||
uint8_t* AudioRXBuffer()
|
||||
{
|
||||
#if AUDIO_DRV_RX_ENABLED
|
||||
return(audio_bufferRX);
|
||||
#else
|
||||
return(NULL);
|
||||
#endif
|
||||
}
|
||||
|
||||
uint8_t* AudioTXBuffer()
|
||||
{
|
||||
#if AUDIO_DRV_TX_ENABLED
|
||||
return(audio_bufferTX);
|
||||
#else
|
||||
return(NULL);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void AudioEvent (uint32_t event) {
|
||||
|
||||
#if AUDIO_DRV_RX_ENABLED
|
||||
if (event & AUDIO_DRV_EVENT_RX_DATA)
|
||||
{
|
||||
|
||||
#if CGSTATIC_VHT_TX_RX_ORDERING
|
||||
memcpy(reservedBufRX,dmaRX,RING_BUFSIZE_RX);
|
||||
(void)AudioDrv_Control(AUDIO_DRV_CONTROL_RX_DISABLE);
|
||||
(void)AudioDrv_Control(AUDIO_DRV_CONTROL_TX_ENABLE);
|
||||
#endif
|
||||
ringInterruptReleaseBuffer(&ringConfigRX,(void *)gStreamingThreadID);
|
||||
int reservedRX=ringInterruptReserveBuffer(&ringConfigRX);
|
||||
reservedBufRX=ringGetBufferAddress(&ringConfigRX,reservedRX);
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
#if AUDIO_DRV_TX_ENABLED
|
||||
if (event & AUDIO_DRV_EVENT_TX_DATA)
|
||||
{
|
||||
#if CGSTATIC_VHT_TX_RX_ORDERING
|
||||
memcpy(dmaTX,reservedBufTX,RING_BUFSIZE_TX);
|
||||
(void)AudioDrv_Control(AUDIO_DRV_CONTROL_TX_DISABLE);
|
||||
(void)AudioDrv_Control(AUDIO_DRV_CONTROL_RX_ENABLE);
|
||||
#endif
|
||||
ringInterruptReleaseBuffer(&ringConfigTX,(void *)gStreamingThreadID);
|
||||
int reservedTX=ringInterruptReserveBuffer(&ringConfigTX);
|
||||
reservedBufTX=ringGetBufferAddress(&ringConfigTX,reservedTX);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
int32_t AudioDrv_Setup(void) {
|
||||
int32_t ret;
|
||||
|
||||
ret = AudioDrv_Initialize(AudioEvent);
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if AUDIO_DRV_RX_ENABLED
|
||||
|
||||
ret = AudioDrv_Configure(AUDIO_DRV_INTERFACE_RX,
|
||||
AUDIO_DRV_NBCHANNELS_RX, /* single channel */
|
||||
8U * AUDIO_DRV_CHANNEL_ENCODING_RX, /* 16 sample bits */
|
||||
static_cast<uint32_t>(AUDIO_DRV_SAMPLINGFREQUENCY_RX));
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Work because user process not started yet
|
||||
*/
|
||||
|
||||
int reservedRX=ringInterruptReserveBuffer(&ringConfigRX);
|
||||
reservedBufRX=ringGetBufferAddress(&ringConfigRX,reservedRX);
|
||||
|
||||
#if CGSTATIC_VHT_TX_RX_ORDERING
|
||||
ret = AudioDrv_SetBuf(AUDIO_DRV_INTERFACE_RX,
|
||||
dmaRX, 1,AUDIO_BLOCK_SIZE_RX);
|
||||
#else
|
||||
ret = AudioDrv_SetBuf(AUDIO_DRV_INTERFACE_RX,
|
||||
audio_bufferRX, AUDIO_DMA_NB_BLOCKS,AUDIO_BLOCK_SIZE_RX);
|
||||
#endif
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if !CGSTATIC_VHT_TX_RX_ORDERING
|
||||
ret = AudioDrv_Control(AUDIO_DRV_CONTROL_RX_ENABLE);
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* AUDIO_DRV_RX_ENABLED */
|
||||
|
||||
#if AUDIO_DRV_TX_ENABLED
|
||||
ret = AudioDrv_Configure(AUDIO_DRV_INTERFACE_TX,
|
||||
AUDIO_DRV_NBCHANNELS_TX, /* single channel */
|
||||
8U * AUDIO_DRV_CHANNEL_ENCODING_TX, /* 16 sample bits */
|
||||
static_cast<uint32_t>(AUDIO_DRV_SAMPLINGFREQUENCY_TX));
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Work because user process not started yet
|
||||
*/
|
||||
|
||||
/* dataflow must be 1 packet ahead of the TX interrupt*/
|
||||
ringUserReserveBuffer(&ringConfigTX);
|
||||
ringUserReleaseBuffer(&ringConfigTX);
|
||||
|
||||
ringUserReserveBuffer(&ringConfigTX);
|
||||
ringUserReleaseBuffer(&ringConfigTX);
|
||||
|
||||
int reservedTX=ringInterruptReserveBuffer(&ringConfigTX);
|
||||
reservedBufTX=ringGetBufferAddress(&ringConfigTX,reservedTX);
|
||||
|
||||
#if CGSTATIC_VHT_TX_RX_ORDERING
|
||||
ret = AudioDrv_SetBuf(AUDIO_DRV_INTERFACE_TX,
|
||||
dmaTX, 1 ,AUDIO_BLOCK_SIZE_TX);
|
||||
#else
|
||||
ret = AudioDrv_SetBuf(AUDIO_DRV_INTERFACE_TX,
|
||||
audio_bufferTX, AUDIO_DMA_NB_BLOCKS,AUDIO_BLOCK_SIZE_TX);
|
||||
#endif
|
||||
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = AudioDrv_Control(AUDIO_DRV_CONTROL_TX_ENABLE);
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* AUDIO_DRV_TX_ENABLED */
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1,292 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2021 Arm Limited. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <stddef.h>
|
||||
#include "audio_drv.h"
|
||||
#include "arm_vsi.h"
|
||||
#ifdef _RTE_
|
||||
#include "RTE_Components.h"
|
||||
#endif
|
||||
#include CMSIS_device_header
|
||||
|
||||
/* Audio Peripheral definitions */
|
||||
#define AudioO ARM_VSI1 /* Audio Output access struct */
|
||||
#define AudioO_IRQn ARM_VSI1_IRQn /* Audio Output Interrupt number */
|
||||
#define AudioO_Handler ARM_VSI1_Handler /* Audio Output Interrupt handler */
|
||||
#define AudioI ARM_VSI0 /* Audio Input access struct */
|
||||
#define AudioI_IRQn ARM_VSI0_IRQn /* Audio Input Interrupt number */
|
||||
#define AudioI_Handler ARM_VSI0_Handler /* Audio Input Interrupt handler */
|
||||
|
||||
/* Audio Peripheral registers */
|
||||
#define CONTROL Regs[0] /* Control receiver */
|
||||
#define CHANNELS Regs[1] /* Number of channels */
|
||||
#define SAMPLE_BITS Regs[2] /* Sample number of bits (8..32) */
|
||||
#define SAMPLE_RATE Regs[3] /* Sample rate (samples per second) */
|
||||
#define STOP_SIMULATION Regs[4] /* Stop audio simulation */
|
||||
|
||||
/* Audio Control register definitions */
|
||||
#define CONTROL_ENABLE_Pos 0U /* CONTROL: ENABLE Position */
|
||||
#define CONTROL_ENABLE_Msk (1UL << CONTROL_ENABLE_Pos) /* CONTROL: ENABLE Mask */
|
||||
|
||||
/* Driver State */
|
||||
static uint8_t Initialized = 0U;
|
||||
|
||||
/* Event Callback */
|
||||
static AudioDrv_Event_t CB_Event = NULL;
|
||||
|
||||
/* Audio Output Interrupt Handler */
|
||||
void AudioO_Handler (void) {
|
||||
|
||||
AudioO->IRQ.Clear = 0x00000001U;
|
||||
__DSB();
|
||||
__ISB();
|
||||
if (CB_Event != NULL) {
|
||||
CB_Event(AUDIO_DRV_EVENT_TX_DATA);
|
||||
}
|
||||
}
|
||||
|
||||
/* Audio Input Interrupt Handler */
|
||||
void AudioI_Handler (void) {
|
||||
|
||||
AudioI->IRQ.Clear = 0x00000001U;
|
||||
__DSB();
|
||||
__ISB();
|
||||
if (CB_Event != NULL) {
|
||||
CB_Event(AUDIO_DRV_EVENT_RX_DATA);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Initialize Audio Interface */
|
||||
int32_t AudioDrv_Initialize (AudioDrv_Event_t cb_event) {
|
||||
|
||||
CB_Event = cb_event;
|
||||
|
||||
/* Initialize Audio Output peripheral */
|
||||
AudioO->Timer.Control = 0U;
|
||||
AudioO->DMA.Control = 0U;
|
||||
AudioO->IRQ.Clear = 0x00000001U;
|
||||
AudioO->IRQ.Enable = 0x00000001U;
|
||||
AudioO->CONTROL = 0U;
|
||||
|
||||
/* Initialize Audio Input peripheral */
|
||||
AudioI->Timer.Control = 0U;
|
||||
AudioI->DMA.Control = 0U;
|
||||
AudioI->IRQ.Clear = 0x00000001U;
|
||||
AudioI->IRQ.Enable = 0x00000001U;
|
||||
AudioI->CONTROL = 0U;
|
||||
|
||||
/* Enable peripheral interrupts */
|
||||
//NVIC_EnableIRQ(AudioO_IRQn);
|
||||
NVIC->ISER[(((uint32_t)AudioO_IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)AudioO_IRQn) & 0x1FUL));
|
||||
//NVIC_EnableIRQ(AudioI_IRQn);
|
||||
NVIC->ISER[(((uint32_t)AudioI_IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)AudioI_IRQn) & 0x1FUL));
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
||||
Initialized = 1U;
|
||||
|
||||
return AUDIO_DRV_OK;
|
||||
}
|
||||
|
||||
/* De-initialize Audio Interface */
|
||||
int32_t AudioDrv_Uninitialize (void) {
|
||||
|
||||
/* Disable peripheral interrupts */
|
||||
//NVIC_DisableIRQ(AudioO_IRQn);
|
||||
NVIC->ICER[(((uint32_t)AudioO_IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)AudioO_IRQn) & 0x1FUL));
|
||||
//NVIC_DisableIRQ(AudioI_IRQn);
|
||||
NVIC->ICER[(((uint32_t)AudioI_IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)AudioI_IRQn) & 0x1FUL));
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
||||
/* De-initialize Audio Output peripheral */
|
||||
AudioO->Timer.Control = 0U;
|
||||
AudioO->DMA.Control = 0U;
|
||||
AudioO->IRQ.Clear = 0x00000001U;
|
||||
AudioO->IRQ.Enable = 0x00000000U;
|
||||
AudioO->CONTROL = 0U;
|
||||
|
||||
/* De-initialize Audio Input peripheral */
|
||||
AudioI->Timer.Control = 0U;
|
||||
AudioI->DMA.Control = 0U;
|
||||
AudioI->IRQ.Clear = 0x00000001U;
|
||||
AudioI->IRQ.Enable = 0x00000000U;
|
||||
AudioI->CONTROL = 0U;
|
||||
|
||||
Initialized = 0U;
|
||||
|
||||
return AUDIO_DRV_OK;
|
||||
}
|
||||
|
||||
/* Configure Audio Interface */
|
||||
int32_t AudioDrv_Configure (uint32_t interface, uint32_t channels, uint32_t sample_bits, uint32_t sample_rate) {
|
||||
uint32_t format;
|
||||
|
||||
if (Initialized == 0U) {
|
||||
return AUDIO_DRV_ERROR;
|
||||
}
|
||||
|
||||
if ((channels < 1U) ||
|
||||
(channels > 32U) ||
|
||||
(sample_bits < 8U) ||
|
||||
(sample_bits > 32U) ||
|
||||
(sample_rate == 0U)) {
|
||||
return AUDIO_DRV_ERROR_PARAMETER;
|
||||
}
|
||||
|
||||
switch (interface) {
|
||||
case AUDIO_DRV_INTERFACE_TX:
|
||||
if ((AudioO->CONTROL & CONTROL_ENABLE_Msk) != 0U) {
|
||||
return AUDIO_DRV_ERROR;
|
||||
}
|
||||
AudioO->CHANNELS = channels;
|
||||
AudioO->SAMPLE_BITS = sample_bits;
|
||||
AudioO->SAMPLE_RATE = sample_rate;
|
||||
break;
|
||||
case AUDIO_DRV_INTERFACE_RX:
|
||||
if ((AudioI->CONTROL & CONTROL_ENABLE_Msk) != 0U) {
|
||||
return AUDIO_DRV_ERROR;
|
||||
}
|
||||
AudioI->CHANNELS = channels;
|
||||
AudioI->SAMPLE_BITS = sample_bits;
|
||||
AudioI->SAMPLE_RATE = sample_rate;
|
||||
break;
|
||||
default:
|
||||
return AUDIO_DRV_ERROR_PARAMETER;
|
||||
}
|
||||
|
||||
return AUDIO_DRV_OK;
|
||||
}
|
||||
|
||||
/* Set Audio Interface buffer */
|
||||
int32_t AudioDrv_SetBuf (uint32_t interface, void *buf, uint32_t block_num, uint32_t block_size) {
|
||||
|
||||
if (Initialized == 0U) {
|
||||
return AUDIO_DRV_ERROR;
|
||||
}
|
||||
|
||||
switch (interface) {
|
||||
case AUDIO_DRV_INTERFACE_TX:
|
||||
if ((AudioO->DMA.Control & ARM_VSI_DMA_Enable_Msk) != 0U) {
|
||||
return AUDIO_DRV_ERROR;
|
||||
}
|
||||
AudioO->DMA.Address = (uint32_t)buf;
|
||||
AudioO->DMA.BlockNum = block_num;
|
||||
AudioO->DMA.BlockSize = block_size;
|
||||
break;
|
||||
case AUDIO_DRV_INTERFACE_RX:
|
||||
if ((AudioI->DMA.Control & ARM_VSI_DMA_Enable_Msk) != 0U) {
|
||||
return AUDIO_DRV_ERROR;
|
||||
}
|
||||
AudioI->DMA.Address = (uint32_t)buf;
|
||||
AudioI->DMA.BlockNum = block_num;
|
||||
AudioI->DMA.BlockSize = block_size;
|
||||
break;
|
||||
default:
|
||||
return AUDIO_DRV_ERROR_PARAMETER;
|
||||
}
|
||||
|
||||
return AUDIO_DRV_OK;
|
||||
}
|
||||
|
||||
/* Control Audio Interface */
|
||||
int32_t AudioDrv_Control (uint32_t control) {
|
||||
uint32_t sample_size;
|
||||
uint32_t sample_rate;
|
||||
uint32_t block_size;
|
||||
|
||||
if (Initialized == 0U) {
|
||||
return AUDIO_DRV_ERROR;
|
||||
}
|
||||
|
||||
if ((control & AUDIO_DRV_CONTROL_TX_DISABLE) != 0U) {
|
||||
AudioO->Timer.Control = 0U;
|
||||
AudioO->DMA.Control = 0U;
|
||||
AudioO->CONTROL = 0U;
|
||||
} else if ((control & AUDIO_DRV_CONTROL_TX_ENABLE) != 0U) {
|
||||
AudioO->CONTROL = CONTROL_ENABLE_Msk;
|
||||
AudioO->DMA.Control = ARM_VSI_DMA_Direction_M2P |
|
||||
ARM_VSI_DMA_Enable_Msk;
|
||||
sample_size = AudioO->CHANNELS * ((AudioO->SAMPLE_BITS + 7U) / 8U);
|
||||
sample_rate = AudioO->SAMPLE_RATE;
|
||||
if ((sample_size == 0U) || (sample_rate == 0U)) {
|
||||
AudioO->Timer.Interval = 0xFFFFFFFFU;
|
||||
} else {
|
||||
block_size = AudioO->DMA.BlockSize;
|
||||
AudioO->Timer.Interval = (1000000U * (block_size / sample_size)) / sample_rate;
|
||||
}
|
||||
AudioO->Timer.Control = ARM_VSI_Timer_Trig_DMA_Msk |
|
||||
ARM_VSI_Timer_Trig_IRQ_Msk |
|
||||
ARM_VSI_Timer_Periodic_Msk |
|
||||
ARM_VSI_Timer_Run_Msk;
|
||||
}
|
||||
|
||||
if ((control & AUDIO_DRV_CONTROL_RX_DISABLE) != 0U) {
|
||||
AudioI->Timer.Control = 0U;
|
||||
AudioI->DMA.Control = 0U;
|
||||
AudioI->CONTROL = 0U;
|
||||
} else if ((control & AUDIO_DRV_CONTROL_RX_ENABLE) != 0U) {
|
||||
AudioI->CONTROL = CONTROL_ENABLE_Msk;
|
||||
AudioI->DMA.Control = ARM_VSI_DMA_Direction_P2M |
|
||||
ARM_VSI_DMA_Enable_Msk;
|
||||
sample_size = AudioI->CHANNELS * ((AudioI->SAMPLE_BITS + 7U) / 8U);
|
||||
sample_rate = AudioI->SAMPLE_RATE;
|
||||
if ((sample_size == 0U) || (sample_rate == 0U)) {
|
||||
AudioI->Timer.Interval = 0xFFFFFFFFU;
|
||||
} else {
|
||||
block_size = AudioI->DMA.BlockSize;
|
||||
AudioI->Timer.Interval = (1000000U * (block_size / sample_size)) / sample_rate;
|
||||
}
|
||||
AudioI->Timer.Control = ARM_VSI_Timer_Trig_DMA_Msk |
|
||||
ARM_VSI_Timer_Trig_IRQ_Msk |
|
||||
ARM_VSI_Timer_Periodic_Msk |
|
||||
ARM_VSI_Timer_Run_Msk;
|
||||
}
|
||||
|
||||
return AUDIO_DRV_OK;
|
||||
}
|
||||
|
||||
/* Get transmitted block count */
|
||||
uint32_t AudioDrv_GetTxCount (void) {
|
||||
return (AudioO->Timer.Count);
|
||||
}
|
||||
|
||||
/* Get received block count */
|
||||
uint32_t AudioDrv_GetRxCount (void) {
|
||||
return (AudioI->Timer.Count);
|
||||
}
|
||||
|
||||
/* Get Audio Interface status */
|
||||
AudioDrv_Status_t AudioDrv_GetStatus (void) {
|
||||
AudioDrv_Status_t status;
|
||||
uint32_t sr;
|
||||
|
||||
if ((AudioO->CONTROL & CONTROL_ENABLE_Msk) != 0U) {
|
||||
status.tx_active = 1U;
|
||||
} else {
|
||||
status.tx_active = 0U;
|
||||
}
|
||||
|
||||
if ((AudioI->CONTROL & CONTROL_ENABLE_Msk) != 0U) {
|
||||
status.rx_active = 1U;
|
||||
} else {
|
||||
status.rx_active = 0U;
|
||||
}
|
||||
|
||||
return (status);
|
||||
}
|
||||
|
||||
|
||||
void AudioDrv_Stop (void)
|
||||
{
|
||||
int32_t ret;
|
||||
ret = AudioDrv_Control(AUDIO_DRV_CONTROL_TX_DISABLE);
|
||||
ret = AudioDrv_Control(AUDIO_DRV_CONTROL_RX_DISABLE);
|
||||
|
||||
AudioO->STOP_SIMULATION=1;
|
||||
AudioI->STOP_SIMULATION=1;
|
||||
|
||||
}
|
||||
@ -1,135 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2021 Arm Limited. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef __AUDIO_DRV_H
|
||||
#define __AUDIO_DRV_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* Audio Interface */
|
||||
#define AUDIO_DRV_INTERFACE_TX (1U) ///< Transmitter
|
||||
#define AUDIO_DRV_INTERFACE_RX (2U) ///< Receiver
|
||||
|
||||
/* Audio Control */
|
||||
#define AUDIO_DRV_CONTROL_TX_ENABLE (1UL << 0) ///< Enable Transmitter
|
||||
#define AUDIO_DRV_CONTROL_RX_ENABLE (1UL << 1) ///< Enable Receiver
|
||||
#define AUDIO_DRV_CONTROL_TX_DISABLE (1UL << 2) ///< Disable Transmitter
|
||||
#define AUDIO_DRV_CONTROL_RX_DISABLE (1UL << 3) ///< Disable Receiver
|
||||
|
||||
/* Audio Event */
|
||||
#define AUDIO_DRV_EVENT_TX_DATA (1UL << 0) ///< Data block transmitted
|
||||
#define AUDIO_DRV_EVENT_RX_DATA (1UL << 1) ///< Data block received
|
||||
|
||||
/* Return code */
|
||||
#define AUDIO_DRV_OK (0) ///< Operation succeeded
|
||||
#define AUDIO_DRV_ERROR (-1) ///< Unspecified error
|
||||
#define AUDIO_DRV_ERROR_BUSY (-2) ///< Driver is busy
|
||||
#define AUDIO_DRV_ERROR_TIMEOUT (-3) ///< Timeout occurred
|
||||
#define AUDIO_DRV_ERROR_UNSUPPORTED (-4) ///< Operation not supported
|
||||
#define AUDIO_DRV_ERROR_PARAMETER (-5) ///< Parameter error
|
||||
|
||||
/**
|
||||
\brief Audio Status
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t tx_active : 1; ///< Transmitter active
|
||||
uint32_t rx_active : 1; ///< Receiver active
|
||||
uint32_t reserved : 30;
|
||||
} AudioDrv_Status_t;
|
||||
|
||||
/**
|
||||
\fn AudioDrv_Event_t
|
||||
\brief Audio Events callback function type: void (*AudioDrv_Event_t) (uint32_t event
|
||||
\param[in] event events notification mask
|
||||
\return none
|
||||
*/
|
||||
typedef void (*AudioDrv_Event_t) (uint32_t event);
|
||||
|
||||
uint8_t* AudioRXBuffer();
|
||||
uint8_t* AudioTXBuffer();
|
||||
extern int32_t AudioDrv_Setup(void);
|
||||
|
||||
/**
|
||||
\fn int32_t AudioDrv_Initialize (AudioDrv_Event_t cb_event)
|
||||
\brief Initialize Audio Interface.
|
||||
\param[in] cb_event pointer to \ref AudioDrv_Event_t
|
||||
\return return code
|
||||
*/
|
||||
int32_t AudioDrv_Initialize (AudioDrv_Event_t cb_event);
|
||||
|
||||
/**
|
||||
\fn void AudioDrv_Stop (void);
|
||||
\brief Stop audio simulation.
|
||||
\return return code
|
||||
*/
|
||||
void AudioDrv_Stop (void);
|
||||
|
||||
/**
|
||||
\fn int32_t AudioDrv_Uninitialize (void)
|
||||
\brief De-initialize Audio Interface.
|
||||
\return return code
|
||||
*/
|
||||
int32_t AudioDrv_Uninitialize (void);
|
||||
|
||||
/**
|
||||
\fn int32_t AudioDrv_Configure (uint32_t interface, uint32_t channels, uint32_t sample_bits, uint32_t sample_rate)
|
||||
\brief Configure Audio Interface.
|
||||
\param[in] interface audio interface
|
||||
\param[in] channels number of channels
|
||||
\param[in] sample_bits sample number of bits (8..32)
|
||||
\param[in] sample_rate sample rate (samples per second)
|
||||
\return return code
|
||||
*/
|
||||
int32_t AudioDrv_Configure (uint32_t interface, uint32_t channels, uint32_t sample_bits, uint32_t sample_rate);
|
||||
|
||||
/**
|
||||
\fn int32_t AudioDrv_SetBuf (uint32_t interface, void *buf, uint32_t block_num, uint32_t block_size)
|
||||
\brief Set Audio Interface buffer.
|
||||
\param[in] interface audio interface
|
||||
\param[in] buf pointer to buffer for audio data
|
||||
\param[in] block_num number of blocks in buffer (must be 2^n)
|
||||
\param[in] block_size block size in number of samples
|
||||
\return return code
|
||||
*/
|
||||
int32_t AudioDrv_SetBuf (uint32_t interface, void *buf, uint32_t block_num, uint32_t block_size);
|
||||
|
||||
/**
|
||||
\fn int32_t AudioDrv_Control (uint32_t control)
|
||||
\brief Control Audio Interface.
|
||||
\param[in] control operation
|
||||
\return return code
|
||||
*/
|
||||
int32_t AudioDrv_Control (uint32_t control);
|
||||
|
||||
/**
|
||||
\fn uint32_t AudioDrv_GetTxCount (void)
|
||||
\brief Get transmitted block count.
|
||||
\return number of transmitted blocks
|
||||
*/
|
||||
uint32_t AudioDrv_GetTxCount (void);
|
||||
|
||||
/**
|
||||
\fn uint32_t AudioDrv_GetRxCount (void)
|
||||
\brief Get received block count.
|
||||
\return number of received blocks
|
||||
*/
|
||||
uint32_t AudioDrv_GetRxCount (void);
|
||||
|
||||
/**
|
||||
\fn AudioDrv_Status_t AudioDrv_GetStatus (void)
|
||||
\brief Get Audio Interface status.
|
||||
\return \ref AudioDrv_Status_t
|
||||
*/
|
||||
AudioDrv_Status_t AudioDrv_GetStatus (void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AUDIO_DRV_H */
|
||||
@ -1,101 +0,0 @@
|
||||
#include <stddef.h>
|
||||
#include "video_drv.h"
|
||||
#include "arm_vsi.h"
|
||||
#ifdef _RTE_
|
||||
#include "RTE_Components.h"
|
||||
#endif
|
||||
#include CMSIS_device_header
|
||||
|
||||
#include "cmsis_os2.h"
|
||||
|
||||
|
||||
|
||||
#include "RingBuffer.h"
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
#include "SchedEvents.h"
|
||||
#include "VideoConfig.h"
|
||||
#include "RingConfig.h"
|
||||
|
||||
#include "RingInit.h"
|
||||
|
||||
extern osThreadId_t gStreamingThreadID;
|
||||
|
||||
// Number of bytes read by DMA
|
||||
#define VIDEO_BLOCK_SIZE RING_BUFSIZE_RX
|
||||
|
||||
// Number of DMA blocks
|
||||
#define VIDEO_DMA_NB_BLOCKS RING_NBBUFS
|
||||
|
||||
|
||||
extern int32_t VideoDrv_Setup(void);
|
||||
|
||||
|
||||
extern ring_config_t ringConfigRX;
|
||||
|
||||
#ifdef __FVP_PY
|
||||
__attribute__((section(".ARM.__at_0x90000000")))
|
||||
#endif
|
||||
__ALIGNED(16) static uint8_t video_bufferRX[VIDEO_DMA_NB_BLOCKS*VIDEO_BLOCK_SIZE];
|
||||
static uint8_t *reservedBufRX=NULL;
|
||||
|
||||
|
||||
uint8_t* VideoRXBuffer()
|
||||
{
|
||||
return(video_bufferRX);
|
||||
}
|
||||
|
||||
|
||||
static void VideoEvent (uint32_t event) {
|
||||
|
||||
if (event & VIDEO_DRV_EVENT_RX_DATA)
|
||||
{
|
||||
|
||||
|
||||
ringInterruptReleaseBuffer(&ringConfigRX,(void *)gStreamingThreadID);
|
||||
int reservedRX=ringInterruptReserveBuffer(&ringConfigRX);
|
||||
reservedBufRX=ringGetBufferAddress(&ringConfigRX,reservedRX);
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
int32_t VideoDrv_Setup(void) {
|
||||
int32_t ret;
|
||||
|
||||
ret = VideoDrv_Initialize(VideoEvent);
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
ret = VideoDrv_Configure(VIDEO_DRV_INTERFACE_RX,
|
||||
8U * VIDEO_DRV_PIXEL_SIZE, /* 16 sample bits */
|
||||
static_cast<uint32_t>(VIDEO_DRV_FRAME_RATE*VIDEO_DRV_WIDTH*VIDEO_DRV_HEIGHT));
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Work because user process not started yet
|
||||
*/
|
||||
|
||||
int reservedRX=ringInterruptReserveBuffer(&ringConfigRX);
|
||||
reservedBufRX=ringGetBufferAddress(&ringConfigRX,reservedRX);
|
||||
|
||||
|
||||
ret = VideoDrv_SetBuf(VIDEO_DRV_INTERFACE_RX,
|
||||
video_bufferRX, VIDEO_DMA_NB_BLOCKS,VIDEO_BLOCK_SIZE);
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = VideoDrv_Control(VIDEO_DRV_CONTROL_RX_ENABLE);
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1,232 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2021 Arm Limited. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <stddef.h>
|
||||
#include "video_drv.h"
|
||||
#include "arm_vsi.h"
|
||||
#ifdef _RTE_
|
||||
#include "RTE_Components.h"
|
||||
#endif
|
||||
#include CMSIS_device_header
|
||||
|
||||
/* Video Peripheral definitions */
|
||||
#define VideoO ARM_VSI1 /* Video Output access struct */
|
||||
#define VideoO_IRQn ARM_VSI1_IRQn /* Video Output Interrupt number */
|
||||
#define VideoO_Handler ARM_VSI1_Handler /* Video Output Interrupt handler */
|
||||
#define VideoI ARM_VSI0 /* Video Input access struct */
|
||||
#define VideoI_IRQn ARM_VSI0_IRQn /* Video Input Interrupt number */
|
||||
#define VideoI_Handler ARM_VSI0_Handler /* Video Input Interrupt handler */
|
||||
|
||||
/* Video Peripheral registers */
|
||||
#define CONTROL Regs[0] /* Control receiver */
|
||||
#define SAMPLE_BITS Regs[1] /* Sample number of bits (8..32) */
|
||||
#define SAMPLE_RATE Regs[2] /* Sample rate (frame per second) */
|
||||
#define STOP_SIMULATION Regs[4] /* Stop audio simulation */
|
||||
|
||||
/* Video Control register definitions */
|
||||
#define CONTROL_ENABLE_Pos 0U /* CONTROL: ENABLE Position */
|
||||
#define CONTROL_ENABLE_Msk (1UL << CONTROL_ENABLE_Pos) /* CONTROL: ENABLE Mask */
|
||||
|
||||
/* Driver State */
|
||||
static uint8_t Initialized = 0U;
|
||||
|
||||
/* Event Callback */
|
||||
static VideoDrv_Event_t CB_Event = NULL;
|
||||
|
||||
|
||||
/* Video Input Interrupt Handler */
|
||||
void VideoI_Handler (void) {
|
||||
|
||||
VideoI->IRQ.Clear = 0x00000001U;
|
||||
__DSB();
|
||||
__ISB();
|
||||
if (CB_Event != NULL) {
|
||||
CB_Event(VIDEO_DRV_EVENT_RX_DATA);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void VideoO_Handler (void) {
|
||||
|
||||
VideoO->IRQ.Clear = 0x00000001U;
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
|
||||
/* Initialize Video Interface */
|
||||
int32_t VideoDrv_Initialize (VideoDrv_Event_t cb_event) {
|
||||
|
||||
CB_Event = cb_event;
|
||||
|
||||
/* Initialize Video Output peripheral */
|
||||
VideoO->Timer.Control = 0U;
|
||||
VideoO->DMA.Control = 0U;
|
||||
VideoO->IRQ.Clear = 0x00000001U;
|
||||
VideoO->IRQ.Enable = 0x00000001U;
|
||||
VideoO->CONTROL = 0U;
|
||||
|
||||
/* Initialize Video Input peripheral */
|
||||
VideoI->Timer.Control = 0U;
|
||||
VideoI->DMA.Control = 0U;
|
||||
VideoI->IRQ.Clear = 0x00000001U;
|
||||
VideoI->IRQ.Enable = 0x00000001U;
|
||||
VideoI->CONTROL = 0U;
|
||||
|
||||
/* Enable peripheral interrupts */
|
||||
NVIC->ISER[(((uint32_t)VideoI_IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)VideoI_IRQn) & 0x1FUL));
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
||||
Initialized = 1U;
|
||||
|
||||
return VIDEO_DRV_OK;
|
||||
}
|
||||
|
||||
/* De-initialize Video Interface */
|
||||
int32_t VideoDrv_Uninitialize (void) {
|
||||
|
||||
/* Disable peripheral interrupts */
|
||||
NVIC->ICER[(((uint32_t)VideoI_IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)VideoI_IRQn) & 0x1FUL));
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
||||
/* De-initialize Video Output peripheral */
|
||||
VideoO->Timer.Control = 0U;
|
||||
VideoO->DMA.Control = 0U;
|
||||
VideoO->IRQ.Clear = 0x00000001U;
|
||||
VideoO->IRQ.Enable = 0x00000000U;
|
||||
VideoO->CONTROL = 0U;
|
||||
|
||||
/* De-initialize Video Input peripheral */
|
||||
VideoI->Timer.Control = 0U;
|
||||
VideoI->DMA.Control = 0U;
|
||||
VideoI->IRQ.Clear = 0x00000001U;
|
||||
VideoI->IRQ.Enable = 0x00000000U;
|
||||
VideoI->CONTROL = 0U;
|
||||
|
||||
Initialized = 0U;
|
||||
|
||||
return VIDEO_DRV_OK;
|
||||
}
|
||||
|
||||
/* Configure Video Interface */
|
||||
int32_t VideoDrv_Configure (uint32_t interface, uint32_t pixel_size, uint32_t samplerate) {
|
||||
uint32_t format;
|
||||
|
||||
if (Initialized == 0U) {
|
||||
return VIDEO_DRV_ERROR;
|
||||
}
|
||||
|
||||
if ((pixel_size < 8*1U) ||
|
||||
(pixel_size > 8*2U)) {
|
||||
return VIDEO_DRV_ERROR_PARAMETER;
|
||||
}
|
||||
|
||||
switch (interface) {
|
||||
case VIDEO_DRV_INTERFACE_RX:
|
||||
if ((VideoI->CONTROL & CONTROL_ENABLE_Msk) != 0U) {
|
||||
return VIDEO_DRV_ERROR;
|
||||
}
|
||||
VideoI->SAMPLE_BITS = pixel_size;
|
||||
VideoI->SAMPLE_RATE = samplerate;
|
||||
break;
|
||||
default:
|
||||
return VIDEO_DRV_ERROR_PARAMETER;
|
||||
}
|
||||
|
||||
return VIDEO_DRV_OK;
|
||||
}
|
||||
|
||||
/* Set Video Interface buffer */
|
||||
int32_t VideoDrv_SetBuf (uint32_t interface, void *buf, uint32_t block_num, uint32_t block_size) {
|
||||
|
||||
if (Initialized == 0U) {
|
||||
return VIDEO_DRV_ERROR;
|
||||
}
|
||||
|
||||
switch (interface) {
|
||||
case VIDEO_DRV_INTERFACE_RX:
|
||||
if ((VideoI->DMA.Control & ARM_VSI_DMA_Enable_Msk) != 0U) {
|
||||
return VIDEO_DRV_ERROR;
|
||||
}
|
||||
VideoI->DMA.Address = (uint32_t)buf;
|
||||
VideoI->DMA.BlockNum = block_num;
|
||||
VideoI->DMA.BlockSize = block_size;
|
||||
break;
|
||||
default:
|
||||
return VIDEO_DRV_ERROR_PARAMETER;
|
||||
}
|
||||
|
||||
return VIDEO_DRV_OK;
|
||||
}
|
||||
|
||||
/* Control Video Interface */
|
||||
int32_t VideoDrv_Control (uint32_t control) {
|
||||
uint32_t sample_size;
|
||||
uint32_t sample_rate;
|
||||
uint32_t block_size;
|
||||
|
||||
if (Initialized == 0U) {
|
||||
return VIDEO_DRV_ERROR;
|
||||
}
|
||||
|
||||
|
||||
|
||||
if ((control & VIDEO_DRV_CONTROL_RX_DISABLE) != 0U) {
|
||||
VideoI->Timer.Control = 0U;
|
||||
VideoI->DMA.Control = 0U;
|
||||
VideoI->CONTROL = 0U;
|
||||
} else if ((control & VIDEO_DRV_CONTROL_RX_ENABLE) != 0U) {
|
||||
VideoI->CONTROL = CONTROL_ENABLE_Msk;
|
||||
VideoI->DMA.Control = ARM_VSI_DMA_Direction_P2M |
|
||||
ARM_VSI_DMA_Enable_Msk;
|
||||
sample_size = ((VideoI->SAMPLE_BITS + 7U) / 8U);
|
||||
sample_rate = VideoI->SAMPLE_RATE;
|
||||
if ((sample_size == 0U) || (sample_rate == 0U)) {
|
||||
VideoI->Timer.Interval = 0xFFFFFFFFU;
|
||||
} else {
|
||||
block_size = VideoI->DMA.BlockSize;
|
||||
VideoI->Timer.Interval = (1000000U * (block_size / sample_size)) / sample_rate;
|
||||
}
|
||||
VideoI->Timer.Control = ARM_VSI_Timer_Trig_DMA_Msk |
|
||||
ARM_VSI_Timer_Trig_IRQ_Msk |
|
||||
ARM_VSI_Timer_Periodic_Msk |
|
||||
ARM_VSI_Timer_Run_Msk;
|
||||
}
|
||||
|
||||
return VIDEO_DRV_OK;
|
||||
}
|
||||
|
||||
/* Get received block count */
|
||||
uint32_t VideoDrv_GetRxCount (void) {
|
||||
return (VideoI->Timer.Count);
|
||||
}
|
||||
|
||||
/* Get Video Interface status */
|
||||
VideoDrv_Status_t VideoDrv_GetStatus (void) {
|
||||
VideoDrv_Status_t status;
|
||||
uint32_t sr;
|
||||
|
||||
|
||||
if ((VideoI->CONTROL & CONTROL_ENABLE_Msk) != 0U) {
|
||||
status.rx_active = 1U;
|
||||
} else {
|
||||
status.rx_active = 0U;
|
||||
}
|
||||
|
||||
return (status);
|
||||
}
|
||||
|
||||
|
||||
void VideoDrv_Stop (void)
|
||||
{
|
||||
int32_t ret;
|
||||
ret = VideoDrv_Control(VIDEO_DRV_CONTROL_RX_DISABLE);
|
||||
|
||||
VideoI->STOP_SIMULATION=1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -1,124 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2021 Arm Limited. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef __VIDEO_DRV_H
|
||||
#define __VIDEO_DRV_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* Video Interface */
|
||||
#define VIDEO_DRV_INTERFACE_RX (2U) ///< Receiver
|
||||
|
||||
/* Video Control */
|
||||
#define VIDEO_DRV_CONTROL_RX_ENABLE (1UL << 1) ///< Enable Receiver
|
||||
#define VIDEO_DRV_CONTROL_RX_DISABLE (1UL << 3) ///< Disable Receiver
|
||||
|
||||
/* Video Event */
|
||||
#define VIDEO_DRV_EVENT_RX_DATA (1UL << 1) ///< Data block received
|
||||
|
||||
/* Return code */
|
||||
#define VIDEO_DRV_OK (0) ///< Operation succeeded
|
||||
#define VIDEO_DRV_ERROR (-1) ///< Unspecified error
|
||||
#define VIDEO_DRV_ERROR_BUSY (-2) ///< Driver is busy
|
||||
#define VIDEO_DRV_ERROR_TIMEOUT (-3) ///< Timeout occurred
|
||||
#define VIDEO_DRV_ERROR_UNSUPPORTED (-4) ///< Operation not supported
|
||||
#define VIDEO_DRV_ERROR_PARAMETER (-5) ///< Parameter error
|
||||
|
||||
/**
|
||||
\brief Video Status
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t tx_active : 1; ///< Transmitter active
|
||||
uint32_t rx_active : 1; ///< Receiver active
|
||||
uint32_t reserved : 30;
|
||||
} VideoDrv_Status_t;
|
||||
|
||||
uint8_t* VideoRXBuffer();
|
||||
int32_t VideoDrv_Setup(void);
|
||||
|
||||
/**
|
||||
\fn VideoDrv_Event_t
|
||||
\brief Video Events callback function type: void (*VideoDrv_Event_t) (uint32_t event
|
||||
\param[in] event events notification mask
|
||||
\return none
|
||||
*/
|
||||
typedef void (*VideoDrv_Event_t) (uint32_t event);
|
||||
|
||||
/**
|
||||
\fn int32_t VideoDrv_Initialize (VideoDrv_Event_t cb_event)
|
||||
\brief Initialize Video Interface.
|
||||
\param[in] cb_event pointer to \ref VideoDrv_Event_t
|
||||
\return return code
|
||||
*/
|
||||
int32_t VideoDrv_Initialize (VideoDrv_Event_t cb_event);
|
||||
|
||||
/**
|
||||
\fn void VideoDrv_Stop (void);
|
||||
\brief Stop audio simulation.
|
||||
\return return code
|
||||
*/
|
||||
void VideoDrv_Stop (void);
|
||||
|
||||
|
||||
/**
|
||||
\fn int32_t VideoDrv_Uninitialize (void)
|
||||
\brief De-initialize Video Interface.
|
||||
\return return code
|
||||
*/
|
||||
int32_t VideoDrv_Uninitialize (void);
|
||||
|
||||
/**
|
||||
\fn int32_t VideoDrv_Configure (uint32_t interface, uint32_t channels, uint32_t sample_bits, uint32_t sample_rate)
|
||||
\brief Configure Video Interface.
|
||||
\param[in] interface audio interface
|
||||
\param[in] pixel_size size in bytes
|
||||
\param[in] samplerate samples per second
|
||||
\return return code
|
||||
*/
|
||||
int32_t VideoDrv_Configure (uint32_t interface, uint32_t pixel_size,uint32_t samplerate);
|
||||
|
||||
/**
|
||||
\fn int32_t VideoDrv_SetBuf (uint32_t interface, void *buf, uint32_t block_num, uint32_t block_size)
|
||||
\brief Set Video Interface buffer.
|
||||
\param[in] interface audio interface
|
||||
\param[in] buf pointer to buffer for audio data
|
||||
\param[in] block_num number of blocks in buffer (must be 2^n)
|
||||
\param[in] block_size block size in number of samples
|
||||
\return return code
|
||||
*/
|
||||
int32_t VideoDrv_SetBuf (uint32_t interface, void *buf, uint32_t block_num, uint32_t block_size);
|
||||
|
||||
/**
|
||||
\fn int32_t VideoDrv_Control (uint32_t control)
|
||||
\brief Control Video Interface.
|
||||
\param[in] control operation
|
||||
\return return code
|
||||
*/
|
||||
int32_t VideoDrv_Control (uint32_t control);
|
||||
|
||||
|
||||
/**
|
||||
\fn uint32_t VideoDrv_GetRxCount (void)
|
||||
\brief Get received block count.
|
||||
\return number of received blocks
|
||||
*/
|
||||
uint32_t VideoDrv_GetRxCount (void);
|
||||
|
||||
/**
|
||||
\fn VideoDrv_Status_t VideoDrv_GetStatus (void)
|
||||
\brief Get Video Interface status.
|
||||
\return \ref VideoDrv_Status_t
|
||||
*/
|
||||
VideoDrv_Status_t VideoDrv_GetStatus (void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __VIDEO_DRV_H */
|
||||
@ -1,80 +0,0 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: StreamingSink.h
|
||||
* Description: Streaming Sink working with the RingBuffer
|
||||
*
|
||||
* $Date: 30 July 2021
|
||||
* $Revision: V1.10.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _STREAMING_SINK_H_
|
||||
#define _STREAMING_SINK_H_
|
||||
|
||||
#include "RingBuffer.h"
|
||||
|
||||
/* This is deprecated. Don't use it */
|
||||
template<typename IN, int inputSize>
|
||||
class StreamingSink: public GenericSink<IN, inputSize>
|
||||
{
|
||||
public:
|
||||
StreamingSink(FIFOBase<IN> &src,ring_config_t *config):
|
||||
GenericSink<IN,inputSize>(src),mConfig(config){};
|
||||
|
||||
int prepareForRunning() override
|
||||
{
|
||||
if (this->willUnderflow()
|
||||
)
|
||||
{
|
||||
return(CG_SKIP_EXECUTION_ID_CODE); // Skip execution
|
||||
}
|
||||
|
||||
return(0);
|
||||
};
|
||||
|
||||
int run() override
|
||||
{
|
||||
IN *b=this->getReadBuffer();
|
||||
|
||||
int bufID=ringUserReserveBuffer(mConfig);
|
||||
uint8_t *buf=ringGetBufferAddress(mConfig,bufID);
|
||||
|
||||
if (buf != NULL)
|
||||
{
|
||||
/* If a buffer is available we copy the data to the FIFO
|
||||
*/
|
||||
memcpy(buf,(void*)b,inputSize*sizeof(IN));
|
||||
|
||||
/* We release the buffer so than it can be used by the interrupt */
|
||||
ringUserReleaseBuffer(mConfig);
|
||||
return(0);
|
||||
}
|
||||
else
|
||||
{
|
||||
return(mConfig->error);
|
||||
}
|
||||
|
||||
return(0);
|
||||
}
|
||||
protected:
|
||||
ring_config_t *mConfig;
|
||||
};
|
||||
|
||||
#endif /* _STREAMING_SINK_H_ */
|
||||
@ -1,88 +0,0 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: StreamingSource.h
|
||||
* Description: Streaming source working with the Ring buffer
|
||||
*
|
||||
* $Date: 30 July 2021
|
||||
* $Revision: V1.10.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _STREAMING_SOURCE_H_
|
||||
#define _STREAMING_SOURCE_H_
|
||||
|
||||
#include "RingBuffer.h"
|
||||
|
||||
/* This is deprecated. Don't use it */
|
||||
template<typename OUT,int outputSize>
|
||||
class StreamingSource: public GenericSource<OUT,outputSize>
|
||||
{
|
||||
public:
|
||||
StreamingSource(FIFOBase<OUT> &dst,ring_config_t *config):
|
||||
GenericSource<OUT,outputSize>(dst),mConfig(config){};
|
||||
|
||||
int prepareForRunning() override
|
||||
{
|
||||
if (this->willUnderflow()
|
||||
)
|
||||
{
|
||||
return(CG_SKIP_EXECUTION_ID_CODE); // Skip execution
|
||||
}
|
||||
|
||||
return(0);
|
||||
};
|
||||
|
||||
int run() override
|
||||
{
|
||||
OUT *b=this->getWriteBuffer();
|
||||
/*
|
||||
Try to reserve a buffer. If no buffer is available, the task running
|
||||
this node will sleep.
|
||||
|
||||
If there is a timeout (configured when the ring buffer was initialized)
|
||||
the function will return a NULL pointer.
|
||||
|
||||
*/
|
||||
int bufID=ringUserReserveBuffer(mConfig);
|
||||
uint8_t *buf=ringGetBufferAddress(mConfig,bufID);
|
||||
|
||||
|
||||
if (buf != NULL)
|
||||
{
|
||||
/* If a buffer is available we copy the data to the FIFO
|
||||
*/
|
||||
memcpy((void*)b,buf,outputSize*sizeof(OUT));
|
||||
|
||||
/* We release the buffer so than it can be used by the interrupt */
|
||||
ringUserReleaseBuffer(mConfig);
|
||||
return(0);
|
||||
}
|
||||
else
|
||||
{
|
||||
return(mConfig->error);
|
||||
}
|
||||
};
|
||||
|
||||
protected:
|
||||
ring_config_t *mConfig;
|
||||
|
||||
|
||||
};
|
||||
#endif /* _STREAMING_SOURCE_H_ */
|
||||
Binary file not shown.
@ -1,4 +1,7 @@
|
||||
dist/
|
||||
build/
|
||||
examples/rec_2.dat
|
||||
|
||||
build/bin_dsp
|
||||
build/cmake_install.cmake
|
||||
build/CMakeFiles
|
||||
build/Makefile
|
||||
build/CMakeCache.txt
|
||||
|
||||
@ -0,0 +1,13 @@
|
||||
cmake_minimum_required (VERSION 3.6)
|
||||
|
||||
# Define the project
|
||||
project (pythonwrapper VERSION 0.1)
|
||||
|
||||
|
||||
###########
|
||||
#
|
||||
# CMSIS DSP
|
||||
#
|
||||
|
||||
add_subdirectory(${CMSISDSP}/Source bin_dsp)
|
||||
|
||||
@ -0,0 +1,5 @@
|
||||
DEL /F CMakeCache.txt
|
||||
RMDIR /S /Q CMakeFiles
|
||||
DEL /F Makefile
|
||||
RMDIR /S /Q bin_dsp
|
||||
DEL /F cmake_install.cmake
|
||||
@ -0,0 +1,8 @@
|
||||
cmake -DHOST=YES ^
|
||||
-DLOOPUNROLL=ON ^
|
||||
-DWRAPPER=YES ^
|
||||
-DCMSISDSP="path to CMSIS-DSP folder" ^
|
||||
-DCMAKE_C_FLAGS_RELEASE="-std=c11 -Ofast -ffast-math -DNDEBUG -Wall -Wextra" ^
|
||||
-DCMAKE_CXX_FLAGS_RELEASE="-fno-rtti -std=c++11 -Ofast -ffast-math -DNDEBUG -Wall -Wextra -Wno-unused-parameter" ^
|
||||
-G "Unix Makefiles" ..
|
||||
|
||||
@ -0,0 +1,5 @@
|
||||
rm -f CMakeCache.txt
|
||||
rm -rf CMakeFiles
|
||||
rm -f Makefile
|
||||
rm -rf bin_dsp
|
||||
rm -f cmake_install.cmake
|
||||
@ -0,0 +1,11 @@
|
||||
cmake -DHOST=YES \
|
||||
-DLOOPUNROLL=ON \
|
||||
-DWRAPPER=YES \
|
||||
-DCMAKE_POSITION_INDEPENDENT_CODE=YES \
|
||||
-DCMSISDSP="path to CMSIS-DSP folder" \
|
||||
-DCMAKE_C_FLAGS_RELEASE="-std=c11 -Ofast -ffast-math -DNDEBUG -Wall -Wextra" \
|
||||
-DCMAKE_CXX_FLAGS_RELEASE="-fno-rtti -std=c++11 -Ofast -ffast-math -DNDEBUG -Wall -Wextra -Wno-unused-parameter" \
|
||||
-G "Unix Makefiles" ..
|
||||
|
||||
# For Mac universal lib
|
||||
# -arch x86_64 -arch arm64 -mmacosx-version-min=11.0
|
||||
@ -1,20 +1,81 @@
|
||||
import cmsisdsp as dsp
|
||||
import cmsisdsp.fixedpoint as f
|
||||
|
||||
import numpy as np
|
||||
from scipy import signal
|
||||
import matplotlib.pyplot as plt
|
||||
import scipy.fft
|
||||
|
||||
import colorama
|
||||
from colorama import init,Fore, Back, Style
|
||||
from numpy.testing import assert_allclose
|
||||
|
||||
init()
|
||||
|
||||
def printTitle(s):
|
||||
print("\n" + Fore.GREEN + Style.BRIGHT + s + Style.RESET_ALL)
|
||||
|
||||
def printSubTitle(s):
|
||||
print("\n" + Style.BRIGHT + s + Style.RESET_ALL)
|
||||
|
||||
|
||||
def chop(A, eps = 1e-6):
|
||||
B = np.copy(A)
|
||||
B[np.abs(A) < eps] = 0
|
||||
return B
|
||||
|
||||
nb = 32
|
||||
signal = np.cos(2 * np.pi * np.arange(nb) / nb)*np.cos(0.2*2 * np.pi * np.arange(nb) / nb)
|
||||
|
||||
ref=scipy.fft.rfft(signal)
|
||||
invref = scipy.fft.irfft(ref)
|
||||
|
||||
print(f"ref length = {len(ref)}")
|
||||
print(ref)
|
||||
|
||||
# Convert ref to CMSIS-DSP format
|
||||
referenceFloat=np.zeros(2*len(ref))
|
||||
print(f"referenceFloat length = {len(referenceFloat)}")
|
||||
# Replace complex datatype by real datatype
|
||||
referenceFloat[0::2] = np.real(ref)
|
||||
referenceFloat[1::2] = np.imag(ref)
|
||||
# Copy Nyquist frequency value into first
|
||||
# sample.This is just a storage trick so that the
|
||||
# output of the RFFT has same length as input
|
||||
# It is legacy behavior that we need to keep
|
||||
# for backward compatibility but it is not
|
||||
# very pretty
|
||||
#referenceFloat[1] = np.real(ref[-1])
|
||||
|
||||
rifftQ31=dsp.arm_rfft_instance_q31()
|
||||
status=dsp.arm_rfft_init_q31(rifftQ31,nb,1,1)
|
||||
# Apply CMSIS-DSP scaling
|
||||
referenceQ31 = f.toQ31(referenceFloat / nb)
|
||||
|
||||
resultQ31 = dsp.arm_rfft_q31(rifftQ31,referenceQ31)
|
||||
resultF = f.Q31toF32(resultQ31)
|
||||
|
||||
print(f"resultF length = {len(resultF)}")
|
||||
assert_allclose(invref/nb,resultF,atol=1e-6)
|
||||
|
||||
signalQ31 = f.toQ31(signal)
|
||||
rfftQ31=dsp.arm_rfft_instance_q31()
|
||||
status=dsp.arm_rfft_init_q31(rfftQ31,nb,0,1)
|
||||
resultQ31 = dsp.arm_rfft_q31(rfftQ31,signalQ31)
|
||||
print(len(resultQ31))
|
||||
print(2*nb)
|
||||
resultF = f.Q31toF32(resultQ31) * nb
|
||||
|
||||
firf32 = dsp.arm_fir_instance_f32()
|
||||
dsp.arm_fir_init_f32(firf32,3,[1.,2,3],[0,0,0,0,0,0,0])
|
||||
print(firf32.numTaps())
|
||||
filtered_x = signal.lfilter([3,2,1.], 1.0, [1,2,3,4,5,1,2,3,4,5])
|
||||
print(filtered_x)
|
||||
print(dsp.arm_fir_f32(firf32,[1,2,3,4,5]))
|
||||
print(dsp.arm_fir_f32(firf32,[1,2,3,4,5]))
|
||||
def compareWithConjugatePart(r):
|
||||
res = r[0::2] + 1j * r[1::2]
|
||||
conjPart = res[nb:nb//2:-1].conj()
|
||||
refPart = res[1:nb//2]
|
||||
assert(np.equal(refPart , conjPart).all())
|
||||
|
||||
a=np.array([[1.,2,3,4],[5,6,7,8],[9,10,11,12]])
|
||||
b=np.array([[1.,2,3,4],[5.1,6,7,8],[9.1,10,11,12]])
|
||||
#print(a+b)
|
||||
compareWithConjugatePart(resultF)
|
||||
|
||||
#print("OK")
|
||||
res = resultF[0::2] + 1j * resultF[1::2]
|
||||
print(res)
|
||||
|
||||
v=dsp.arm_mat_add_f32(a,b)
|
||||
print(v)
|
||||
print(res[0:nb//2+1])
|
||||
print(res[0:nb//2+1].shape)
|
||||
@ -1,2 +1,2 @@
|
||||
# Python wrapper version
|
||||
__version__ = "1.9.5"
|
||||
__version__ = "1.9.6"
|
||||
|
||||
Loading…
Reference in New Issue