diff --git a/Platforms/NORMALFVP/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h b/Platforms/NORMALFVP/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h new file mode 100755 index 00000000..335f001f --- /dev/null +++ b/Platforms/NORMALFVP/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h @@ -0,0 +1,132 @@ +/**************************************************************************//** + * @file ARMv81MML_DP.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * Armv8.1-M Mainline Device Series (configured for Armv8.1-M Mainline with double precision FPU, with DSP extension, with TrustZone) + * @version V1.0.0 + * @date 25. February 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMv81MML_DSP_DP_H +#define ARMv81MML_DSP_DP_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* -------------------- Armv8.1-M Mainline Processor Exceptions Numbers --------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SecureFault_IRQn = -9, /* 7 Secure Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/* ------------------- Processor Interrupt Numbers ------------------------------ */ + Interrupt0_IRQn = 0, + Interrupt1_IRQn = 1, + Interrupt2_IRQn = 2, + Interrupt3_IRQn = 3, + Interrupt4_IRQn = 4, + Interrupt5_IRQn = 5, + Interrupt6_IRQn = 6, + Interrupt7_IRQn = 7, + Interrupt8_IRQn = 8, + Interrupt9_IRQn = 9 + /* Interrupts 10 .. 480 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined (__ICCARM__) + #pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning 586 +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + +/* --- Configuration of the Armv8.1-M Mainline Processor and Core Peripherals --- */ +#define __ARMv81MML_REV 0x0001U /* Core revision r0p1 */ +#define __SAUREGION_PRESENT 1U /* SAU regions present */ +#define __MPU_PRESENT 1U /* MPU present */ +#define __VTOR_PRESENT 1U /* VTOR present */ +#define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /* FPU present */ +#define __FPU_DP 1U /* double precision FPU */ +#define __DSP_PRESENT 1U /* DSP extension present */ +#define __MVE_PRESENT 1U /* MVE extensions present */ +#define __MVE_FP 1U /* MVE floating point present */ + +#include "core_armv81mml.h" /* Processor and core peripherals */ +#include "system_ARMv81MML.h" /* System Header */ + + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) + #pragma pop +#elif defined (__ICCARM__) + /* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + #pragma clang diagnostic pop +#elif defined (__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined (__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined (__TASKING__) + #pragma warning restore +#elif defined (__CSMC__) + /* anonymous unions are enabled by default */ +#else + #warning Not supported compiler type +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* ARMv81MML_DSP_DP_H */ diff --git a/Platforms/NORMALFVP/ARMv81MML/Include/system_ARMv81MML.h b/Platforms/NORMALFVP/ARMv81MML/Include/system_ARMv81MML.h new file mode 100755 index 00000000..43218c6a --- /dev/null +++ b/Platforms/NORMALFVP/ARMv81MML/Include/system_ARMv81MML.h @@ -0,0 +1,55 @@ +/**************************************************************************//** + * @file system_ARMv81MML.h + * @brief CMSIS Device System Header File for + * Armv8.1-M Mainline Device Series + * @version V1.0.0 + * @date 25. February 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef SYSTEM_ARMv81MML_H +#define SYSTEM_ARMv81MML_H + +#ifdef __cplusplus +extern "C" { +#endif + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + + +/** + \brief Setup the microcontroller system. + + Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + + +/** + \brief Update SystemCoreClock variable. + + Updates the SystemCoreClock with current core Clock retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_ARMv81MML_H */ diff --git a/Platforms/NORMALFVP/ARMv81MML/LinkScripts/AC6/lnk.sct b/Platforms/NORMALFVP/ARMv81MML/LinkScripts/AC6/lnk.sct new file mode 100755 index 00000000..d85f4c66 --- /dev/null +++ b/Platforms/NORMALFVP/ARMv81MML/LinkScripts/AC6/lnk.sct @@ -0,0 +1,30 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +#include "mem_ARMv81MML.h" + +LOAD_REGION 0x0 +{ + CODE +0 0x100000 + { + *.o (RESET, +First) + * (InRoot$$$Sections) + * (+RO-CODE) + } + + DATA 0x30000000 NOCOMPRESS 0xF0000 + { + * (+RO-DATA) + * (+RW,+ZI) + } + + ARM_LIB_STACK 0x30100000 ALIGN 64 EMPTY -0x00002000 + {} + ARM_LIB_HEAP 0x30100000 ALIGN 64 EMPTY 0x00100000 + {} + +} diff --git a/Platforms/NORMALFVP/ARMv81MML/LinkScripts/AC6/mem_ARMv81MML.h b/Platforms/NORMALFVP/ARMv81MML/LinkScripts/AC6/mem_ARMv81MML.h new file mode 100755 index 00000000..74cb2123 --- /dev/null +++ b/Platforms/NORMALFVP/ARMv81MML/LinkScripts/AC6/mem_ARMv81MML.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMV81MML_H +#define __MEM_ARMV81MML_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMV81MML_H */ diff --git a/Platforms/NORMALFVP/ARMv81MML/Startup/AC6/startup_ARMv81MML.c b/Platforms/NORMALFVP/ARMv81MML/Startup/AC6/startup_ARMv81MML.c new file mode 100755 index 00000000..eccf7258 --- /dev/null +++ b/Platforms/NORMALFVP/ARMv81MML/Startup/AC6/startup_ARMv81MML.c @@ -0,0 +1,150 @@ +/****************************************************************************** + * @file startup_ARMv81MML.c + * @brief CMSIS Core Device Startup File for ARMv81MML Device + * @version V2.0.1 + * @date 23. July 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined (ARMv81MML_DSP_DP_MVE_FP) + #include "ARMv81MML_DSP_DP_MVE_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; +extern uint32_t __STACK_LIMIT; + +extern void __PROGRAM_START(void) __NO_RETURN; + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +void Default_Handler(void) __NO_RETURN; +void Reset_Handler (void) __NO_RETURN; + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[496]; + const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + SecureFault_Handler, /* -9 Secure Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 480 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +void Reset_Handler(void) +{ + __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); + + SystemInit(); /* CMSIS System Initialization */ + + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} diff --git a/Platforms/NORMALFVP/ARMv81MML/system_ARMv81MML.c b/Platforms/NORMALFVP/ARMv81MML/system_ARMv81MML.c new file mode 100755 index 00000000..f6d447be --- /dev/null +++ b/Platforms/NORMALFVP/ARMv81MML/system_ARMv81MML.c @@ -0,0 +1,115 @@ +/**************************************************************************//** + * @file system_ARMv81MML.c + * @brief CMSIS Device System Source File for + * Armv8.1-M Mainline Device Series + * @version V1.2.0 + * @date 23. July 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include + + + +#if defined (ARMv81MML_DSP_DP_MVE_FP) + #include "ARMv81MML_DSP_DP_MVE_FP.h" +#else + #error device not specified! +#endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #include "partition_ARMv81MML.h" +#endif + + + +#include "cmsis_compiler.h" + + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL ( 5000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (5U * XTAL) + +#define DEBUG_DEMCR (*((unsigned int *)0xE000EDFC)) +#define DEBUG_TRCENA (1<<24) //Global debug enable bit + +#define CCR (*((volatile unsigned int *)0xE000ED14)) +#define CCR_DL (1 << 19) + +/*---------------------------------------------------------------------------- + Externals + *----------------------------------------------------------------------------*/ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + extern uint32_t __VECTOR_TABLE; +#endif + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; + + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t)(&__VECTOR_TABLE); +#endif + +#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ + (defined (__MVE_USED) && (__MVE_USED == 1U)) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + + unsigned int fpscr =__get_FPSCR(); + fpscr = fpscr & (~FPU_FPDSCR_AHP_Msk); + __set_FPSCR(fpscr); + + + // enable DL branch cache + CCR |= CCR_DL; + __ISB(); + + +} + diff --git a/Platforms/NORMALFVP/platform.cmake b/Platforms/NORMALFVP/platform.cmake new file mode 100755 index 00000000..8a097de3 --- /dev/null +++ b/Platforms/NORMALFVP/platform.cmake @@ -0,0 +1,2 @@ +function(configure_platform PROJECTNAME ROOT CORE PLATFORMFOLDER) +endfunction() \ No newline at end of file diff --git a/configPlatform.cmake b/configPlatform.cmake index a2304841..600f14f3 100644 --- a/configPlatform.cmake +++ b/configPlatform.cmake @@ -7,6 +7,13 @@ SET(PLATFORMOPT "-DFVP") list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/FVP) endif() +if (PLATFORM STREQUAL "NORMALFVP") +SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/NORMALFVP) +SET(PLATFORMID "NORMALFVP") +SET(PLATFORMOPT "-DNORMALFVP") +list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/NORMALFVP) +endif() + if (PLATFORM STREQUAL "MPS3") SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/MPS3) SET(PLATFORMID "MPS3")