diff --git a/Include/arm_const_structs_f16.h b/Include/arm_const_structs_f16.h index ec507036..0e58a722 100755 --- a/Include/arm_const_structs_f16.h +++ b/Include/arm_const_structs_f16.h @@ -39,15 +39,33 @@ extern "C" #endif #if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED) + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len16; + #endif + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len32; + #endif + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len64; + #endif + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len128; + #endif + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len256; + #endif + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len512; + #endif + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len1024; + #endif + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len2048; + #endif + #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len4096; + #endif #endif #ifdef __cplusplus diff --git a/Include/arm_helium_utils.h b/Include/arm_helium_utils.h index 4bae01c2..d427918b 100755 --- a/Include/arm_helium_utils.h +++ b/Include/arm_helium_utils.h @@ -102,7 +102,6 @@ Definitions available for MVEI only ***************************************/ #if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI) - #include "arm_common_tables.h" /* Following functions are used to transpose matrix in f32 and q31 cases */ @@ -250,11 +249,11 @@ __STATIC_INLINE q31x4_t FAST_VSQRT_Q31(q31x4_t vecIn) vecIdx = vecNrm >> 24; vecIdx = vecIdx << 1; - vecTmp0 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, vecIdx); + vecTmp0 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, (uint32x4_t)vecIdx); vecIdx = vecIdx + 1; - vecTmp1 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, vecIdx); + vecTmp1 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, (uint32x4_t)vecIdx); vecTmp1 = vqrdmulhq(vecTmp1, vecNrm); vecTmp0 = vecTmp0 - vecTmp1; @@ -315,11 +314,11 @@ __STATIC_INLINE q15x8_t FAST_VSQRT_Q15(q15x8_t vecIn) vecIdx = vecNrm >> 8; vecIdx = vecIdx << 1; - vecTmp0 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, vecIdx); + vecTmp0 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, (uint16x8_t)vecIdx); vecIdx = vecIdx + 1; - vecTmp1 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, vecIdx); + vecTmp1 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, (uint16x8_t)vecIdx); vecTmp1 = vqrdmulhq(vecTmp1, vecNrm); vecTmp0 = vecTmp0 - vecTmp1; @@ -369,4 +368,4 @@ __STATIC_INLINE q15x8_t FAST_VSQRT_Q15(q15x8_t vecIn) } #endif -#endif \ No newline at end of file +#endif diff --git a/Include/arm_math.h b/Include/arm_math.h index 142621d3..1fdad98d 100644 --- a/Include/arm_math.h +++ b/Include/arm_math.h @@ -416,7 +416,10 @@ extern "C" #define ARM_MATH_MVEF #endif #if !defined(ARM_MATH_MVE_FLOAT16) - #define ARM_MATH_MVE_FLOAT16 + /* HW Float16 not yet well supported on gcc for M55 */ + #if !defined(__CMSIS_GCC_H) + #define ARM_MATH_MVE_FLOAT16 + #endif #endif #endif @@ -433,7 +436,10 @@ extern "C" #endif #if !defined(ARM_MATH_MVE_FLOAT16) - #define ARM_MATH_MVE_FLOAT16 + /* HW Float16 not yet well supported on gcc for M55 */ + #if !defined(__CMSIS_GCC_H) + #define ARM_MATH_MVE_FLOAT16 + #endif #endif #endif diff --git a/Include/arm_math_f16.h b/Include/arm_math_f16.h index 76f1fab0..e537a7d0 100755 --- a/Include/arm_math_f16.h +++ b/Include/arm_math_f16.h @@ -54,7 +54,10 @@ won't be built. #define ARM_FLOAT16_SUPPORTED #endif #else - #define ARM_FLOAT16_SUPPORTED + /* HW Float16 not yet well supported on gcc for M55 */ + #if !defined(__CMSIS_GCC_H) + #define ARM_FLOAT16_SUPPORTED + #endif #endif #if defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF) /* floating point vector*/ diff --git a/Platforms/FVP/ARMv81MML/LinkScripts/GCC/lnk.ld b/Platforms/FVP/ARMv81MML/LinkScripts/GCC/lnk.ld new file mode 100755 index 00000000..73055d64 --- /dev/null +++ b/Platforms/FVP/ARMv81MML/LinkScripts/GCC/lnk.ld @@ -0,0 +1,296 @@ +/****************************************************************************** + * @file gcc_arm.ld + * @brief GNU Linker Script for Cortex-M based device + * @version V2.0.0 + * @date 21. May 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "mem_ARMv81MML.h" +/* + *-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- + */ + +/*---------------------- Flash Configuration ---------------------------------- + Flash Configuration + Flash Base Address <0x0-0xFFFFFFFF:8> + Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__ROM_BASE = 0x00000000; +__ROM_SIZE = 0x00400000; + +/*--------------------- Embedded RAM Configuration ---------------------------- + RAM Configuration + RAM Base Address <0x0-0xFFFFFFFF:8> + RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__RAM_BASE = 0x20000000; +__RAM_SIZE = 0x00300000; + +/*--------------------- Stack / Heap Configuration ---------------------------- + Stack / Heap Configuration + Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + + -----------------------------------------------------------------------------*/ +__STACK_SIZE = STACK_SIZE; +__HEAP_SIZE = HEAP_SIZE; + +/* + *-------------------- <<< end of configuration section >>> ------------------- + */ + +MEMORY +{ + FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE + RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + /* + * SG veneers: + * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address + * must be set, either with the command line option ‘--section-start’ or in a linker script, + * to indicate where to place these veneers in memory. + */ +/* + .gnu.sgstubs : + { + . = ALIGN(32); + } > FLASH +*/ + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + /* Add each additional data section here */ +/* + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) +*/ + __copy_table_end__ = .; + } > FLASH + + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + /* Add each additional bss section here */ +/* + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) +*/ + __zero_table_end__ = .; + } > FLASH + + /** + * Location counter can end up 2byte aligned with narrow Thumb code but + * __etext is assumed by startup code to be the LMA of a section in RAM + * which must be 4byte aligned + */ + __etext = ALIGN (4); + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data) + *(.data.*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + /* + * Secondary data section, optional + * + * Remember to add each additional data section + * to the .copy.table above to asure proper + * initialization during startup. + */ +/* + __etext2 = ALIGN (4); + + .data2 : AT (__etext2) + { + . = ALIGN(4); + __data2_start__ = .; + *(.data2) + *(.data2.*) + . = ALIGN(4); + __data2_end__ = .; + + } > RAM2 +*/ + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM AT > RAM + + /* + * Secondary bss section, optional + * + * Remember to add each additional bss section + * to the .zero.table above to asure proper + * initialization during startup. + */ +/* + .bss2 : + { + . = ALIGN(4); + __bss2_start__ = .; + *(.bss2) + *(.bss2.*) + . = ALIGN(4); + __bss2_end__ = .; + } > RAM2 AT > RAM2 +*/ + + .heap (COPY) : + { + . = ALIGN(8); + __end__ = .; + __HeapBase = .; + PROVIDE(end = .); + . = . + __HEAP_SIZE; + . = ALIGN(8); + __HeapLimit = .; + } > RAM + + .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) : + { + . = ALIGN(8); + __StackLimit = .; + . = . + __STACK_SIZE; + . = ALIGN(8); + __StackTop = .; + } > RAM + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/Platforms/FVP/ARMv81MML/LinkScripts/GCC/mem_ARMv81MML.h b/Platforms/FVP/ARMv81MML/LinkScripts/GCC/mem_ARMv81MML.h new file mode 100755 index 00000000..84a1ff1d --- /dev/null +++ b/Platforms/FVP/ARMv81MML/LinkScripts/GCC/mem_ARMv81MML.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM7_H +#define __MEM_ARMCM7_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/FVP/ARMv81MML/Startup/GCC/startup_ARMv81MML.c b/Platforms/FVP/ARMv81MML/Startup/GCC/startup_ARMv81MML.c new file mode 100755 index 00000000..0689aa02 --- /dev/null +++ b/Platforms/FVP/ARMv81MML/Startup/GCC/startup_ARMv81MML.c @@ -0,0 +1,155 @@ +/****************************************************************************** + * @file startup_ARMCM7.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#if defined (ARMv81MML_DSP_DP_MVE_FP) + #include "ARMv81MML_DSP_DP_MVE_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; +extern uint32_t __STACK_LIMIT; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[240]; + const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 223 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + + + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); + + SystemInit(); /* CMSIS System Initialization */ + + __PROGRAM_START(); +} + + + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + + diff --git a/Platforms/FVP/ARMv81MML/Startup/GCC/support.c b/Platforms/FVP/ARMv81MML/Startup/GCC/support.c new file mode 100755 index 00000000..740f6b08 --- /dev/null +++ b/Platforms/FVP/ARMv81MML/Startup/GCC/support.c @@ -0,0 +1,36 @@ + +#ifdef __cplusplus +extern "C" +{ +#endif + +char * _sbrk(int incr); + +void __malloc_lock() ; +void __malloc_unlock(); + +char __HeapBase, __HeapLimit; // make sure to define these symbols in linker command file +#ifdef __cplusplus +} +#endif + +static int totalBytesProvidedBySBRK = 0; + +//! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file). +char * sbrk(int incr) { + static char *currentHeapEnd = &__HeapBase; + char *previousHeapEnd = currentHeapEnd; + if (currentHeapEnd + incr > &__HeapLimit) { + return (char *)-1; // the malloc-family routine that called sbrk will return 0 + } + currentHeapEnd += incr; + + totalBytesProvidedBySBRK += incr; + + return (char *) previousHeapEnd; +} +//! Synonym for sbrk. +char * _sbrk(int incr) { return sbrk(incr); }; + +void __malloc_lock() { }; +void __malloc_unlock() { }; \ No newline at end of file diff --git a/Platforms/FVP/ARMv81MML/system_ARMv81MML.c b/Platforms/FVP/ARMv81MML/system_ARMv81MML.c index 1d6a716f..90880ada 100644 --- a/Platforms/FVP/ARMv81MML/system_ARMv81MML.c +++ b/Platforms/FVP/ARMv81MML/system_ARMv81MML.c @@ -88,13 +88,13 @@ void SystemInit (void) #endif #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); + //TZ_SAU_Setup(); #endif SystemCoreClock = SYSTEM_CLOCK; //Disable debug - DEBUG_DEMCR &=~ DEBUG_TRCENA; + //DEBUG_DEMCR &=~ DEBUG_TRCENA; // enable DL branch cache CCR |= CCR_DL; diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/AC6/lnk.sct b/Platforms/IPSS/ARMCM0/LinkScripts/AC6/lnk.sct index 5821a622..fcdf3e4d 100755 --- a/Platforms/IPSS/ARMCM0/LinkScripts/AC6/lnk.sct +++ b/Platforms/IPSS/ARMCM0/LinkScripts/AC6/lnk.sct @@ -13,11 +13,12 @@ LOAD_REGION 0x0 { *.o (RESET, +First) * (InRoot$$$Sections) - * (+RO) + * (+RO-CODE) } DATA 0x20000000 0x60000 { + * (+RO-DATA) * (+RW,+ZI) } diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/GCC/lnk.ld b/Platforms/IPSS/ARMCM0/LinkScripts/GCC/lnk.ld index d2485ad7..161e4918 100755 --- a/Platforms/IPSS/ARMCM0/LinkScripts/GCC/lnk.ld +++ b/Platforms/IPSS/ARMCM0/LinkScripts/GCC/lnk.ld @@ -22,77 +22,16 @@ * limitations under the License. */ #include "mem_ARMCM0.h" -/* - *-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- - */ - -/*---------------------- Flash Configuration ---------------------------------- - Flash Configuration - Flash Base Address <0x0-0xFFFFFFFF:8> - Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> - - -----------------------------------------------------------------------------*/ -__ROM_BASE = 0x00000000; -__ROM_SIZE = 0x00400000; - -/*--------------------- Embedded RAM Configuration ---------------------------- - RAM Configuration - RAM Base Address <0x0-0xFFFFFFFF:8> - RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> - - -----------------------------------------------------------------------------*/ -__RAM_BASE = 0x20000000; -__RAM_SIZE = 0x00300000; - -/*--------------------- Stack / Heap Configuration ---------------------------- - Stack / Heap Configuration - Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> - Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> - - -----------------------------------------------------------------------------*/ -__STACK_SIZE = STACK_SIZE; -__HEAP_SIZE = HEAP_SIZE; -/* - *-------------------- <<< end of configuration section >>> ------------------- - */ +__STACK_SIZE = 0x2000; +__HEAP_SIZE = 0x50000; MEMORY { - FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE - RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE + ITCM (rx) : ORIGIN = 0x00000000, LENGTH = 512K + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + DTCM2 (xrw) : ORIGIN = 0x20020000, LENGTH = 384K } - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __copy_table_start__ - * __copy_table_end__ - * __zero_table_start__ - * __zero_table_end__ - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - */ ENTRY(Reset_Handler) SECTIONS @@ -122,12 +61,12 @@ SECTIONS *(.rodata*) KEEP(*(.eh_frame*)) - } > FLASH + } > ITCM /* * SG veneers: * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address - * must be set, either with the command line option ‘--section-start’ or in a linker script, + * must be set, either with the command line option ‘--section-start’ or in a linker script, * to indicate where to place these veneers in memory. */ /* @@ -139,13 +78,13 @@ SECTIONS .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH + } > ITCM __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH + } > ITCM __exidx_end = .; .copy.table : @@ -162,7 +101,7 @@ SECTIONS LONG (__data2_end__ - __data2_start__) */ __copy_table_end__ = .; - } > FLASH + } > ITCM .zero.table : { @@ -174,16 +113,15 @@ SECTIONS LONG (__bss2_end__ - __bss2_start__) */ __zero_table_end__ = .; - } > FLASH + } > DTCM /** * Location counter can end up 2byte aligned with narrow Thumb code but * __etext is assumed by startup code to be the LMA of a section in RAM * which must be 4byte aligned */ - __etext = ALIGN (4); - - .data : AT (__etext) + + .data : { __data_start__ = .; *(vtable) @@ -216,7 +154,9 @@ SECTIONS /* All data end */ __data_end__ = .; - } > RAM + } > ITCM AT > DTCM + + __etext = ADDR(.data); /* * Secondary data section, optional @@ -249,7 +189,7 @@ SECTIONS *(COMMON) . = ALIGN(4); __bss_end__ = .; - } > RAM AT > RAM + } > DTCM2 /* * Secondary bss section, optional @@ -274,23 +214,25 @@ SECTIONS { . = ALIGN(8); __end__ = .; - __HeapBase = .; PROVIDE(end = .); . = . + __HEAP_SIZE; . = ALIGN(8); __HeapLimit = .; - } > RAM + } > DTCM2 - .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) : + .stack (ORIGIN(DTCM2) + LENGTH(DTCM2) - __STACK_SIZE) (COPY) : { . = ALIGN(8); __StackLimit = .; . = . + __STACK_SIZE; . = ALIGN(8); __StackTop = .; - } > RAM + } > DTCM2 PROVIDE(__stack = __StackTop); - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + /* Check if data + heap + stack exceeds DTCM2 limit */ + ASSERT(__StackLimit >= __HeapLimit, "region DTCM2 overflowed with stack") } + + + diff --git a/Platforms/IPSS/ARMCM0/LinkScripts/GCC/mem_ARMCM0.h b/Platforms/IPSS/ARMCM0/LinkScripts/GCC/mem_ARMCM0.h index b25b6182..84a1ff1d 100755 --- a/Platforms/IPSS/ARMCM0/LinkScripts/GCC/mem_ARMCM0.h +++ b/Platforms/IPSS/ARMCM0/LinkScripts/GCC/mem_ARMCM0.h @@ -1,5 +1,5 @@ /**************************************************************************//** - * @file mem_ARMCM0.h + * @file mem_ARMCM7.h * @brief Memory base and size definitions (used in scatter file) * @version V1.1.0 * @date 15. May 2019 @@ -25,8 +25,8 @@ * limitations under the License. */ -#ifndef __MEM_ARMCM0_H -#define __MEM_ARMCM0_H +#ifndef __MEM_ARMCM7_H +#define __MEM_ARMCM7_H diff --git a/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.S b/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.S deleted file mode 100755 index 7bbd2dd6..00000000 --- a/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.S +++ /dev/null @@ -1,179 +0,0 @@ -/**************************************************************************//** - * @file startup_ARMCM0.S - * @brief CMSIS-Core(M) Device Startup File for Cortex-M0 Device - * @version V2.0.1 - * @date 23. July 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - .syntax unified - .arch armv6-m - - .section .vectors - .align 2 - .globl __Vectors - .globl __Vectors_End - .globl __Vectors_Size -__Vectors: - .long __StackTop /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - .long NMI_Handler /* -14 NMI Handler */ - .long HardFault_Handler /* -13 Hard Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long SVC_Handler /* -5 SVCall Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long PendSV_Handler /* -2 PendSV Handler */ - .long SysTick_Handler /* -1 SysTick Handler */ - - /* Interrupts */ - .long Interrupt0_Handler /* 0 Interrupt 0 */ - .long Interrupt1_Handler /* 1 Interrupt 1 */ - .long Interrupt2_Handler /* 2 Interrupt 2 */ - .long Interrupt3_Handler /* 3 Interrupt 3 */ - .long Interrupt4_Handler /* 4 Interrupt 4 */ - .long Interrupt5_Handler /* 5 Interrupt 5 */ - .long Interrupt6_Handler /* 6 Interrupt 6 */ - .long Interrupt7_Handler /* 7 Interrupt 7 */ - .long Interrupt8_Handler /* 8 Interrupt 8 */ - .long Interrupt9_Handler /* 9 Interrupt 9 */ - - .space ( 22 * 4) /* Interrupts 10 .. 31 are left out */ -__Vectors_End: - .equ __Vectors_Size, __Vectors_End - __Vectors - .size __Vectors, . - __Vectors - - - .thumb - .section .text - .align 2 - - .thumb_func - .type Reset_Handler, %function - .globl Reset_Handler - .fnstart -Reset_Handler: - bl SystemInit - - ldr r4, =__copy_table_start__ - ldr r5, =__copy_table_end__ - -.L_loop0: - cmp r4, r5 - bge .L_loop0_done - ldr r1, [r4] - ldr r2, [r4, #4] - ldr r3, [r4, #8] - -.L_loop0_0: - subs r3, #4 - blt .L_loop0_0_done - ldr r0, [r1, r3] - str r0, [r2, r3] - b .L_loop0_0 - -.L_loop0_0_done: - adds r4, #12 - b .L_loop0 - -.L_loop0_done: - - ldr r3, =__zero_table_start__ - ldr r4, =__zero_table_end__ - -.L_loop2: - cmp r3, r4 - bge .L_loop2_done - ldr r1, [r3] - ldr r2, [r3, #4] - movs r0, 0 - -.L_loop2_0: - subs r2, #4 - blt .L_loop2_0_done - str r0, [r1, r2] - b .L_loop2_0 -.L_loop2_0_done: - - adds r3, #8 - b .L_loop2 -.L_loop2_done: - - bl _start - - .fnend - .size Reset_Handler, . - Reset_Handler - -/* The default macro is not used for HardFault_Handler - * because this results in a poor debug illusion. - */ - .thumb_func - .type HardFault_Handler, %function - .weak HardFault_Handler - .fnstart -HardFault_Handler: - b . - .fnend - .size HardFault_Handler, . - HardFault_Handler - - .thumb_func - .type Default_Handler, %function - .weak Default_Handler - .fnstart -Default_Handler: - b . - .fnend - .size Default_Handler, . - Default_Handler - -/* Macro to define default exception/interrupt handlers. - * Default handler are weak symbols with an endless loop. - * They can be overwritten by real handlers. - */ - .macro Set_Default_Handler Handler_Name - .weak \Handler_Name - .set \Handler_Name, Default_Handler - .endm - - -/* Default exception/interrupt handler */ - - Set_Default_Handler NMI_Handler - Set_Default_Handler SVC_Handler - Set_Default_Handler PendSV_Handler - Set_Default_Handler SysTick_Handler - - Set_Default_Handler Interrupt0_Handler - Set_Default_Handler Interrupt1_Handler - Set_Default_Handler Interrupt2_Handler - Set_Default_Handler Interrupt3_Handler - Set_Default_Handler Interrupt4_Handler - Set_Default_Handler Interrupt5_Handler - Set_Default_Handler Interrupt6_Handler - Set_Default_Handler Interrupt7_Handler - Set_Default_Handler Interrupt8_Handler - Set_Default_Handler Interrupt9_Handler - - - .end diff --git a/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.c b/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.c new file mode 100755 index 00000000..959ea21f --- /dev/null +++ b/Platforms/IPSS/ARMCM0/Startup/GCC/startup_ARMCM0.c @@ -0,0 +1,161 @@ +/****************************************************************************** + * @file startup_ARMCM7.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#if defined (ARMCM0) + #include "ARMCM0.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[240]; + const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 223 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#define SERIAL_BASE_ADDRESS (0xA8000000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + + + + + + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + + + __PROGRAM_START(); +} + + + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + + diff --git a/Platforms/IPSS/ARMCM0/system_ARMCM0.c b/Platforms/IPSS/ARMCM0/system_ARMCM0.c index 5f1e43a2..820e7296 100755 --- a/Platforms/IPSS/ARMCM0/system_ARMCM0.c +++ b/Platforms/IPSS/ARMCM0/system_ARMCM0.c @@ -28,7 +28,16 @@ #include #include #include + +#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) #include +#else +#define GCCCOMPILER +struct __FILE {int handle;}; +FILE __stdout; +FILE __stdin; +FILE __stderr; +#endif #include "ARMCM0.h" @@ -118,6 +127,7 @@ int fputc (int c, FILE * stream) return (-1); } +#ifndef GCCCOMPILER /* IO device file handles. */ #define FH_STDIN 0x8001 #define FH_STDOUT 0x8002 @@ -463,6 +473,23 @@ long _sys_flen (FILEHANDLE fh) { #endif } #endif + +#else /* gcc compiler */ +int _write(int file, + char *ptr, + int len) +{ + int i; + (void)file; + + for(i=0; i < len;i++) + { + stdout_putchar(*ptr++); + } + return len; +} + +#endif #define log_str(...) \ do { \ @@ -473,7 +500,17 @@ long _sys_flen (FILEHANDLE fh) { } while(--hwSize); \ } while(0) - +#ifdef GCCCOMPILER +void _exit(int return_code) +{ + (void)return_code; + log_str("\n"); + log_str("_[TEST COMPLETE]_________________________________________________\n"); + log_str("\n\n"); + stdout_putchar(4); + while(1); +} +#else void _sys_exit(int n) { (void)n; @@ -483,6 +520,7 @@ void _sys_exit(int n) stdout_putchar(4); while(1); } +#endif extern void ttywrch (int ch); __attribute__((weak)) diff --git a/Platforms/IPSS/ARMCM33/LinkScripts/AC6/lnk.sct b/Platforms/IPSS/ARMCM33/LinkScripts/AC6/lnk.sct index 584b4952..23dcebf2 100755 --- a/Platforms/IPSS/ARMCM33/LinkScripts/AC6/lnk.sct +++ b/Platforms/IPSS/ARMCM33/LinkScripts/AC6/lnk.sct @@ -16,12 +16,13 @@ LOAD_REGION 0x0 { *.o (RESET, +First) * (InRoot$$$Sections) - * (+RO) + * (+RO-CODE) } DATA 0x20000000 NOCOMPRESS 0x60000 { + * (+RO-DATA) * (+RW,+ZI) } diff --git a/Platforms/IPSS/ARMCM33/LinkScripts/GCC/lnk.ld b/Platforms/IPSS/ARMCM33/LinkScripts/GCC/lnk.ld new file mode 100755 index 00000000..92a17562 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/LinkScripts/GCC/lnk.ld @@ -0,0 +1,239 @@ +/****************************************************************************** + * @file gcc_arm.ld + * @brief GNU Linker Script for Cortex-M based device + * @version V2.0.0 + * @date 21. May 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "mem_ARMCM33.h" + +__STACK_SIZE = 0x2000; +__HEAP_SIZE = 0x50000; + +MEMORY +{ + ITCM (rx) : ORIGIN = 0x00000000, LENGTH = 512K + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + DTCM2 (xrw) : ORIGIN = 0x20020000, LENGTH = 384K +} + +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > ITCM + + /* + * SG veneers: + * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address + * must be set, either with the command line option ‘--section-start’ or in a linker script, + * to indicate where to place these veneers in memory. + */ +/* + .gnu.sgstubs : + { + . = ALIGN(32); + } > FLASH +*/ + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > ITCM + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > ITCM + __exidx_end = .; + + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + /* Add each additional data section here */ +/* + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) +*/ + __copy_table_end__ = .; + } > ITCM + + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + /* Add each additional bss section here */ +/* + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) +*/ + __zero_table_end__ = .; + } > DTCM + + /** + * Location counter can end up 2byte aligned with narrow Thumb code but + * __etext is assumed by startup code to be the LMA of a section in RAM + * which must be 4byte aligned + */ + + .data : + { + __data_start__ = .; + *(vtable) + *(.data) + *(.data.*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > ITCM AT > DTCM + + __etext = ADDR(.data); + + /* + * Secondary data section, optional + * + * Remember to add each additional data section + * to the .copy.table above to asure proper + * initialization during startup. + */ +/* + __etext2 = ALIGN (4); + + .data2 : AT (__etext2) + { + . = ALIGN(4); + __data2_start__ = .; + *(.data2) + *(.data2.*) + . = ALIGN(4); + __data2_end__ = .; + + } > RAM2 +*/ + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > DTCM2 + + /* + * Secondary bss section, optional + * + * Remember to add each additional bss section + * to the .zero.table above to asure proper + * initialization during startup. + */ +/* + .bss2 : + { + . = ALIGN(4); + __bss2_start__ = .; + *(.bss2) + *(.bss2.*) + . = ALIGN(4); + __bss2_end__ = .; + } > RAM2 AT > RAM2 +*/ + + .heap (COPY) : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + . = . + __HEAP_SIZE; + . = ALIGN(8); + __HeapLimit = .; + } > DTCM2 + + .stack (ORIGIN(DTCM2) + LENGTH(DTCM2) - __STACK_SIZE) (COPY) : + { + . = ALIGN(8); + __StackLimit = .; + . = . + __STACK_SIZE; + . = ALIGN(8); + __StackTop = .; + } > DTCM2 + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds DTCM2 limit */ + ASSERT(__StackLimit >= __HeapLimit, "region DTCM2 overflowed with stack") +} + + + diff --git a/Platforms/IPSS/ARMCM33/LinkScripts/GCC/mem_ARMCM33.h b/Platforms/IPSS/ARMCM33/LinkScripts/GCC/mem_ARMCM33.h new file mode 100755 index 00000000..84a1ff1d --- /dev/null +++ b/Platforms/IPSS/ARMCM33/LinkScripts/GCC/mem_ARMCM33.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM7_H +#define __MEM_ARMCM7_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/IPSS/ARMCM33/Startup/GCC/startup_ARMCM33.c b/Platforms/IPSS/ARMCM33/Startup/GCC/startup_ARMCM33.c new file mode 100755 index 00000000..7bfb2221 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/Startup/GCC/startup_ARMCM33.c @@ -0,0 +1,176 @@ +/****************************************************************************** + * @file startup_ARMCM7.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +#if defined (ARMCM33) + #include "ARMCM33.h" +#elif defined (ARMCM33_TZ) + #include "ARMCM33_TZ.h" + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #include "partition_ARMCM33.h" + #endif +#elif defined (ARMCM33_DSP_FP) + #include "ARMCM33_DSP_FP.h" +#elif defined (ARMCM33_DSP_FP_TZ) + #include "ARMCM33_DSP_FP_TZ.h" + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #include "partition_ARMCM33.h" + #endif +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[240]; + const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 223 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#define SERIAL_BASE_ADDRESS (0x70000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + + +extern const char* __StackLimit; + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); + + SystemInit(); /* CMSIS System Initialization */ + + + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + + diff --git a/Platforms/IPSS/ARMCM33/Startup/GCC/support.c b/Platforms/IPSS/ARMCM33/Startup/GCC/support.c new file mode 100755 index 00000000..740f6b08 --- /dev/null +++ b/Platforms/IPSS/ARMCM33/Startup/GCC/support.c @@ -0,0 +1,36 @@ + +#ifdef __cplusplus +extern "C" +{ +#endif + +char * _sbrk(int incr); + +void __malloc_lock() ; +void __malloc_unlock(); + +char __HeapBase, __HeapLimit; // make sure to define these symbols in linker command file +#ifdef __cplusplus +} +#endif + +static int totalBytesProvidedBySBRK = 0; + +//! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file). +char * sbrk(int incr) { + static char *currentHeapEnd = &__HeapBase; + char *previousHeapEnd = currentHeapEnd; + if (currentHeapEnd + incr > &__HeapLimit) { + return (char *)-1; // the malloc-family routine that called sbrk will return 0 + } + currentHeapEnd += incr; + + totalBytesProvidedBySBRK += incr; + + return (char *) previousHeapEnd; +} +//! Synonym for sbrk. +char * _sbrk(int incr) { return sbrk(incr); }; + +void __malloc_lock() { }; +void __malloc_unlock() { }; \ No newline at end of file diff --git a/Platforms/IPSS/ARMCM33/system_ARMCM33.c b/Platforms/IPSS/ARMCM33/system_ARMCM33.c index 69bf7af0..f81781b4 100755 --- a/Platforms/IPSS/ARMCM33/system_ARMCM33.c +++ b/Platforms/IPSS/ARMCM33/system_ARMCM33.c @@ -28,7 +28,16 @@ #include #include #include + +#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) #include +#else +#define GCCCOMPILER +struct __FILE {int handle;}; +FILE __stdout; +FILE __stdin; +FILE __stderr; +#endif #if defined (ARMCM33) #include "ARMCM33.h" @@ -276,11 +285,10 @@ void SystemInit (void) { #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE); + SCB->VTOR = (uint32_t) &__VECTOR_TABLE; #endif -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__MVE_USED) && (__MVE_USED == 1U)) +#if defined (__FPU_USED) && (__FPU_USED == 1U) SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ (3U << 11U*2U) ); /* enable CP11 Full Access */ #endif @@ -290,16 +298,10 @@ void SystemInit (void) #endif #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); + TZ_SAU_Setup(); #endif - // SystemCoreClock = SYSTEM_CLOCK; - - //Disable debug - // DEBUG_DEMCR &=~ DEBUG_TRCENA; - - // enable DL branch cache - + SystemCoreClock = SYSTEM_CLOCK; } __attribute__((constructor(255))) @@ -343,6 +345,7 @@ int fputc (int c, FILE * stream) return (-1); } +#ifndef GCCCOMPILER /* IO device file handles. */ #define FH_STDIN 0x8001 #define FH_STDOUT 0x8002 @@ -689,6 +692,23 @@ long _sys_flen (FILEHANDLE fh) { } #endif +#else /* gcc compiler */ +int _write(int file, + char *ptr, + int len) +{ + int i; + (void)file; + + for(i=0; i < len;i++) + { + stdout_putchar(*ptr++); + } + return len; +} + +#endif + #define log_str(...) \ do { \ const char *pchSrc = __VA_ARGS__; \ @@ -699,6 +719,17 @@ long _sys_flen (FILEHANDLE fh) { } while(0) +#ifdef GCCCOMPILER +void _exit(int return_code) +{ + (void)return_code; + log_str("\n"); + log_str("_[TEST COMPLETE]_________________________________________________\n"); + log_str("\n\n"); + *((volatile unsigned *) (SERIAL_BASE_ADDRESS-0x10000)) = 0xa; + while(1); +} +#else void _sys_exit(int n) { (void)n; @@ -708,6 +739,7 @@ void _sys_exit(int n) *((volatile unsigned *) (SERIAL_BASE_ADDRESS-0x10000)) = 0xa; while(1); } +#endif extern void ttywrch (int ch); __attribute__((weak)) diff --git a/Platforms/IPSS/ARMCM4/LinkScripts/AC6/lnk.sct b/Platforms/IPSS/ARMCM4/LinkScripts/AC6/lnk.sct index 480af9ab..7fd27d2e 100755 --- a/Platforms/IPSS/ARMCM4/LinkScripts/AC6/lnk.sct +++ b/Platforms/IPSS/ARMCM4/LinkScripts/AC6/lnk.sct @@ -13,12 +13,13 @@ LOAD_REGION 0x0 { *.o (RESET, +First) * (InRoot$$$Sections) - * (+RO) + * (+RO-CODE) } DATA 0x20000000 0x60000 { - * (+RW,+ZI) + * (+RO-DATA) + * (+RW,+ZI) } ARM_LIB_STACK 0x20062000 ALIGN 64 EMPTY -0x00002000 diff --git a/Platforms/IPSS/ARMCM4/LinkScripts/GCC/lnk.ld b/Platforms/IPSS/ARMCM4/LinkScripts/GCC/lnk.ld new file mode 100755 index 00000000..4e1febd8 --- /dev/null +++ b/Platforms/IPSS/ARMCM4/LinkScripts/GCC/lnk.ld @@ -0,0 +1,239 @@ +/****************************************************************************** + * @file gcc_arm.ld + * @brief GNU Linker Script for Cortex-M based device + * @version V2.0.0 + * @date 21. May 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "mem_ARMCM4.h" + +__STACK_SIZE = 0x2000; +__HEAP_SIZE = 0x50000; + +MEMORY +{ + ITCM (rx) : ORIGIN = 0x00000000, LENGTH = 512K + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + DTCM2 (xrw) : ORIGIN = 0x20020000, LENGTH = 384K +} + +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > ITCM + + /* + * SG veneers: + * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address + * must be set, either with the command line option ‘--section-start’ or in a linker script, + * to indicate where to place these veneers in memory. + */ +/* + .gnu.sgstubs : + { + . = ALIGN(32); + } > FLASH +*/ + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > ITCM + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > ITCM + __exidx_end = .; + + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + /* Add each additional data section here */ +/* + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) +*/ + __copy_table_end__ = .; + } > ITCM + + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + /* Add each additional bss section here */ +/* + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) +*/ + __zero_table_end__ = .; + } > DTCM + + /** + * Location counter can end up 2byte aligned with narrow Thumb code but + * __etext is assumed by startup code to be the LMA of a section in RAM + * which must be 4byte aligned + */ + + .data : + { + __data_start__ = .; + *(vtable) + *(.data) + *(.data.*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > ITCM AT > DTCM + + __etext = ADDR(.data); + + /* + * Secondary data section, optional + * + * Remember to add each additional data section + * to the .copy.table above to asure proper + * initialization during startup. + */ +/* + __etext2 = ALIGN (4); + + .data2 : AT (__etext2) + { + . = ALIGN(4); + __data2_start__ = .; + *(.data2) + *(.data2.*) + . = ALIGN(4); + __data2_end__ = .; + + } > RAM2 +*/ + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > DTCM2 + + /* + * Secondary bss section, optional + * + * Remember to add each additional bss section + * to the .zero.table above to asure proper + * initialization during startup. + */ +/* + .bss2 : + { + . = ALIGN(4); + __bss2_start__ = .; + *(.bss2) + *(.bss2.*) + . = ALIGN(4); + __bss2_end__ = .; + } > RAM2 AT > RAM2 +*/ + + .heap (COPY) : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + . = . + __HEAP_SIZE; + . = ALIGN(8); + __HeapLimit = .; + } > DTCM2 + + .stack (ORIGIN(DTCM2) + LENGTH(DTCM2) - __STACK_SIZE) (COPY) : + { + . = ALIGN(8); + __StackLimit = .; + . = . + __STACK_SIZE; + . = ALIGN(8); + __StackTop = .; + } > DTCM2 + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds DTCM2 limit */ + ASSERT(__StackLimit >= __HeapLimit, "region DTCM2 overflowed with stack") +} + + + diff --git a/Platforms/IPSS/ARMCM4/LinkScripts/GCC/mem_ARMCM4.h b/Platforms/IPSS/ARMCM4/LinkScripts/GCC/mem_ARMCM4.h new file mode 100755 index 00000000..84a1ff1d --- /dev/null +++ b/Platforms/IPSS/ARMCM4/LinkScripts/GCC/mem_ARMCM4.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM7_H +#define __MEM_ARMCM7_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/IPSS/ARMCM4/Startup/GCC/startup_ARMCM4.c b/Platforms/IPSS/ARMCM4/Startup/GCC/startup_ARMCM4.c new file mode 100755 index 00000000..1747767b --- /dev/null +++ b/Platforms/IPSS/ARMCM4/Startup/GCC/startup_ARMCM4.c @@ -0,0 +1,163 @@ +/****************************************************************************** + * @file startup_ARMCM7.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#if defined (ARMCM4) + #include "ARMCM4.h" +#elif defined (ARMCM4_FP) + #include "ARMCM4_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[240]; + const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 223 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#define SERIAL_BASE_ADDRESS (0x40000000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + + + + + + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + + + __PROGRAM_START(); +} + + + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + + diff --git a/Platforms/IPSS/ARMCM4/Startup/GCC/support.c b/Platforms/IPSS/ARMCM4/Startup/GCC/support.c new file mode 100755 index 00000000..740f6b08 --- /dev/null +++ b/Platforms/IPSS/ARMCM4/Startup/GCC/support.c @@ -0,0 +1,36 @@ + +#ifdef __cplusplus +extern "C" +{ +#endif + +char * _sbrk(int incr); + +void __malloc_lock() ; +void __malloc_unlock(); + +char __HeapBase, __HeapLimit; // make sure to define these symbols in linker command file +#ifdef __cplusplus +} +#endif + +static int totalBytesProvidedBySBRK = 0; + +//! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file). +char * sbrk(int incr) { + static char *currentHeapEnd = &__HeapBase; + char *previousHeapEnd = currentHeapEnd; + if (currentHeapEnd + incr > &__HeapLimit) { + return (char *)-1; // the malloc-family routine that called sbrk will return 0 + } + currentHeapEnd += incr; + + totalBytesProvidedBySBRK += incr; + + return (char *) previousHeapEnd; +} +//! Synonym for sbrk. +char * _sbrk(int incr) { return sbrk(incr); }; + +void __malloc_lock() { }; +void __malloc_unlock() { }; \ No newline at end of file diff --git a/Platforms/IPSS/ARMCM4/system_ARMCM4.c b/Platforms/IPSS/ARMCM4/system_ARMCM4.c index 2b60ecfd..9c332e3a 100755 --- a/Platforms/IPSS/ARMCM4/system_ARMCM4.c +++ b/Platforms/IPSS/ARMCM4/system_ARMCM4.c @@ -28,7 +28,17 @@ #include #include #include + +#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) #include +#else +#define GCCCOMPILER +struct __FILE {int handle;}; +FILE __stdout; +FILE __stdin; +FILE __stderr; +#endif + #if defined (ARMCM4) #include "ARMCM4.h" @@ -152,6 +162,7 @@ int fputc (int c, FILE * stream) return (-1); } +#ifndef GCCCOMPILER /* IO device file handles. */ #define FH_STDIN 0x8001 #define FH_STDOUT 0x8002 @@ -498,6 +509,23 @@ long _sys_flen (FILEHANDLE fh) { } #endif +#else /* gcc compiler */ +int _write(int file, + char *ptr, + int len) +{ + int i; + (void)file; + + for(i=0; i < len;i++) + { + stdout_putchar(*ptr++); + } + return len; +} + +#endif + #define log_str(...) \ do { \ const char *pchSrc = __VA_ARGS__; \ @@ -508,6 +536,17 @@ long _sys_flen (FILEHANDLE fh) { } while(0) +#ifdef GCCCOMPILER +void _exit(int return_code) +{ + (void)return_code; + log_str("\n"); + log_str("_[TEST COMPLETE]_________________________________________________\n"); + log_str("\n\n"); + stdout_putchar(4); + while(1); +} +#else void _sys_exit(int n) { (void)n; @@ -517,6 +556,7 @@ void _sys_exit(int n) stdout_putchar(4); while(1); } +#endif extern void ttywrch (int ch); __attribute__((weak)) diff --git a/Platforms/IPSS/ARMCM7/LinkScripts/AC6/lnk.sct b/Platforms/IPSS/ARMCM7/LinkScripts/AC6/lnk.sct index 5af7c72a..47c9a4f9 100755 --- a/Platforms/IPSS/ARMCM7/LinkScripts/AC6/lnk.sct +++ b/Platforms/IPSS/ARMCM7/LinkScripts/AC6/lnk.sct @@ -13,11 +13,12 @@ LOAD_REGION 0x0 { *.o (RESET, +First) * (InRoot$$$Sections) - * (+RO) + * (+RO-CODE) } DATA 0x20000000 NOCOMPRESS 0xF0000 { + * (+RO-DATA) * (+RW,+ZI) } diff --git a/Platforms/IPSS/ARMCM7/LinkScripts/GCC/lnk.ld b/Platforms/IPSS/ARMCM7/LinkScripts/GCC/lnk.ld index 5b1c56a5..6592a441 100755 --- a/Platforms/IPSS/ARMCM7/LinkScripts/GCC/lnk.ld +++ b/Platforms/IPSS/ARMCM7/LinkScripts/GCC/lnk.ld @@ -22,77 +22,17 @@ * limitations under the License. */ #include "mem_ARMCM7.h" -/* - *-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- - */ - -/*---------------------- Flash Configuration ---------------------------------- - Flash Configuration - Flash Base Address <0x0-0xFFFFFFFF:8> - Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> - - -----------------------------------------------------------------------------*/ -__ROM_BASE = 0x00000000; -__ROM_SIZE = 0x00400000; - -/*--------------------- Embedded RAM Configuration ---------------------------- - RAM Configuration - RAM Base Address <0x0-0xFFFFFFFF:8> - RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> - - -----------------------------------------------------------------------------*/ -__RAM_BASE = 0x20000000; -__RAM_SIZE = 0x00300000; - -/*--------------------- Stack / Heap Configuration ---------------------------- - Stack / Heap Configuration - Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> - Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> - - -----------------------------------------------------------------------------*/ -__STACK_SIZE = STACK_SIZE; -__HEAP_SIZE = HEAP_SIZE; -/* - *-------------------- <<< end of configuration section >>> ------------------- - */ +__STACK_SIZE = 0x2000; +__HEAP_SIZE = 0x50000; MEMORY { - FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE - RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE + ITCM (rx) : ORIGIN = 0x00000000, LENGTH = 512K + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + DTCM2 (xrw) : ORIGIN = 0x20020000, LENGTH = 384K } -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __copy_table_start__ - * __copy_table_end__ - * __zero_table_start__ - * __zero_table_end__ - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - */ ENTRY(Reset_Handler) SECTIONS @@ -122,12 +62,12 @@ SECTIONS *(.rodata*) KEEP(*(.eh_frame*)) - } > FLASH + } > ITCM /* * SG veneers: * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address - * must be set, either with the command line option ‘--section-start’ or in a linker script, + * must be set, either with the command line option ‘--section-start’ or in a linker script, * to indicate where to place these veneers in memory. */ /* @@ -139,13 +79,13 @@ SECTIONS .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH + } > ITCM __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH + } > ITCM __exidx_end = .; .copy.table : @@ -162,7 +102,7 @@ SECTIONS LONG (__data2_end__ - __data2_start__) */ __copy_table_end__ = .; - } > FLASH + } > ITCM .zero.table : { @@ -174,16 +114,15 @@ SECTIONS LONG (__bss2_end__ - __bss2_start__) */ __zero_table_end__ = .; - } > FLASH + } > DTCM /** * Location counter can end up 2byte aligned with narrow Thumb code but * __etext is assumed by startup code to be the LMA of a section in RAM * which must be 4byte aligned */ - __etext = ALIGN (4); - - .data : AT (__etext) + + .data : { __data_start__ = .; *(vtable) @@ -216,7 +155,9 @@ SECTIONS /* All data end */ __data_end__ = .; - } > RAM + } > ITCM AT > DTCM + + __etext = ADDR(.data); /* * Secondary data section, optional @@ -249,7 +190,7 @@ SECTIONS *(COMMON) . = ALIGN(4); __bss_end__ = .; - } > RAM AT > RAM + } > DTCM2 /* * Secondary bss section, optional @@ -274,23 +215,25 @@ SECTIONS { . = ALIGN(8); __end__ = .; - __HeapBase = .; PROVIDE(end = .); . = . + __HEAP_SIZE; . = ALIGN(8); __HeapLimit = .; - } > RAM + } > DTCM2 - .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) : + .stack (ORIGIN(DTCM2) + LENGTH(DTCM2) - __STACK_SIZE) (COPY) : { . = ALIGN(8); __StackLimit = .; . = . + __STACK_SIZE; . = ALIGN(8); __StackTop = .; - } > RAM + } > DTCM2 PROVIDE(__stack = __StackTop); - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + /* Check if data + heap + stack exceeds DTCM2 limit */ + ASSERT(__StackLimit >= __HeapLimit, "region DTCM2 overflowed with stack") } + + + diff --git a/Platforms/IPSS/ARMCM7/Startup/GCC/startup_ARMCM7.S b/Platforms/IPSS/ARMCM7/Startup/GCC/startup_ARMCM7.S deleted file mode 100755 index 4c03cfcd..00000000 --- a/Platforms/IPSS/ARMCM7/Startup/GCC/startup_ARMCM7.S +++ /dev/null @@ -1,170 +0,0 @@ -/**************************************************************************//** - * @file startup_ARMCM7.S - * @brief CMSIS-Core(M) Device Startup File for Cortex-M7 Device - * @version V2.0.0 - * @date 20. May 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - .syntax unified - .arch armv7e-m - - .section .vectors - .align 2 - .globl __Vectors - .globl __Vectors_End - .globl __Vectors_Size -__Vectors: - .long __StackTop /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - .long NMI_Handler /* -14 NMI Handler */ - .long HardFault_Handler /* -13 Hard Fault Handler */ - .long MemManage_Handler /* -12 MPU Fault Handler */ - .long BusFault_Handler /* -11 Bus Fault Handler */ - .long UsageFault_Handler /* -10 Usage Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long SVC_Handler /* -5 SVCall Handler */ - .long DebugMon_Handler /* -4 Debug Monitor Handler */ - .long 0 /* Reserved */ - .long PendSV_Handler /* -2 PendSV Handler */ - .long SysTick_Handler /* -1 SysTick Handler */ - - /* Interrupts */ - .long Interrupt0_Handler /* 0 Interrupt 0 */ - .long Interrupt1_Handler /* 1 Interrupt 1 */ - .long Interrupt2_Handler /* 2 Interrupt 2 */ - .long Interrupt3_Handler /* 3 Interrupt 3 */ - .long Interrupt4_Handler /* 4 Interrupt 4 */ - .long Interrupt5_Handler /* 5 Interrupt 5 */ - .long Interrupt6_Handler /* 6 Interrupt 6 */ - .long Interrupt7_Handler /* 7 Interrupt 7 */ - .long Interrupt8_Handler /* 8 Interrupt 8 */ - .long Interrupt9_Handler /* 9 Interrupt 9 */ - - .space (214 * 4) /* Interrupts 10 .. 224 are left out */ -__Vectors_End: - .equ __Vectors_Size, __Vectors_End - __Vectors - .size __Vectors, . - __Vectors - - - .thumb - .section .text - .align 2 - - .thumb_func - .type Reset_Handler, %function - .globl Reset_Handler - .fnstart -Reset_Handler: - bl SystemInit - - ldr r4, =__copy_table_start__ - ldr r5, =__copy_table_end__ - -.L_loop0: - cmp r4, r5 - bge .L_loop0_done - ldr r1, [r4] - ldr r2, [r4, #4] - ldr r3, [r4, #8] - -.L_loop0_0: - subs r3, #4 - ittt ge - ldrge r0, [r1, r3] - strge r0, [r2, r3] - bge .L_loop0_0 - - adds r4, #12 - b .L_loop0 -.L_loop0_done: - - ldr r3, =__zero_table_start__ - ldr r4, =__zero_table_end__ - -.L_loop2: - cmp r3, r4 - bge .L_loop2_done - ldr r1, [r3] - ldr r2, [r3, #4] - movs r0, 0 - -.L_loop2_0: - subs r2, #4 - itt ge - strge r0, [r1, r2] - bge .L_loop2_0 - - adds r3, #8 - b .L_loop2 -.L_loop2_done: - - bl _start - - .fnend - .size Reset_Handler, . - Reset_Handler - - - .thumb_func - .type Default_Handler, %function - .weak Default_Handler - .fnstart -Default_Handler: - b . - .fnend - .size Default_Handler, . - Default_Handler - -/* Macro to define default exception/interrupt handlers. - * Default handler are weak symbols with an endless loop. - * They can be overwritten by real handlers. - */ - .macro Set_Default_Handler Handler_Name - .weak \Handler_Name - .set \Handler_Name, Default_Handler - .endm - - -/* Default exception/interrupt handler */ - - Set_Default_Handler NMI_Handler - Set_Default_Handler HardFault_Handler - Set_Default_Handler MemManage_Handler - Set_Default_Handler BusFault_Handler - Set_Default_Handler UsageFault_Handler - Set_Default_Handler SVC_Handler - Set_Default_Handler DebugMon_Handler - Set_Default_Handler PendSV_Handler - Set_Default_Handler SysTick_Handler - - Set_Default_Handler Interrupt0_Handler - Set_Default_Handler Interrupt1_Handler - Set_Default_Handler Interrupt2_Handler - Set_Default_Handler Interrupt3_Handler - Set_Default_Handler Interrupt4_Handler - Set_Default_Handler Interrupt5_Handler - Set_Default_Handler Interrupt6_Handler - Set_Default_Handler Interrupt7_Handler - Set_Default_Handler Interrupt8_Handler - Set_Default_Handler Interrupt9_Handler - - - .end diff --git a/Platforms/IPSS/ARMCM7/Startup/GCC/startup_ARMCM7.c b/Platforms/IPSS/ARMCM7/Startup/GCC/startup_ARMCM7.c new file mode 100755 index 00000000..8b99812c --- /dev/null +++ b/Platforms/IPSS/ARMCM7/Startup/GCC/startup_ARMCM7.c @@ -0,0 +1,165 @@ +/****************************************************************************** + * @file startup_ARMCM7.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#if defined (ARMCM7) + #include "ARMCM7.h" +#elif defined (ARMCM7_SP) + #include "ARMCM7_SP.h" +#elif defined (ARMCM7_DP) + #include "ARMCM7_DP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[240]; + const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 223 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#define SERIAL_BASE_ADDRESS (0xA8000000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + + + + + + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + + + __PROGRAM_START(); +} + + + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + + diff --git a/Platforms/IPSS/ARMCM7/system_ARMCM7.c b/Platforms/IPSS/ARMCM7/system_ARMCM7.c index a20e6b7e..fffa8de1 100755 --- a/Platforms/IPSS/ARMCM7/system_ARMCM7.c +++ b/Platforms/IPSS/ARMCM7/system_ARMCM7.c @@ -22,12 +22,23 @@ * See the License for the specific language governing permissions and * limitations under the License. */ +#include #include #include #include #include #include + +#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) #include +#else +#define GCCCOMPILER +struct __FILE {int handle;}; +FILE __stdout; +FILE __stdin; +FILE __stderr; +#endif + #if defined (ARMCM7) #include "ARMCM7.h" @@ -152,6 +163,7 @@ int fputc (int c, FILE * stream) return (-1); } +#ifndef GCCCOMPILER /* IO device file handles. */ #define FH_STDIN 0x8001 #define FH_STDOUT 0x8002 @@ -498,6 +510,23 @@ long _sys_flen (FILEHANDLE fh) { } #endif +#else /* gcc compiler */ +int _write(int file, + char *ptr, + int len) +{ + int i; + (void)file; + + for(i=0; i < len;i++) + { + stdout_putchar(*ptr++); + } + return len; +} + +#endif + #define log_str(...) \ do { \ const char *pchSrc = __VA_ARGS__; \ @@ -507,7 +536,17 @@ long _sys_flen (FILEHANDLE fh) { } while(--hwSize); \ } while(0) - +#ifdef GCCCOMPILER +void _exit(int return_code) +{ + (void)return_code; + log_str("\n"); + log_str("_[TEST COMPLETE]_________________________________________________\n"); + log_str("\n\n"); + stdout_putchar(4); + while(1); +} +#else void _sys_exit(int n) { (void)n; @@ -517,6 +556,7 @@ void _sys_exit(int n) stdout_putchar(4); while(1); } +#endif extern void ttywrch (int ch); __attribute__((weak)) diff --git a/Platforms/IPSS/ARMv81MML/LinkScripts/AC6/lnk.sct b/Platforms/IPSS/ARMv81MML/LinkScripts/AC6/lnk.sct index 98a3a6a8..fdac8303 100755 --- a/Platforms/IPSS/ARMv81MML/LinkScripts/AC6/lnk.sct +++ b/Platforms/IPSS/ARMv81MML/LinkScripts/AC6/lnk.sct @@ -13,12 +13,13 @@ LOAD_REGION 0x0 { *.o (RESET, +First) * (InRoot$$$Sections) - * (+RO) + * (+RO-CODE) } DATA 0x20000000 NOCOMPRESS 0xF0000 { - * (+RW,+ZI) + * (+RO-DATA) + * (+RW,+ZI) } ARM_LIB_STACK 0x20100000 ALIGN 64 EMPTY -0x00002000 diff --git a/Platforms/IPSS/ARMv81MML/LinkScripts/GCC/lnk.ld b/Platforms/IPSS/ARMv81MML/LinkScripts/GCC/lnk.ld new file mode 100755 index 00000000..08ce5cac --- /dev/null +++ b/Platforms/IPSS/ARMv81MML/LinkScripts/GCC/lnk.ld @@ -0,0 +1,239 @@ +/****************************************************************************** + * @file gcc_arm.ld + * @brief GNU Linker Script for Cortex-M based device + * @version V2.0.0 + * @date 21. May 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "mem_ARMv81MML.h" + +__STACK_SIZE = 0x2000; +__HEAP_SIZE = 0x50000; + +MEMORY +{ + ITCM (rx) : ORIGIN = 0x00000000, LENGTH = 512K + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + DTCM2 (xrw) : ORIGIN = 0x20020000, LENGTH = 384K +} + +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > ITCM + + /* + * SG veneers: + * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address + * must be set, either with the command line option ‘--section-start’ or in a linker script, + * to indicate where to place these veneers in memory. + */ +/* + .gnu.sgstubs : + { + . = ALIGN(32); + } > FLASH +*/ + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > ITCM + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > ITCM + __exidx_end = .; + + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + /* Add each additional data section here */ +/* + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) +*/ + __copy_table_end__ = .; + } > ITCM + + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + /* Add each additional bss section here */ +/* + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) +*/ + __zero_table_end__ = .; + } > DTCM + + /** + * Location counter can end up 2byte aligned with narrow Thumb code but + * __etext is assumed by startup code to be the LMA of a section in RAM + * which must be 4byte aligned + */ + + .data : + { + __data_start__ = .; + *(vtable) + *(.data) + *(.data.*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > ITCM AT > DTCM + + __etext = ADDR(.data); + + /* + * Secondary data section, optional + * + * Remember to add each additional data section + * to the .copy.table above to asure proper + * initialization during startup. + */ +/* + __etext2 = ALIGN (4); + + .data2 : AT (__etext2) + { + . = ALIGN(4); + __data2_start__ = .; + *(.data2) + *(.data2.*) + . = ALIGN(4); + __data2_end__ = .; + + } > RAM2 +*/ + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > DTCM2 + + /* + * Secondary bss section, optional + * + * Remember to add each additional bss section + * to the .zero.table above to asure proper + * initialization during startup. + */ +/* + .bss2 : + { + . = ALIGN(4); + __bss2_start__ = .; + *(.bss2) + *(.bss2.*) + . = ALIGN(4); + __bss2_end__ = .; + } > RAM2 AT > RAM2 +*/ + + .heap (COPY) : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + . = . + __HEAP_SIZE; + . = ALIGN(8); + __HeapLimit = .; + } > DTCM2 + + .stack (ORIGIN(DTCM2) + LENGTH(DTCM2) - __STACK_SIZE) (COPY) : + { + . = ALIGN(8); + __StackLimit = .; + . = . + __STACK_SIZE; + . = ALIGN(8); + __StackTop = .; + } > DTCM2 + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds DTCM2 limit */ + ASSERT(__StackLimit >= __HeapLimit, "region DTCM2 overflowed with stack") +} + + + diff --git a/Platforms/IPSS/ARMv81MML/LinkScripts/GCC/mem_ARMv81MML.h b/Platforms/IPSS/ARMv81MML/LinkScripts/GCC/mem_ARMv81MML.h new file mode 100755 index 00000000..84a1ff1d --- /dev/null +++ b/Platforms/IPSS/ARMv81MML/LinkScripts/GCC/mem_ARMv81MML.h @@ -0,0 +1,38 @@ +/**************************************************************************//** + * @file mem_ARMCM7.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.1.0 + * @date 15. May 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCM7_H +#define __MEM_ARMCM7_H + + + +#define STACK_SIZE 0x00003000 +#define HEAP_SIZE 0x00100000 + + + +#endif /* __MEM_ARMCM7_H */ diff --git a/Platforms/IPSS/ARMv81MML/Startup/GCC/startup_ARMv81MML.c b/Platforms/IPSS/ARMv81MML/Startup/GCC/startup_ARMv81MML.c new file mode 100755 index 00000000..06cbb5e3 --- /dev/null +++ b/Platforms/IPSS/ARMv81MML/Startup/GCC/startup_ARMv81MML.c @@ -0,0 +1,164 @@ +/****************************************************************************** + * @file startup_ARMCM7.c + * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device + * @version V2.0.3 + * @date 31. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#if defined (ARMv81MML_DSP_DP_MVE_FP) + #include "ARMv81MML_DSP_DP_MVE_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler Function Prototype + *----------------------------------------------------------------------------*/ +typedef void( *pFunc )( void ); + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; +extern uint32_t __STACK_LIMIT; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const pFunc __VECTOR_TABLE[240]; + const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { + (pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVCall Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + Interrupt0_Handler, /* 0 Interrupt 0 */ + Interrupt1_Handler, /* 1 Interrupt 1 */ + Interrupt2_Handler, /* 2 Interrupt 2 */ + Interrupt3_Handler, /* 3 Interrupt 3 */ + Interrupt4_Handler, /* 4 Interrupt 4 */ + Interrupt5_Handler, /* 5 Interrupt 5 */ + Interrupt6_Handler, /* 6 Interrupt 6 */ + Interrupt7_Handler, /* 7 Interrupt 7 */ + Interrupt8_Handler, /* 8 Interrupt 8 */ + Interrupt9_Handler /* 9 Interrupt 9 */ + /* Interrupts 10 .. 223 are left out */ +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#define SERIAL_BASE_ADDRESS (0xA8000000ul) + +#define SERIAL_DATA *((volatile unsigned *) SERIAL_BASE_ADDRESS) + + + + + + + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); + + SystemInit(); /* CMSIS System Initialization */ + + + __PROGRAM_START(); +} + + + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + + diff --git a/Platforms/IPSS/ARMv81MML/Startup/GCC/support.c b/Platforms/IPSS/ARMv81MML/Startup/GCC/support.c new file mode 100755 index 00000000..740f6b08 --- /dev/null +++ b/Platforms/IPSS/ARMv81MML/Startup/GCC/support.c @@ -0,0 +1,36 @@ + +#ifdef __cplusplus +extern "C" +{ +#endif + +char * _sbrk(int incr); + +void __malloc_lock() ; +void __malloc_unlock(); + +char __HeapBase, __HeapLimit; // make sure to define these symbols in linker command file +#ifdef __cplusplus +} +#endif + +static int totalBytesProvidedBySBRK = 0; + +//! sbrk/_sbrk version supporting reentrant newlib (depends upon above symbols defined by linker control file). +char * sbrk(int incr) { + static char *currentHeapEnd = &__HeapBase; + char *previousHeapEnd = currentHeapEnd; + if (currentHeapEnd + incr > &__HeapLimit) { + return (char *)-1; // the malloc-family routine that called sbrk will return 0 + } + currentHeapEnd += incr; + + totalBytesProvidedBySBRK += incr; + + return (char *) previousHeapEnd; +} +//! Synonym for sbrk. +char * _sbrk(int incr) { return sbrk(incr); }; + +void __malloc_lock() { }; +void __malloc_unlock() { }; \ No newline at end of file diff --git a/Platforms/IPSS/ARMv81MML/system_ARMv81MML.c b/Platforms/IPSS/ARMv81MML/system_ARMv81MML.c index 82109007..a86a7f6e 100755 --- a/Platforms/IPSS/ARMv81MML/system_ARMv81MML.c +++ b/Platforms/IPSS/ARMv81MML/system_ARMv81MML.c @@ -28,7 +28,16 @@ #include #include #include + +#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) #include +#else +#define GCCCOMPILER +struct __FILE {int handle;}; +FILE __stdout; +FILE __stdin; +FILE __stderr; +#endif #if defined (ARMv81MML_DSP_DP_MVE_FP) @@ -328,6 +337,7 @@ int fputc (int c, FILE * stream) return (-1); } +#ifndef GCCCOMPILER /* IO device file handles. */ #define FH_STDIN 0x8001 #define FH_STDOUT 0x8002 @@ -674,6 +684,23 @@ long _sys_flen (FILEHANDLE fh) { } #endif +#else /* gcc compiler */ +int _write(int file, + char *ptr, + int len) +{ + int i; + (void)file; + + for(i=0; i < len;i++) + { + stdout_putchar(*ptr++); + } + return len; +} + +#endif + #define log_str(...) \ do { \ const char *pchSrc = __VA_ARGS__; \ @@ -683,7 +710,17 @@ long _sys_flen (FILEHANDLE fh) { } while(--hwSize); \ } while(0) - +#ifdef GCCCOMPILER +void _exit(int return_code) +{ + (void)return_code; + log_str("\n"); + log_str("_[TEST COMPLETE]_________________________________________________\n"); + log_str("\n\n"); + stdout_putchar(4); + while(1); +} +#else void _sys_exit(int n) { (void)n; @@ -693,6 +730,7 @@ void _sys_exit(int n) stdout_putchar(4); while(1); } +#endif extern void ttywrch (int ch); __attribute__((weak)) diff --git a/Source/BasicMathFunctions/arm_abs_f16.c b/Source/BasicMathFunctions/arm_abs_f16.c index 5f19aef5..c4f72885 100755 --- a/Source/BasicMathFunctions/arm_abs_f16.c +++ b/Source/BasicMathFunctions/arm_abs_f16.c @@ -59,7 +59,7 @@ */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" diff --git a/Source/BasicMathFunctions/arm_add_f16.c b/Source/BasicMathFunctions/arm_add_f16.c index d6a93229..854ed179 100755 --- a/Source/BasicMathFunctions/arm_add_f16.c +++ b/Source/BasicMathFunctions/arm_add_f16.c @@ -56,7 +56,7 @@ @return none */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" diff --git a/Source/BasicMathFunctions/arm_dot_prod_f16.c b/Source/BasicMathFunctions/arm_dot_prod_f16.c index d2d2129a..f713a893 100755 --- a/Source/BasicMathFunctions/arm_dot_prod_f16.c +++ b/Source/BasicMathFunctions/arm_dot_prod_f16.c @@ -59,7 +59,7 @@ @return none */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" diff --git a/Source/BasicMathFunctions/arm_mult_f16.c b/Source/BasicMathFunctions/arm_mult_f16.c index 7afb8275..8fdf923a 100755 --- a/Source/BasicMathFunctions/arm_mult_f16.c +++ b/Source/BasicMathFunctions/arm_mult_f16.c @@ -56,7 +56,7 @@ @return none */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" diff --git a/Source/BasicMathFunctions/arm_negate_f16.c b/Source/BasicMathFunctions/arm_negate_f16.c index 130e37e3..fff6e60e 100755 --- a/Source/BasicMathFunctions/arm_negate_f16.c +++ b/Source/BasicMathFunctions/arm_negate_f16.c @@ -57,7 +57,7 @@ @return none */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" diff --git a/Source/BasicMathFunctions/arm_offset_f16.c b/Source/BasicMathFunctions/arm_offset_f16.c index b45136a9..95447a44 100755 --- a/Source/BasicMathFunctions/arm_offset_f16.c +++ b/Source/BasicMathFunctions/arm_offset_f16.c @@ -58,7 +58,7 @@ @return none */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" diff --git a/Source/BasicMathFunctions/arm_scale_f16.c b/Source/BasicMathFunctions/arm_scale_f16.c index dffdc84f..4c006c88 100755 --- a/Source/BasicMathFunctions/arm_scale_f16.c +++ b/Source/BasicMathFunctions/arm_scale_f16.c @@ -73,7 +73,7 @@ @return none */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" diff --git a/Source/BasicMathFunctions/arm_sub_f16.c b/Source/BasicMathFunctions/arm_sub_f16.c index ccaa46be..211ecdd8 100755 --- a/Source/BasicMathFunctions/arm_sub_f16.c +++ b/Source/BasicMathFunctions/arm_sub_f16.c @@ -58,7 +58,7 @@ @return none */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" void arm_sub_f16( diff --git a/Source/CMakeLists.txt b/Source/CMakeLists.txt index 6f689b6a..aa1b21d6 100755 --- a/Source/CMakeLists.txt +++ b/Source/CMakeLists.txt @@ -274,6 +274,7 @@ if (DISTANCE) target_link_libraries(CMSISDSP INTERFACE CMSISDSPDistance) endif() + ### Includes target_include_directories(CMSISDSP INTERFACE "${DSP}/Include") diff --git a/Source/CommonTables/arm_const_structs_f16.c b/Source/CommonTables/arm_const_structs_f16.c index 354ff52e..ca2b7bb5 100755 --- a/Source/CommonTables/arm_const_structs_f16.c +++ b/Source/CommonTables/arm_const_structs_f16.c @@ -56,41 +56,60 @@ For the MVE version, the new arm_cfft_init_f32 must be used. */ #if !defined(__CC_ARM) + +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len16 = { 16, twiddleCoefF16_16, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH }; +#endif +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len32 = { 32, twiddleCoefF16_32, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH }; +#endif +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len64 = { 64, twiddleCoefF16_64, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH }; +#endif +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len128 = { 128, twiddleCoefF16_128, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH }; +#endif +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len256 = { 256, twiddleCoefF16_256, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH }; +#endif +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len512 = { 512, twiddleCoefF16_512, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH }; +#endif +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len1024 = { 1024, twiddleCoefF16_1024, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH }; +#endif +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len2048 = { 2048, twiddleCoefF16_2048, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH }; +#endif +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) const arm_cfft_instance_f16 arm_cfft_sR_f16_len4096 = { 4096, twiddleCoefF16_4096, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH }; +#endif #endif #endif /* !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */ diff --git a/Source/ComplexMathFunctions/CMakeLists.txt b/Source/ComplexMathFunctions/CMakeLists.txt index 87ea102c..5283e9b1 100644 --- a/Source/ComplexMathFunctions/CMakeLists.txt +++ b/Source/ComplexMathFunctions/CMakeLists.txt @@ -16,10 +16,18 @@ configDsp(CMSISDSPComplexMath ${ROOT}) include(interpol) interpol(CMSISDSPFastMath) + if (CONFIGTABLE AND ALLFAST) target_compile_definitions(CMSISDSPComplexMath PUBLIC ARM_ALL_FAST_TABLES) endif() +# Vectorized code is defining sqrt +# so fast tables required even if Fast Math not built. +if (CONFIGTABLE AND (HELIUM OR MVEF OR MVEI)) + target_compile_definitions(CMSISDSPComplexMath PUBLIC ARM_FAST_ALLOW_TABLES) +endif() + + # MVE code is using a table for computing the fast sqrt arm_cmplx_mag_q31 # There is the possibility of not compiling this function and not including # the table. diff --git a/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c index f8d424c2..2eea2e21 100644 --- a/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c +++ b/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c @@ -89,8 +89,8 @@ void arm_biquad_cascade_df2T_f32( /* b1Coeffs = {b0, b1, b2, x} */ /* b1Coeffs = { x, x, a1, a2} */ - b1Coeffs = vshlcq_s32(b0Coeffs, &tmp, 32); - a1Coeffs = vshlcq_s32(a0Coeffs, &tmp, 32); + b1Coeffs = (f32x4_t)vshlcq_s32((int32x4_t)b0Coeffs, &tmp, 32); + a1Coeffs = (f32x4_t)vshlcq_s32((int32x4_t)a0Coeffs, &tmp, 32); sample = blockSize / 2; diff --git a/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c b/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c index 426efef0..f9cd5811 100644 --- a/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c +++ b/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c @@ -125,11 +125,11 @@ void arm_biquad_cascade_stereo_df2T_f32( /* * load {d1a, d1b, d1a, d1b} */ - stateVec0 = vldrwq_gather_shifted_offset((uint32_t const *) scratch, loadIdxVec); + stateVec0 = (f32x4_t)vldrwq_gather_shifted_offset((uint32_t const *) scratch, loadIdxVec); /* * load {in0 in1 in0 in1} */ - inVec = vldrwq_gather_shifted_offset((uint32_t const *) pIn, loadIdxVec); + inVec = (f32x4_t)vldrwq_gather_shifted_offset((uint32_t const *) pIn, loadIdxVec); stateVec0 = vfmaq(stateVec0, inVec, b0); *pOut++ = vgetq_lane(stateVec0, 0); diff --git a/Source/TransformFunctions/arm_cfft_f16.c b/Source/TransformFunctions/arm_cfft_f16.c index 4186dc52..711f3944 100755 --- a/Source/TransformFunctions/arm_cfft_f16.c +++ b/Source/TransformFunctions/arm_cfft_f16.c @@ -30,7 +30,7 @@ #include "arm_common_tables_f16.h" -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_helium_utils.h" #include "arm_vec_fft.h" diff --git a/Source/TransformFunctions/arm_cfft_init_f16.c b/Source/TransformFunctions/arm_cfft_init_f16.c index 1a545f54..91a4b21f 100755 --- a/Source/TransformFunctions/arm_cfft_init_f16.c +++ b/Source/TransformFunctions/arm_cfft_init_f16.c @@ -54,7 +54,7 @@ #include "arm_const_structs_f16.h" -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) +#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) #include "arm_vec_fft.h" #include "arm_mve_tables_f16.h" @@ -158,7 +158,7 @@ arm_status arm_cfft_init_f16( /* Initializations of Instance structure depending on the FFT length */ switch (S->fftLen) { /* Initializations of structure parameters for 4096 point FFT */ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_F16_4096)) case 4096U: /* Initialise the bit reversal table modifier */ S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH; @@ -168,7 +168,7 @@ arm_status arm_cfft_init_f16( break; #endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F16_2048)) /* Initializations of structure parameters for 2048 point FFT */ case 2048U: /* Initialise the bit reversal table modifier */ @@ -179,7 +179,7 @@ arm_status arm_cfft_init_f16( break; #endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F16_1024)) /* Initializations of structure parameters for 1024 point FFT */ case 1024U: /* Initialise the bit reversal table modifier */ @@ -190,7 +190,7 @@ arm_status arm_cfft_init_f16( break; #endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_F16_512)) /* Initializations of structure parameters for 512 point FFT */ case 512U: /* Initialise the bit reversal table modifier */ @@ -201,7 +201,7 @@ arm_status arm_cfft_init_f16( break; #endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_F16_256)) case 256U: S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH; S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; @@ -210,7 +210,7 @@ arm_status arm_cfft_init_f16( break; #endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_F16_128)) case 128U: S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH; S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; @@ -219,7 +219,7 @@ arm_status arm_cfft_init_f16( break; #endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_F16_64)) case 64U: S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH; S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64; @@ -228,7 +228,7 @@ arm_status arm_cfft_init_f16( break; #endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_F16_32)) case 32U: S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH; S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32; @@ -237,7 +237,7 @@ arm_status arm_cfft_init_f16( break; #endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16) +#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_F16_16)) case 16U: /* Initializations of structure parameters for 16 point FFT */ S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH; diff --git a/Testing/CMakeLists.txt b/Testing/CMakeLists.txt index c3d5267d..2585f726 100644 --- a/Testing/CMakeLists.txt +++ b/Testing/CMakeLists.txt @@ -78,6 +78,7 @@ option(BENCHMARK "Benchmarking compiled" OFF) option(EXTBENCH "Benchmarking with external traces" OFF) option(NN "NN Tests included" OFF) option(REFLIB "Use already built reference lib" OFF) +option(EMBEDDED "Embedded Mode" ON) option(FLOAT16TESTS "Float16 tests" OFF) option(MICROBENCH "Micro benchmarks" OFF) @@ -253,18 +254,22 @@ endif() set(FRAMEWORKSRC FrameworkSource/Test.cpp - FrameworkSource/Semihosting.cpp FrameworkSource/IORunner.cpp FrameworkSource/ArrayMemory.cpp FrameworkSource/Pattern.cpp FrameworkSource/PatternMgr.cpp FrameworkSource/Error.cpp - FrameworkSource/FPGA.cpp FrameworkSource/Timing.cpp FrameworkSource/Generators.cpp FrameworkSource/Calibrate.cpp ) +if (EMBEDDED) + set(FRAMEWORKMODESRC FrameworkSource/FPGA.cpp) +else() + set(FRAMEWORKMODESRC FrameworkSource/Semihosting.cpp) +endif() + # With -O2, generated code is crashing on some cycle accurate models. # (cpp part) @@ -284,6 +289,10 @@ target_sources(TestingLib PRIVATE ${TESTSRC16}) target_sources(TestingLib PRIVATE testmain.cpp) target_sources(TestingLib PRIVATE GeneratedSource/TestDesc.cpp) +if (EMBEDDED) + target_compile_definitions(TestingLib PUBLIC EMBEDDED) +endif() + if (BENCHMARK) target_compile_definitions(TestingLib PUBLIC BENCHMARK) if (MICROBENCH) @@ -293,6 +302,8 @@ endif() target_sources(FrameworkLib PRIVATE ${FRAMEWORKSRC}) +target_sources(FrameworkLib PRIVATE ${FRAMEWORKMODESRC}) + if (BENCHMARK) target_compile_definitions(FrameworkLib PUBLIC BENCHMARK) endif() diff --git a/Testing/FrameworkInclude/FPGA.h b/Testing/FrameworkInclude/FPGA.h index ee53fcb1..9aee47f5 100644 --- a/Testing/FrameworkInclude/FPGA.h +++ b/Testing/FrameworkInclude/FPGA.h @@ -28,7 +28,7 @@ #ifndef _FPGA_H_ #define _FPGA_H_ #include -#include "stdlib.h" +#include #include "arm_math.h" #include "arm_math_f16.h" diff --git a/Testing/FrameworkInclude/Semihosting.h b/Testing/FrameworkInclude/Semihosting.h index e992fc0d..c1e42610 100644 --- a/Testing/FrameworkInclude/Semihosting.h +++ b/Testing/FrameworkInclude/Semihosting.h @@ -29,7 +29,7 @@ #define _SEMIHOSTING_H_ #include #include -#include +#include #include "arm_math.h" #include "arm_math_f16.h" diff --git a/Testing/FrameworkInclude/Test.h b/Testing/FrameworkInclude/Test.h index 699d4bf0..0df8f219 100644 --- a/Testing/FrameworkInclude/Test.h +++ b/Testing/FrameworkInclude/Test.h @@ -30,7 +30,6 @@ #include #include -#include #include #include "arm_math.h" #include "arm_math_f16.h" diff --git a/Testing/FrameworkSource/ArrayMemory.cpp b/Testing/FrameworkSource/ArrayMemory.cpp index 3494e289..4badeb91 100644 --- a/Testing/FrameworkSource/ArrayMemory.cpp +++ b/Testing/FrameworkSource/ArrayMemory.cpp @@ -26,8 +26,8 @@ * limitations under the License. */ #include "ArrayMemory.h" -#include -#include +#include +#include #include namespace Client { diff --git a/Testing/FrameworkSource/Error.cpp b/Testing/FrameworkSource/Error.cpp index 298bb997..a97b8b20 100644 --- a/Testing/FrameworkSource/Error.cpp +++ b/Testing/FrameworkSource/Error.cpp @@ -25,11 +25,12 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -#include -#include -#include "Error.h" +#include +#include #include "arm_math.h" #include "arm_math_f16.h" +#include "Error.h" + namespace Client { diff --git a/Testing/FrameworkSource/FPGA.cpp b/Testing/FrameworkSource/FPGA.cpp index 743341fe..9d3dac35 100644 --- a/Testing/FrameworkSource/FPGA.cpp +++ b/Testing/FrameworkSource/FPGA.cpp @@ -34,8 +34,8 @@ #include #include #include "FPGA.h" -#include -#include +#include + #include "Generators.h" #include "arm_math.h" #include "arm_math_f16.h" diff --git a/Testing/FrameworkSource/IORunner.cpp b/Testing/FrameworkSource/IORunner.cpp index 2df14803..8000adce 100644 --- a/Testing/FrameworkSource/IORunner.cpp +++ b/Testing/FrameworkSource/IORunner.cpp @@ -32,8 +32,8 @@ #include #include -#include -#include +#include +#include #include "IORunner.h" #include "Error.h" #include "Timing.h" diff --git a/Testing/FrameworkSource/Semihosting.cpp b/Testing/FrameworkSource/Semihosting.cpp index 5485c128..4b25f673 100644 --- a/Testing/FrameworkSource/Semihosting.cpp +++ b/Testing/FrameworkSource/Semihosting.cpp @@ -32,9 +32,9 @@ #include #include -#include -#include -#include +#include +#include +#include #include "Generators.h" #include "Semihosting.h" #include "arm_math.h" diff --git a/Testing/FrameworkSource/Test.cpp b/Testing/FrameworkSource/Test.cpp index 69a6215c..43fbfc11 100644 --- a/Testing/FrameworkSource/Test.cpp +++ b/Testing/FrameworkSource/Test.cpp @@ -27,10 +27,6 @@ */ #include "Test.h" #include -#include -#include - - int testIndex(Testing::testIndex_t i) { diff --git a/Testing/TestScripts/Regression/Commands.py b/Testing/TestScripts/Regression/Commands.py index 4e6bc586..ad62dafa 100755 --- a/Testing/TestScripts/Regression/Commands.py +++ b/Testing/TestScripts/Regression/Commands.py @@ -323,6 +323,10 @@ class Test: # Process a test from the test description file def processTest(self): + if isDebugMode(): + completed=subprocess.run([sys.executable,"processTests.py","-e",self.testName(),"1"],timeout=3600) + check(completed) + else: completed=subprocess.run([sys.executable,"processTests.py","-e",self.testName()],timeout=3600) check(completed) @@ -345,7 +349,12 @@ class Test: with self.buildConfig().buildFolder() as b: msg(" Run %s\n" % self.testName() ) with open(self.resultName(),"w") as results: - completed=subprocess.run(fvp.split(),stdout=results,timeout=timeoutVal) + if isDebugMode(): + print(os.getcwd()) + print(fvp.split()) + completed=subprocess.run(fvp.split(),timeout=timeoutVal) + else: + completed=subprocess.run(fvp.split(),stdout=results,timeout=timeoutVal) check(completed) # Process results of the given tests @@ -388,6 +397,8 @@ class Test: # build is done per test suite. if sim: if fvp is not None: + if isDebugMode(): + print(fvp) self.run(fvp,benchmode) error=self.processResult() if benchmode and (error == NOTESTFAILED): diff --git a/Testing/TestScripts/doc/Format.py b/Testing/TestScripts/doc/Format.py index fc6102cf..c4d85c66 100755 --- a/Testing/TestScripts/doc/Format.py +++ b/Testing/TestScripts/doc/Format.py @@ -1,8 +1,25 @@ +def joinit(iterable, delimiter): + it = iter(iterable) + yield next(it) + for x in it: + yield delimiter + yield x + + class Markdown: def __init__(self,output): self._id=0 self._output = output + def visitBarChart(self,data): + pass + + def visitHistory(self,data): + pass + + def visitText(self,text): + self._output.write(text) + # Write columns in markdown format def writeColumns(self,cols): colStr = "".join(joinit(cols,"|")) @@ -201,6 +218,183 @@ for (i = 0; i < toggler.length; i++) { }); }""" +barscript=""" + + + +""" + class HTMLToc: def __init__(self,output): @@ -213,6 +407,14 @@ class HTMLToc: def visitTable(self,table): pass + def visitBarChart(self,data): + pass + + def visitHistory(self,data): + pass + + def visitText(self,text): + pass def visitSection(self,section): self._id = self._id + 1 @@ -241,10 +443,49 @@ class HTML: def __init__(self,output,regMode): self._id=0 self._sectionID = 0 + self._barID = 0 + self._histID = 0 self._output = output self._regMode = regMode - + def visitBarChart(self,bar): + data=bar.data + datastr = "".join(joinit(["{name:'%s',value:%s}" % x for x in data],",")) + #print(datastr) + self._output.write("

\n" % self._barID) + self._output.write("""""" % (self._barID,datastr,self._barID,self._barID)) + + self._barID = self._barID + 1 + + def _getIndex(self,runids,data): + return([[runids.index(x[0]),x[1]] for x in data]) + + def visitHistory(self,hist): + data=hist.data + runidstr = "".join(joinit([str(x) for x in hist.runids],",")) + serieelems=[] + for core in data: + serieelems.append("{name: '%s',values: %s}" % (core,self._getIndex(hist.runids,data[core]))) + + seriestr = "".join(joinit(serieelems,",")) + datastr="""{ +series: [%s], + dates: [%s] +};""" %(seriestr,runidstr); + #print(datastr) + self._output.write("

\n" % self._histID) + self._output.write("""""" % (self._histID,datastr,self._histID,self._histID)) + + self._histID = self._histID + 1 + + def visitText(self,text): + pass def visitTable(self,table): self._output.write("\n") @@ -308,6 +549,7 @@ class HTML: else: self._output.write("

ECPS Benchmark Summary

\n") self._output.write("

Run number %d on %s

\n" % (document.runid, str(document.date))) + self._output.write(barscript) def leaveDocument(self,document): document.accept(HTMLToc(self._output)) diff --git a/Testing/TestScripts/doc/Structure.py b/Testing/TestScripts/doc/Structure.py index bc59e7e6..50956ea8 100755 --- a/Testing/TestScripts/doc/Structure.py +++ b/Testing/TestScripts/doc/Structure.py @@ -60,14 +60,14 @@ class Document: class Section(Hierarchy): def __init__(self,name): super(Section, self).__init__(name) - self._tables = [] + self._content = [] - def addTable(self,table): - self._tables.append(table) + def addContent(self,content): + self._content.append(content) @property def hasContent(self): - return(len(self._tables) > 0 or any([x.hasContent for x in self.sections])) + return(len(self._content) > 0 or any([x.hasContent for x in self.sections])) def accept(self, visitor): @@ -75,7 +75,7 @@ class Section(Hierarchy): visitor.visitSection(self) for element in self.sections: element.accept(visitor) - for element in self._tables: + for element in self._content: element.accept(visitor) visitor.leaveSection(self) @@ -107,3 +107,43 @@ class Table: def accept(self, visitor): visitor.visitTable(self) +class Text: + def __init__(self,text): + self._text = text + + @property + def text(self): + return(self._text) + + def accept(self, visitor): + visitor.visitText(self) + +class BarChart: + def __init__(self,data): + self._data = data + + @property + def data(self): + return(self._data) + + def accept(self, visitor): + visitor.visitBarChart(self) + +class History: + def __init__(self,data,runid): + self._data = data + minId = runid-9 + if minId < 0: + minId = 0 + self._runids = list(range(minId,runid+1)) + + @property + def data(self): + return(self._data) + + @property + def runids(self): + return(self._runids) + + def accept(self, visitor): + visitor.visitHistory(self) \ No newline at end of file diff --git a/Testing/bench.txt b/Testing/bench.txt index d9101312..0727a65f 100755 --- a/Testing/bench.txt +++ b/Testing/bench.txt @@ -1125,7 +1125,7 @@ group Root { NB,IFFT,BITREV Summary NB Names "Number of samples,Inverse FFT, Bit Reversal" - Formula "NB" + Formula "I(NB*log2(NB))" } Pattern INPUTR_F32_ID : RealInputSamples19_f32.txt @@ -1175,7 +1175,7 @@ group Root { NB,IFFT,BITREV Summary NB Names "Number of samples,Inverse FFT, Bit Reversal" - Formula "NB" + Formula "I(NB*log2(NB))" } Pattern INPUTR_Q31_ID : RealInputSamples19_q31.txt @@ -1225,7 +1225,7 @@ group Root { NB,IFFT,BITREV Summary NB Names "Number of samples,Inverse FFT, Bit Reversal" - Formula "NB" + Formula "I(NB*log2(NB))" } Pattern INPUTR_Q15_ID : RealInputSamples19_q15.txt diff --git a/Testing/extractDb.py b/Testing/extractDb.py index dcce85da..3b25756b 100755 --- a/Testing/extractDb.py +++ b/Testing/extractDb.py @@ -31,10 +31,11 @@ runid = 1 parser = argparse.ArgumentParser(description='Generate summary benchmarks') -parser.add_argument('-b', nargs='?',type = str, default="bench.db", help="Benchmark database") +parser.add_argument('-b', nargs='?',type = str, default="bench.db", help="Database") parser.add_argument('-o', nargs='?',type = str, default="full.md", help="Full summary") parser.add_argument('-r', action='store_true', help="Regression database") parser.add_argument('-t', nargs='?',type = str, default="md", help="md,html") +parser.add_argument('-byc', action='store_true', help="By Compiler") # For runid or runid range parser.add_argument('others', nargs=argparse.REMAINDER,help="Run ID") @@ -59,6 +60,8 @@ REMOVETABLES=['TESTNAME','TESTDATE','RUN','CORE', 'PLATFORM', 'COMPILERKIND', 'C # Name is removed here because it is added at the beginning REMOVECOLUMNS=['runid','name','type','platform','category','coredef','OPTIMIZED','HARDFP','FASTMATH','NEON','HELIUM','UNROLL','ROUNDING','DATE','compilerkindid','date','categoryid', 'ID', 'platformid', 'coreid', 'compilerid', 'typeid'] +REMOVECOLUMNSFORHISTORY=['Regression','MAXREGCOEF','name','type','platform','category','coredef','OPTIMIZED','HARDFP','FASTMATH','NEON','HELIUM','UNROLL','ROUNDING','DATE','compilerkindid','date','categoryid', 'ID', 'platformid', 'coreid', 'compilerid', 'typeid'] + # Get existing benchmark tables def getBenchTables(): r=c.execute("SELECT name FROM sqlite_master WHERE type='table'") @@ -77,15 +80,31 @@ def getExistingTypes(benchTable): # Get compilers from specific type and table allCompilers="""select distinct compilerid from %s WHERE typeid=?""" +# Get compilers from specific type and table +allCores="""select distinct coreid from %s WHERE typeid=?""" + + compilerDesc="""select compiler,version from COMPILER INNER JOIN COMPILERKIND USING(compilerkindid) WHERE compilerid=?""" +coreDesc="""select core from CORE WHERE coreid=?""" + # Get existing compiler in a table for a specific type # (In case report is structured by types) def getExistingCompiler(benchTable,typeid): r=c.execute(allCompilers % benchTable,(typeid,)).fetchall() return([x[0] for x in r]) +def getExistingCores(benchTable,typeid): + r=c.execute(allCores % benchTable,(typeid,)).fetchall() + return([x[0] for x in r]) + + + +def getCoreDesc(compilerid): + r=c.execute(coreDesc,(compilerid,)).fetchone() + return(r) + def getCompilerDesc(compilerid): r=c.execute(compilerDesc,(compilerid,)).fetchone() return(r) @@ -101,9 +120,46 @@ def diff(first, second): return [item for item in first if item not in second] +# Command to get data for specific core +# and type +historyCmd="""select %s from %s + INNER JOIN CATEGORY USING(categoryid) + INNER JOIN PLATFORM USING(platformid) + INNER JOIN CORE USING(coreid) + INNER JOIN COMPILER USING(compilerid) + INNER JOIN COMPILERKIND USING(compilerkindid) + INNER JOIN TYPE USING(typeid) + INNER JOIN TESTNAME USING(testnameid) + WHERE compilerid=? AND coreid=? AND typeid = ? AND ID = ? AND runid > (? - 10) + """ + +compilersForHistory="""select distinct compilerid,compiler,version from %s + INNER JOIN COMPILER USING(compilerid) + INNER JOIN COMPILERKIND USING(compilerkindid) + WHERE coreid=? AND typeid = ? AND ID = ? AND runid > (? - 10) + """ + +# Command to get data for specific core +# and type +benchCmdForCore="""select %s from %s + INNER JOIN CATEGORY USING(categoryid) + INNER JOIN PLATFORM USING(platformid) + INNER JOIN CORE USING(coreid) + INNER JOIN COMPILER USING(compilerid) + INNER JOIN COMPILERKIND USING(compilerkindid) + INNER JOIN TYPE USING(typeid) + INNER JOIN TESTNAME USING(testnameid) + WHERE coreid=? AND typeid = ? AND runid = ? + """ + +coresForHistory="""select distinct coreid,core from %s + INNER JOIN CORE USING(coreid) + WHERE compilerid=? AND typeid = ? AND ID = ? AND runid > (? - 10) + """ + # Command to get data for specific compiler # and type -benchCmd="""select %s from %s +benchCmdForCompiler="""select %s from %s INNER JOIN CATEGORY USING(categoryid) INNER JOIN PLATFORM USING(platformid) INNER JOIN CORE USING(coreid) @@ -114,10 +170,18 @@ benchCmd="""select %s from %s WHERE compilerid=? AND typeid = ? AND runid = ? """ - # Command to get test names for specific compiler # and type -benchNames="""select distinct name from %s +benchNamesForCore="""select distinct ID,name from %s + INNER JOIN COMPILER USING(compilerid) + INNER JOIN COMPILERKIND USING(compilerkindid) + INNER JOIN TYPE USING(typeid) + INNER JOIN TESTNAME USING(testnameid) + WHERE coreid=? AND typeid = ? AND runid = ? + """ +# Command to get test names for specific compiler +# and type +benchNamesForCompiler="""select distinct ID,name from %s INNER JOIN COMPILER USING(compilerid) INNER JOIN COMPILERKIND USING(compilerkindid) INNER JOIN TYPE USING(typeid) @@ -150,13 +214,28 @@ def isNotIDColumn(col): return(False) else: return(True) - + +# Get test names +# for specific typeid and core (for the data) +def getTestNamesForCore(benchTable,core,typeid): + vals=(core,typeid,runid) + result=c.execute(benchNamesForCore % benchTable,vals).fetchall() + names=[(x[0],x[1]) for x in list(result)] + return(names) + # Get test names # for specific typeid and compiler (for the data) -def getTestNames(benchTable,comp,typeid): +def getTestNamesForCompiler(benchTable,comp,typeid): vals=(comp,typeid,runid) - result=c.execute(benchNames % benchTable,vals).fetchall() - return([x[0] for x in list(result)]) + result=c.execute(benchNamesForCompiler % benchTable,vals).fetchall() + names=[(x[0],x[1]) for x in list(result)] + return(names) + +# Command to get data for specific core +# and type +nbElemsInBenchAndTypeAndCoreCmd="""select count(*) from %s + WHERE coreid=? AND typeid = ? AND runid = ? + """ # Command to get data for specific compiler # and type @@ -181,6 +260,12 @@ def getCategoryName(benchTable,runid): result=c.execute(categoryName % benchTable,(runid,)).fetchone() return(result[0]) +# Get nb elems in a table +def getNbElemsInBenchAndTypeAndCoreCmd(benchTable,coreid,typeid): + vals=(coreid,typeid,runid) + result=c.execute(nbElemsInBenchAndTypeAndCoreCmd % benchTable,vals).fetchone() + return(result[0]) + # Get nb elems in a table def getNbElemsInBenchAndTypeAndCompilerCmd(benchTable,comp,typeid): vals=(comp,typeid,runid) @@ -197,16 +282,43 @@ def getNbElemsInBenchCmd(benchTable): result=c.execute(nbElemsInBenchCmd % benchTable,vals).fetchone() return(result[0]) +# Get names of columns and data for a table +# for specific typeid and coreid (for the data) +def getColNamesAndHistory(benchTable,compiler,core,typeid,testid): + cursor=c.cursor() + result=cursor.execute(benchCmdColumns % (benchTable)) + cols= [member[0] for member in cursor.description] + keepCols = ['name','runid'] + [c for c in diff(cols , REMOVECOLUMNSFORHISTORY) if isNotIDColumn(c)] + keepColsStr = "".join(joinit(keepCols,",")) + vals=(compiler,core,typeid,testid,runid) + result=cursor.execute(historyCmd % (keepColsStr,benchTable),vals) + vals =np.array([list(x) for x in list(result)]) + return(keepCols,vals) + +# Get names of columns and data for a table +# for specific typeid and coreid (for the data) +def getColNamesAndDataForCore(benchTable,core,typeid): + cursor=c.cursor() + result=cursor.execute(benchCmdColumns % (benchTable)) + cols= [member[0] for member in cursor.description] + keepCols = ['name'] + [c for c in diff(cols , REMOVECOLUMNS) if isNotIDColumn(c)] + keepColsStr = "".join(joinit(keepCols,",")) + vals=(core,typeid,runid) + result=cursor.execute(benchCmdForCore % (keepColsStr,benchTable),vals) + vals =np.array([list(x) for x in list(result)]) + return(keepCols,vals) + + # Get names of columns and data for a table # for specific typeid and compiler (for the data) -def getColNamesAndData(benchTable,comp,typeid): +def getColNamesAndDataForCompiler(benchTable,comp,typeid): cursor=c.cursor() result=cursor.execute(benchCmdColumns % (benchTable)) cols= [member[0] for member in cursor.description] keepCols = ['name'] + [c for c in diff(cols , REMOVECOLUMNS) if isNotIDColumn(c)] keepColsStr = "".join(joinit(keepCols,",")) vals=(comp,typeid,runid) - result=cursor.execute(benchCmd % (keepColsStr,benchTable),vals) + result=cursor.execute(benchCmdForCompiler % (keepColsStr,benchTable),vals) vals =np.array([list(x) for x in list(result)]) return(keepCols,vals) @@ -214,8 +326,8 @@ def getColNamesAndData(benchTable,comp,typeid): PARAMS=["NB","NumTaps", "NBA", "NBB", "Factor", "NumStages","VECDIM","NBR","NBC","NBI","IFFT", "BITREV"] -def regressionTableFor(name,section,ref,toSort,indexCols,field): - data=ref.pivot_table(index=indexCols, columns='core', +def regressionTableFor(byname,name,section,ref,toSort,indexCols,field): + data=ref.pivot_table(index=indexCols, columns=byname, values=[field], aggfunc='first') data=data.sort_values(toSort) @@ -224,7 +336,7 @@ def regressionTableFor(name,section,ref,toSort,indexCols,field): columns = diff(indexCols,['name']) dataTable=Table(columns,cores) - section.addTable(dataTable) + section.addContent(dataTable) dataForFunc=data.loc[name] if type(dataForFunc) is pd.DataFrame: @@ -237,12 +349,66 @@ def regressionTableFor(name,section,ref,toSort,indexCols,field): if field=="MAXREGCOEF": row=[("%.3f" % x) for x in row] dataTable.addRow(row) + return(None) else: if field=="MAXREGCOEF": dataForFunc=[("%.3f" % x) for x in dataForFunc] dataTable.addRow(dataForFunc) - -def formatTableByCore(typeSection,testNames,cols,vals): + return(list(zip(cores,dataForFunc))) + +def formatColumnName(c): + return("".join(joinit(c,":"))) + +def getCoresForHistory(benchTable,compilerid,typeid,testid,runid): + vals=(compilerid,typeid,testid,runid) + result=c.execute(coresForHistory % benchTable,vals).fetchall() + ids=[(x[0],x[1]) for x in list(result)] + return(ids) + +def getCompilerForHistory(benchTable,coreid,typeid,testid,runid): + vals=(coreid,typeid,testid,runid) + result=c.execute(compilersForHistory % benchTable,vals).fetchall() + ids=[(x[0],x[1],x[2]) for x in list(result)] + return(ids) + +def getHistory(desc,testid,indexCols): + benchName,sectionID,typeid,runid = desc + + #print(benchName) + #print(sectionID) + #print(typeid) + #print(testid) + columns = diff(indexCols,['name']) + #print(columns) + if args.byc: + coreid=sectionID + compilerids=getCompilerForHistory(benchName,coreid,typeid,testid,runid) + series={} + for compilerid,compilername,version in compilerids: + result=getColNamesAndHistory(benchName,compilerid,coreid,typeid,testid) + #print("%s:%s" % (compilername,version)) + maxpos = result[0].index('MAX') + lrunid = result[0].index('runid') + r=[[int(x[lrunid]),int(x[maxpos])] for x in result[1:][0]] + series[corename]=r + hist=History(series,runid) + return(hist) + else: + compilerid=sectionID + coreids = getCoresForHistory(benchName,compilerid,typeid,testid,runid) + series={} + for coreid,corename in coreids: + result=getColNamesAndHistory(benchName,compilerid,coreid,typeid,testid) + #print(corename) + maxpos = result[0].index('MAX') + corepos = result[0].index('core') + lrunid = result[0].index('runid') + r=[[int(x[lrunid]),int(x[maxpos])] for x in result[1:][0]] + series[corename]=r + hist=History(series,runid) + return(hist) + +def formatTableBy(desc,byname,section,typeSection,testNames,cols,vals): if vals.size != 0: ref=pd.DataFrame(vals,columns=cols) toSort=["name"] @@ -256,47 +422,56 @@ def formatTableByCore(typeSection,testNames,cols,vals): ref['MAX']=pd.to_numeric(ref['MAX']) ref['MAXREGCOEF']=pd.to_numeric(ref['MAXREGCOEF']) - indexCols=diff(cols,['core','Regression','MAXREGCOEF','MAX','version','compiler']) + indexCols=diff(cols,byname + ['Regression','MAXREGCOEF','MAX'] + section) valList = ['Regression'] else: ref['CYCLES']=pd.to_numeric(ref['CYCLES']) - indexCols=diff(cols,['core','CYCLES','version','compiler']) + indexCols=diff(cols,byname + ['CYCLES'] + section) valList = ['CYCLES'] - for name in testNames: + for testid,name in testNames: if args.r: testSection = Section(name) typeSection.addSection(testSection) + maxCyclesSection = Section("Max cycles") + testSection.addSection(maxCyclesSection) + theCycles=regressionTableFor(byname,name,maxCyclesSection,ref,toSort,indexCols,'MAX') + if theCycles is not None: + #print(theCycles) + barChart=BarChart(theCycles) + maxCyclesSection.addContent(barChart) + + #history=getHistory(desc,testid,indexCols) + #testSection.addContent(history) + regressionSection = Section("Regression") testSection.addSection(regressionSection) - regressionTableFor(name,regressionSection,ref,toSort,indexCols,'Regression') + regressionTableFor(byname,name,regressionSection,ref,toSort,indexCols,'Regression') - maxCyclesSection = Section("Max cycles") - testSection.addSection(maxCyclesSection) - regressionTableFor(name,maxCyclesSection,ref,toSort,indexCols,'MAX') maxRegCoefSection = Section("Max Reg Coef") testSection.addSection(maxRegCoefSection) - regressionTableFor(name,maxRegCoefSection,ref,toSort,indexCols,'MAXREGCOEF') + regressionTableFor(byname,name,maxRegCoefSection,ref,toSort,indexCols,'MAXREGCOEF') else: - data=ref.pivot_table(index=indexCols, columns='core', + data=ref.pivot_table(index=indexCols, columns=byname, values=valList, aggfunc='first') data=data.sort_values(toSort) - cores = [c[1] for c in list(data.columns)] + #print(list(data.columns)) + columnsID = [formatColumnName(c[1:]) for c in list(data.columns)] columns = diff(indexCols,['name']) testSection = Section(name) typeSection.addSection(testSection) - dataTable=Table(columns,cores) - testSection.addTable(dataTable) + dataTable=Table(columns,columnsID) + testSection.addContent(dataTable) dataForFunc=data.loc[name] if type(dataForFunc) is pd.DataFrame: @@ -326,20 +501,37 @@ def addReportFor(document,runid,benchName): typeName = getTypeName(aTypeID) typeSection = Section(typeName) benchSection.addSection(typeSection) - ## Add report for each compiler - allCompilers = getExistingCompiler(benchName,aTypeID) - for compiler in allCompilers: - #print(compiler) - nbElems = getNbElemsInBenchAndTypeAndCompilerCmd(benchName,compiler,aTypeID) - # Print test results for table, type, compiler - if nbElems > 0: - compilerName,version=getCompilerDesc(compiler) - compilerSection = Section("%s (%s)" % (compilerName,version)) - typeSection.addSection(compilerSection) - cols,vals=getColNamesAndData(benchName,compiler,aTypeID) - names=getTestNames(benchName,compiler,aTypeID) - formatTableByCore(compilerSection,names,cols,vals) - + if args.byc: + ## Add report for each core + allCores = getExistingCores(benchName,aTypeID) + for core in allCores: + #print(core) + nbElems = getNbElemsInBenchAndTypeAndCoreCmd(benchName,core,aTypeID) + # Print test results for table, type, compiler + if nbElems > 0: + coreName=getCoreDesc(core) + coreSection = Section("%s" % coreName) + typeSection.addSection(coreSection) + cols,vals=getColNamesAndDataForCore(benchName,core,aTypeID) + desc=(benchName,core,aTypeID,runid) + names=getTestNamesForCore(benchName,core,aTypeID) + formatTableBy(desc,['compiler','version'],['core'],coreSection,names,cols,vals) + else: + ## Add report for each compiler + allCompilers = getExistingCompiler(benchName,aTypeID) + for compiler in allCompilers: + #print(compiler) + nbElems = getNbElemsInBenchAndTypeAndCompilerCmd(benchName,compiler,aTypeID) + # Print test results for table, type, compiler + if nbElems > 0: + compilerName,version=getCompilerDesc(compiler) + compilerSection = Section("%s (%s)" % (compilerName,version)) + typeSection.addSection(compilerSection) + cols,vals=getColNamesAndDataForCompiler(benchName,compiler,aTypeID) + desc=(benchName,compiler,aTypeID,runid) + names=getTestNamesForCompiler(benchName,compiler,aTypeID) + formatTableBy(desc,['core'],['version','compiler'],compilerSection,names,cols,vals) + diff --git a/Testing/main.cpp b/Testing/main.cpp index 559b1c2a..37df76bf 100644 --- a/Testing/main.cpp +++ b/Testing/main.cpp @@ -1,10 +1,73 @@ -#include +#include #include "arm_math.h" extern int testmain(const char *); extern "C" const char *patternData; +//! \note for IAR +#ifdef __IS_COMPILER_IAR__ +# undef __IS_COMPILER_IAR__ +#endif +#if defined(__IAR_SYSTEMS_ICC__) +# define __IS_COMPILER_IAR__ 1 +#endif + + + + +//! \note for arm compiler 5 +#ifdef __IS_COMPILER_ARM_COMPILER_5__ +# undef __IS_COMPILER_ARM_COMPILER_5__ +#endif +#if ((__ARMCC_VERSION >= 5000000) && (__ARMCC_VERSION < 6000000)) +# define __IS_COMPILER_ARM_COMPILER_5__ 1 +#endif +//! @} + +//! \note for arm compiler 6 +#ifdef __IS_COMPILER_ARM_COMPILER_6__ +# undef __IS_COMPILER_ARM_COMPILER_6__ +#endif +#if ((__ARMCC_VERSION >= 6000000) && (__ARMCC_VERSION < 7000000)) +# define __IS_COMPILER_ARM_COMPILER_6__ 1 +#endif + +#ifdef __IS_COMPILER_LLVM__ +# undef __IS_COMPILER_LLVM__ +#endif +#if defined(__clang__) && !__IS_COMPILER_ARM_COMPILER_6__ +# define __IS_COMPILER_LLVM__ 1 +#else +//! \note for gcc +#ifdef __IS_COMPILER_GCC__ +# undef __IS_COMPILER_GCC__ +#endif +#if defined(__GNUC__) && !(__IS_COMPILER_ARM_COMPILER_6__ || __IS_COMPILER_LLVM__) +# define __IS_COMPILER_GCC__ 1 +#endif +//! @} +#endif +//! @} + +#if defined(ARMCM33_DSP_FP) && defined(__IS_COMPILER_GCC__) +extern "C" void _exit(int return_code); +#endif + int main() { - return(testmain(patternData)); + int r; + + r=testmain(patternData); + + /* + + Temporary solution to solve problems with IPSS support for M33. + + */ + + #if defined(ARMCM33_DSP_FP) && defined(__IS_COMPILER_GCC__) + _exit(r); + #endif + + return(r); } diff --git a/Testing/summaryBench.py b/Testing/summaryBench.py index 889170e9..a6352cec 100644 --- a/Testing/summaryBench.py +++ b/Testing/summaryBench.py @@ -55,6 +55,12 @@ def formatProd(a,b): return("%.3f" % b) return("%s * %.3f" % (a,b)) +def log2(x): + return(np.log2(x)) + +def log(x): + return(np.log(x)) + def summaryBenchmark(resultPath,elem,path): regressionPath=os.path.join(os.path.dirname(path),"regression.csv") @@ -77,7 +83,10 @@ def summaryBenchmark(resultPath,elem,path): def reg(d): m=d["CYCLES"].max() + #print( elem.params.formula) + results = smf.ols('CYCLES ~ ' + elem.params.formula, data=d).fit() + f=joinit([formatProd(a,b) for (a,b) in zip(results.params.index,results.params.values)]," + ") f="".join(f) f = re.sub(r':','*',f) diff --git a/Testing/testmain.cpp b/Testing/testmain.cpp index aecdb43f..e7e819dd 100644 --- a/Testing/testmain.cpp +++ b/Testing/testmain.cpp @@ -1,12 +1,14 @@ #include #include -#include + #include "TestDesc.h" -#include "Semihosting.h" +#if defined(EMBEDDED) #include "FPGA.h" +#else +#include "Semihosting.h" +#endif #include "IORunner.h" #include "ArrayMemory.h" -#include using namespace std; #ifdef BENCHMARK @@ -36,8 +38,11 @@ int testmain(const char *patterns) Client::ArrayMemory memory(memoryBuf,MEMSIZE); // There is also possibility of using "FPGA" io - //Client::Semihosting io("../TestDesc.txt","../Patterns","../Output","../Parameters"); - Client::FPGA io(testDesc,patterns); + #if defined(EMBEDDED) + Client::FPGA io(testDesc,patterns); + #else + Client::Semihosting io("../TestDesc.txt","../Patterns","../Output","../Parameters"); + #endif // Pattern Manager making the link between IO and Memory @@ -48,8 +53,12 @@ int testmain(const char *patterns) // An IO runner is driven by some IO // In future one may have a client/server runner driven // by a server running on a host. - //Client::IORunner runner(&io,&mgr,Testing::kTestAndDump); + #if defined(EMBEDDED) Client::IORunner runner(&io,&mgr,Testing::kTestOnly); + #else + // Works also in embedded but slower since data is dumped + Client::IORunner runner(&io,&mgr,Testing::kTestAndDump); + #endif // Root object containing all the tests diff --git a/Toolchain/GCC.cmake b/Toolchain/GCC.cmake index ebbe6c32..8d8068be 100644 --- a/Toolchain/GCC.cmake +++ b/Toolchain/GCC.cmake @@ -19,7 +19,7 @@ function(compilerSpecificCompileOptions PROJECTNAME ROOT) endif() if ((OPTIMIZED) AND (NOT DISABLEOPTIM)) - target_compile_options(${PROJECTNAME} PUBLIC "-O2") + target_compile_options(${PROJECTNAME} PUBLIC "-Ofast") endif() if (FASTMATHCOMPUTATIONS) @@ -40,15 +40,26 @@ function(compilerSpecificCompileOptions PROJECTNAME ROOT) endif() # Need to add other gcc config for other cortex-m cores + + if (ARM_CPU STREQUAL "cortex-m33" ) + target_compile_options(${PROJECTNAME} PUBLIC "-mfpu=fpv5-sp-d16") + target_link_options(${PROJECTNAME} PUBLIC "-mfpu=fpv5-sp-d16") + endif() + if (ARM_CPU STREQUAL "cortex-m7" ) - target_compile_options(${PROJECTNAME} PUBLIC "-march=armv7e-m;-mfpu=fpv5-d16") - target_link_options(${PROJECTNAME} PUBLIC "-march=armv7e-m;-mfpu=fpv5-d16") + target_compile_options(${PROJECTNAME} PUBLIC "-mfpu=fpv5-d16") + target_link_options(${PROJECTNAME} PUBLIC "-mfpu=fpv5-d16") endif() - if (ARM_CPU STREQUAL "cortex-m0" ) - target_compile_options(${PROJECTNAME} PUBLIC "-march=armv6-m") - target_link_options(${PROJECTNAME} PUBLIC "-march=armv6-m") + if (ARM_CPU STREQUAL "cortex-m4" ) + target_compile_options(${PROJECTNAME} PUBLIC "-mfpu=fpv4-sp-d16") + target_link_options(${PROJECTNAME} PUBLIC "-mfpu=fpv4-sp-d16") endif() + + #if (ARM_CPU STREQUAL "cortex-m0" ) + # target_compile_options(${PROJECTNAME} PUBLIC "") + # target_link_options(${PROJECTNAME} PUBLIC "") + #endif() if (ARM_CPU STREQUAL "cortex-a9" ) @@ -105,7 +116,11 @@ function(preprocessScatter CORE PLATFORMFOLDER SCATTERFILE) endfunction() function(toolchainSpecificLinkForCortexM PROJECTNAME ROOT CORE PLATFORMFOLDER HASCSTARTUP) - target_sources(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/Startup/GCC/startup_${CORE}.S) + if (HASCSTARTUP) + target_sources(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/Startup/GCC/startup_${CORE}.c) + else() + target_sources(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/Startup/GCC/startup_${CORE}.S) + endif() target_sources(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/Startup/GCC/support.c) target_include_directories(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/LinkScripts/GCC) @@ -165,6 +180,9 @@ function(compilerSpecificPlatformConfigAppForM PROJECTNAME ROOT) target_link_options(${PROJECTNAME} PRIVATE "--specs=nosys.specs") target_compile_options(${PROJECTNAME} PRIVATE "--specs=nosys.specs") endif() + + target_link_options(${PROJECTNAME} PUBLIC "-Wl,--gc-sections") + endfunction() function(compilerSpecificPlatformConfigAppForA PROJECTNAME ROOT) @@ -175,4 +193,6 @@ function(compilerSpecificPlatformConfigAppForA PROJECTNAME ROOT) target_link_options(${PROJECTNAME} PRIVATE "--specs=nosys.specs") target_compile_options(${PROJECTNAME} PRIVATE "--specs=nosys.specs") endif() + + endfunction() diff --git a/configBoot.cmake b/configBoot.cmake index 2a22665c..80486dd3 100755 --- a/configBoot.cmake +++ b/configBoot.cmake @@ -56,11 +56,7 @@ function(configboot PROJECT_NAME ROOT PLATFORMFOLDER) # # C startup for M55 boot code if (${PLATFORMID} STREQUAL "IPSS") - if (GCC) - cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} OFF) - else() cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} ON) - endif() else() if (ARM_CPU MATCHES "^[cC]ortex-[mM]55([^0-9].*)?$") cortexm(${CORE} ${PROJECT_NAME} ${ROOT} ${PLATFORMFOLDER} ON) diff --git a/configPlatform.cmake b/configPlatform.cmake index 5427a4f9..770c40f0 100644 --- a/configPlatform.cmake +++ b/configPlatform.cmake @@ -1,4 +1,4 @@ -option(SEMIHOSTING "Test trace using printf" ON) +option(SEMIHOSTING "Test trace using printf" OFF) if (PLATFORM STREQUAL "FVP") SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/FVP) diff --git a/gcc.cmake b/gcc.cmake index 80949eb1..81a75309 100644 --- a/gcc.cmake +++ b/gcc.cmake @@ -48,10 +48,10 @@ if(NOT ARM_CPU) ) endif(NOT ARM_CPU) -SET(CMAKE_C_FLAGS "-g -ffunction-sections -fdata-sections -mcpu=${ARM_CPU}" CACHE INTERNAL "C compiler common flags") -SET(CMAKE_CXX_FLAGS "-g -ffunction-sections -fdata-sections -mcpu=${ARM_CPU}" CACHE INTERNAL "C compiler common flags") +SET(CMAKE_C_FLAGS "-ffunction-sections -fdata-sections -mcpu=${ARM_CPU}" CACHE INTERNAL "C compiler common flags") +SET(CMAKE_CXX_FLAGS "-ffunction-sections -fdata-sections -mcpu=${ARM_CPU}" CACHE INTERNAL "C compiler common flags") SET(CMAKE_ASM_FLAGS "-mcpu=${ARM_CPU}" CACHE INTERNAL "ASM compiler common flags") -#SET(CMAKE_EXE_LINKER_FLAGS "--specs=nosys.specs" CACHE INTERNAL "linker flags") +SET(CMAKE_EXE_LINKER_FLAGS "-mcpu=${ARM_CPU}" CACHE INTERNAL "linker flags") get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE) if(IS_IN_TRY_COMPILE)