updated DSP Lib to V1.5.0.

pull/19/head
Martin Günther 10 years ago
parent 76d02e9f1a
commit adbc210886

@ -136,7 +136,7 @@ typedef struct ARR_DESC_struct
(arr_desc_ptr)->underlying_size, \
bytes) \
); \
} while(0)
} while (0)
/**
* Perform a memcpy of 'bytes' bytes from the source #ARR_DESC_t to the
@ -150,7 +150,7 @@ typedef struct ARR_DESC_struct
BOUND(0, \
(arr_desc_dest_ptr)->underlying_size, \
bytes)); \
} while(0)
} while (0)
/**
* Evaluate to true if the source #ARR_DESC_t contents will fit into the
@ -170,7 +170,7 @@ typedef struct ARR_DESC_struct
#define ARR_DESC_COPY(arr_desc_dest_ptr, arr_desc_src_ptr) \
do \
{ \
if(ARR_DESC_COPYABLE(arr_desc_dest_ptr, \
if (ARR_DESC_COPYABLE(arr_desc_dest_ptr, \
arr_desc_src_ptr)) \
{ \
ARR_DESC_MEMCPY(arr_desc_dest_ptr, \
@ -182,7 +182,7 @@ typedef struct ARR_DESC_struct
(arr_desc_dest_ptr)->element_size = \
(arr_desc_src_ptr)->element_size; \
} \
} while(0)
} while (0)
/**
* Compare the data in two #ARR_DESC_t structs for the specified number of

@ -41,7 +41,7 @@ extern const char * JTEST_CYCLE_STRF;
STR(fn_call), \
(JTEST_SYSTICK_INITIAL_VALUE - \
__jtest_cycle_end_count)); \
} while(0)
} while (0)
*/
#define JTEST_COUNT_CYCLES(fn_call) \
do \
@ -60,6 +60,6 @@ extern const char * JTEST_CYCLE_STRF;
JTEST_DUMP_STRF(JTEST_CYCLE_STRF, \
(JTEST_SYSTICK_INITIAL_VALUE - \
__jtest_cycle_end_count)); \
} while(0)
} while (0)
#endif /* _JTEST_CYCLE_H_ */

@ -97,7 +97,7 @@ typedef struct JTEST_FW_struct
do \
{ \
JTEST_FW.str_buffer = JTEST_FW_STR_BUFFER; \
} while(0)
} while (0)
/* Debugger Action-triggering Macros */
/*--------------------------------------------------------------------------------*/
@ -109,7 +109,7 @@ typedef struct JTEST_FW_struct
do \
{ \
action_name(); \
} while(0)
} while (0)
/**
* Trigger the "Test Start" action in the Keil Debugger.
@ -147,7 +147,7 @@ typedef struct JTEST_FW_struct
JTEST_CLEAR_BUFFER(buf_name); \
strcpy(JTEST_FW.buf_name, (value)); \
JTEST_TRIGGER_ACTION(action); \
} while(0)
} while (0)
/**
* Trigger the "Exit Framework" action in the Keil Debugger.
@ -156,7 +156,7 @@ typedef struct JTEST_FW_struct
do \
{ \
JTEST_TRIGGER_ACTION(exit_fw); \
} while(0)
} while (0)
/* Buffer Manipulation Macros */
@ -169,7 +169,7 @@ typedef struct JTEST_FW_struct
do \
{ \
memset(JTEST_FW.buf_name, 0, JTEST_BUF_SIZE); \
} while(0)
} while (0)
/**
* Clear the memory needed for the JTEST_FW's string buffer.
@ -198,7 +198,7 @@ typedef struct JTEST_FW_struct
JTEST_CLEAR_STR_BUFFER(); \
sprintf(JTEST_FW.str_buffer,format_str, __VA_ARGS__); \
jtest_dump_str_segments(); \
} while(0)
} while (0)
/* Pass/Fail Macros */
/*--------------------------------------------------------------------------------*/
@ -228,7 +228,7 @@ typedef struct JTEST_FW_struct
do \
{ \
JTEST_CURRENT_GROUP_PTR() = group_ptr; \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/
/* Declare Global Variables */

@ -61,6 +61,6 @@ typedef struct JTEST_GROUP_struct
{ \
JTEST_PF_RESET_PASSED(group_ptr); \
JTEST_PF_RESET_FAILED(group_ptr); \
} while(0)
} while (0)
#endif /* _JTEST_GROUP_H_ */

@ -22,7 +22,7 @@
JTEST_DUMP_STR("Group Name:\n"); \
JTEST_DUMP_STR(JTEST_GROUP_STRUCT_NAME(group_fn).name_str); \
JTEST_GROUP_STRUCT_NAME(group_fn).group_fn_ptr(); \
} while(0)
} while (0)
/**
@ -42,7 +42,7 @@
(group_ptr)->passed); \
JTEST_GROUP_INC_FAILED(parent_group_ptr, \
(group_ptr)->failed); \
} while(0)
} while (0)
/**
* Update the #JTEST_FW's pass/fail information using the current
@ -53,7 +53,7 @@
{ \
JTEST_FW_INC_PASSED((group_ptr)->passed); \
JTEST_FW_INC_FAILED((group_ptr)->failed); \
} while(0)
} while (0)
/**
* Update the enclosing context with the current #JTEST_GROUP_t's pass/fail
@ -74,7 +74,7 @@
JTEST_GROUP_UPDATE_FW_PF( \
group_ptr); \
} \
} while(0)
} while (0)
/**
* Dump the results of running the #JTEST_GROUP_t to the Keil Debugger.
@ -90,7 +90,7 @@
(group_ptr)->passed + (group_ptr)->failed, \
(group_ptr)->passed, \
(group_ptr)->failed); \
} while(0)
} while (0)
/**
* Call the #JTEST_GROUP_t associated with the identifier group_fn.
@ -121,6 +121,6 @@
\
/* Restore the previously current group */ \
JTEST_SET_CURRENT_GROUP(__jtest_temp_group_ptr); \
} while(0)
} while (0)
#endif /* _JTEST_GROUP_CALL_H_ */

@ -38,7 +38,7 @@
do \
{ \
((struct_pf_ptr)->xxx) += (amount); \
} while(0)
} while (0)
/**
* Specialization of the #JTEST_PF_INC_XXX macro to increment the passed
@ -68,7 +68,7 @@
do \
{ \
((struct_pf_ptr)->xxx) = UINT32_C(0); \
} while(0)
} while (0)
/**
* Specialization of #JTEST_PF_RESET_XXX for the 'passed' member.

@ -101,7 +101,7 @@
\
/* Disable the SysTick module. */ \
(systick_ptr)->CTRL = UINT32_C(0x000000); \
} while(0)
} while (0)
/**
* Start the SysTick timer, sourced by the processor clock.
@ -112,7 +112,7 @@
(systick_ptr)->CTRL = \
SysTick_CTRL_ENABLE_Msk | \
SysTick_CTRL_CLKSOURCE_Msk; /* Internal clk*/ \
} while(0)
} while (0)
/**
* Evaluate to the current value of the SysTick timer.

@ -77,7 +77,7 @@ typedef struct JTEST_TEST_struct
do \
{ \
JTEST_TEST_FLAG(jtest_test_ptr, flag_name) = JTEST_TEST_FLAG_##xxx ; \
} while(0)
} while (0)
/**
* Specification of #JTEST_TEST_XXX_FLAG to set #JTEST_TEST_t flags.

@ -24,7 +24,7 @@
JTEST_DUMP_STR("Function Under Test:\n"); \
JTEST_DUMP_STR(JTEST_TEST_STRUCT_NAME(test_fn).fut_str); \
retval = JTEST_TEST_STRUCT_NAME(test_fn).test_fn_ptr(); \
} while(0)
} while (0)
/**
* Update the enclosing #JTEST_GROUP_t's pass/fail information based on
@ -45,7 +45,7 @@
} else { \
JTEST_GROUP_INC_FAILED(JTEST_CURRENT_GROUP_PTR(), 1); \
} \
} while(0)
} while (0)
/**
* Update the #JTEST_FW with pass/fail information based on test_retval.
@ -62,7 +62,7 @@
} else { \
JTEST_FW_INC_FAILED(1); \
} \
} while(0)
} while (0)
/**
* Update the enclosing JTEST_GROUP_t's pass/fail information, or the
@ -74,13 +74,13 @@
do \
{ \
/* Update pass-fail information */ \
if(JTEST_CURRENT_GROUP_PTR() /* Non-null */) \
if (JTEST_CURRENT_GROUP_PTR() /* Non-null */) \
{ \
JTEST_TEST_UPDATE_PARENT_GROUP_PF(test_retval); \
} else { \
JTEST_TEST_UPDATE_FW_PF(test_retval); \
} \
} while(0)
} while (0)
/**
* Dump the results of the test to the Keil Debugger.
@ -94,7 +94,7 @@
} else { \
JTEST_DUMP_STR("Test Failed\n"); \
} \
} while(0)
} while (0)
/**
* Call the #JTEST_TEST_t assocaited with the identifier test_fn.
@ -116,6 +116,6 @@
JTEST_TEST_DUMP_RESULTS(__jtest_test_ret); \
JTEST_ACT_TEST_END(); \
} \
} while(0)
} while (0)
#endif /* _JTEST_TEST_CALL_H_ */

@ -22,6 +22,6 @@
do \
{ \
(struct_ptr)->attribute = (value); \
} while(0)
} while (0)
#endif /* _JTEST_UTIL_H_ */

@ -17,10 +17,10 @@ void jtest_dump_str_segments(void)
{
JTEST_TRIGGER_ACTION(dump_str);
if(seg_idx < JTEST_STR_MAX_OUTPUT_SEGMENTS)
if (seg_idx < JTEST_STR_MAX_OUTPUT_SEGMENTS)
{
memmove_idx = 0;
while(memmove_idx < (seg_cnt - seg_idx -1) )
while (memmove_idx < (seg_cnt - seg_idx -1) )
{
memmove(
JTEST_FW.str_buffer+

@ -45,7 +45,7 @@
output_type, \
BASIC_MATH_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)
/**
@ -65,7 +65,7 @@
output_type, \
BASIC_MATH_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)

@ -28,7 +28,7 @@
do \
{ \
COMPLEX_MATH_COMPARE_RE_INTERFACE(block_size * 2, output_type); \
} while(0)
} while (0)
/*
@ -65,7 +65,7 @@
output_type, \
COMPLEX_MATH_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)
/**
* Specification of #COMPLEX_MATH_SNR_COMPARE_INTERFACE() for real outputs.
@ -101,7 +101,7 @@
COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size, \
output_type, \
b); \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/

@ -36,7 +36,7 @@
output_type, \
CONTROLLER_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/

@ -36,7 +36,7 @@
output_type, \
FAST_MATH_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/

@ -45,7 +45,7 @@
output_type, \
FILTERING_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)
/**
* Compare reference and fut outputs starting at some offset using SNR.
@ -61,7 +61,7 @@
block_size, \
FILTERING_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */

@ -35,7 +35,7 @@
output_type, \
INTRINSICS_SNR_THRESHOLD_##output_type##_t \
); \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/

@ -44,7 +44,7 @@
output_content_type, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
} while (0)
/**
* Compare the outputs from the function under test and the reference
@ -60,7 +60,7 @@
((output_type *) &matrix_output_ref)->numCols, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
@ -169,7 +169,7 @@
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
} while(0)
} while (0)
#define MATRIX_TEST_CONFIG_MULTIPLICATIVE_OUTPUT(input_type, \
matrix_a_ptr, \
@ -184,7 +184,7 @@
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
} while(0)
} while (0)
#define MATRIX_TEST_CONFIG_SAMESIZE_OUTPUT(input_type, \
matrix_ptr) \
@ -198,7 +198,7 @@
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numCols; \
} while(0)
} while (0)
#define MATRIX_TEST_CONFIG_TRANSPOSE_OUTPUT(input_type, \
matrix_ptr) \
@ -212,7 +212,7 @@
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numRows; \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
@ -235,7 +235,7 @@
(int)input->numRows, \
(int)input->numCols); \
\
if(dim_validation_interface(input_type, \
if (dim_validation_interface(input_type, \
input)) { \
output_config_interface(input_type, \
input); \
@ -252,12 +252,12 @@
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
if ( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
#define MATRIX_TEST_TEMPLATE_ELT2(arr_desc_inputs_a, \
@ -284,7 +284,7 @@
(int)input_b->numRows, \
(int)input_b->numCols); \
\
if(dim_validation_interface(input_type, \
if (dim_validation_interface(input_type, \
input_a, \
input_b)) { \
\
@ -305,12 +305,12 @@
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
if ( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT2() for matrix tests.

@ -1,368 +0,0 @@
#ifndef _MATRIX_TEMPLATES_H_
#define _MATRIX_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the outputs from the function under test and the reference
* function.
*/
#define MATRIX_COMPARE_INTERFACE(output_type, output_content_type) \
TEST_ASSERT_BUFFERS_EQUAL( \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols * \
sizeof(output_content_type))
/**
* Comparison SNR thresholds for the data types used in matrix_tests.
*/
#define MATRIX_SNR_THRESHOLD 120
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define MATRIX_SNR_COMPARE_INTERFACE(output_type, output_content_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
(float32_t *)matrix_output_f32_ref, \
((output_type *) &matrix_output_ref)->pData, \
(float32_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
output_content_type, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
/**
* Compare the outputs from the function under test and the reference
* function using SNR. This is special for float64_t
*/
#define MATRIX_DBL_SNR_COMPARE_INTERFACE(output_type) \
do \
{ \
TEST_ASSERT_DBL_SNR( \
(float64_t *)matrix_output_f32_ref, \
(float64_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
/*--------------------------------------------------------------------------------*/
/* Dimension Validation Interfaces */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_VALID_ADDITIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
((((input_type) (matrix_a_ptr))->numRows == \
((input_type) (matrix_b_ptr))->numRows) && \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numCols))
#define MATRIX_TEST_VALID_MULTIPLICATIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numRows)
#define MATRIX_TEST_VALID_SQUARE_DIMENSIONS(input_type, \
matrix_ptr) \
(((input_type)(matrix_ptr))->numRows == \
((input_type)(matrix_ptr))->numCols)
#define MATRIX_TEST_VALID_DIMENSIONS_ALWAYS(input_type, \
matrix_ptr) \
(1 == 1) \
/*--------------------------------------------------------------------------------*/
/* Output Configuration Interfaces */
/*--------------------------------------------------------------------------------*/
/* The matrix tests assume the output matrix is always the correct size. These
* interfaces size the properly size the output matrices according to the input
* matrices and the operation at hand.*/
#define MATRIX_TEST_CONFIG_ADDITIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_MULTIPLICATIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_SAMESIZE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_TRANSPOSE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numRows; \
} while(0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_TEMPLATE_ELT1(arr_desc_inputs, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_idx, input_type, input, arr_desc_inputs \
, \
JTEST_DUMP_STRF("Matrix Dimensions: %dx%d\n", \
(int)input->numRows, \
(int)input->numCols); \
\
if(dim_validation_interface(input_type, \
input)) { \
output_config_interface(input_type, \
input); \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input), \
ref, ref_arg_interface(input)); \
compare_interface(output_type, \
output_content_type); \
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, \
fut_arg_interface(input)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
#define MATRIX_TEST_TEMPLATE_ELT2(arr_desc_inputs_a, \
arr_desc_inputs_b, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_a_idx, input_type, input_a, arr_desc_inputs_a \
, \
input_type input_b = ARR_DESC_ELT( \
input_type, input_a_idx, \
&(arr_desc_inputs_b)); \
\
if(dim_validation_interface(input_type, \
input_a, \
input_b)) { \
\
output_config_interface(input_type, \
input_a, \
input_b); \
\
JTEST_DUMP_STRF("Matrix Dimensions: %dx%d\n", \
(int)input_a->numRows, \
(int)input_a->numCols); \
\
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input_a, input_b), \
ref, ref_arg_interface(input_a, input_b)); \
\
compare_interface(output_type, output_content_type); \
\
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, fut_arg_interface(input_a, input_b)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT2() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT2(fn_name, suffix, \
output_config_interface, \
dim_validation_interface, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT2( \
matrix_##suffix##_a_inputs, \
matrix_##suffix##_b_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
comparison_interface); \
} \
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT1() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT1(fn_name, suffix, \
output_config_interface, \
dim_validation_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT1( \
matrix_##suffix##_a_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
MATRIX_COMPARE_INTERFACE); \
} \
#endif /* _MATRIX_TEMPLATES_H_ */

@ -1,370 +0,0 @@
#ifndef _MATRIX_TEMPLATES_H_
#define _MATRIX_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the outputs from the function under test and the reference
* function.
*/
#define MATRIX_COMPARE_INTERFACE(output_type, output_content_type) \
TEST_ASSERT_BUFFERS_EQUAL( \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols * \
sizeof(output_content_type))
/**
* Comparison SNR thresholds for the data types used in matrix_tests.
*/
#define MATRIX_SNR_THRESHOLD 120
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define MATRIX_SNR_COMPARE_INTERFACE(output_type, output_content_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
(float32_t *)matrix_output_f32_ref, \
((output_type *) &matrix_output_ref)->pData, \
(float32_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
output_content_type, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
/**
* Compare the outputs from the function under test and the reference
* function using SNR. This is special for float64_t
*/
#define MATRIX_DBL_SNR_COMPARE_INTERFACE(output_type) \
do \
{ \
TEST_ASSERT_DBL_SNR( \
(float64_t *)matrix_output_f32_ref, \
(float64_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
/*--------------------------------------------------------------------------------*/
/* Dimension Validation Interfaces */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_VALID_ADDITIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
((((input_type) (matrix_a_ptr))->numRows == \
((input_type) (matrix_b_ptr))->numRows) && \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numCols))
#define MATRIX_TEST_VALID_MULTIPLICATIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numRows)
#define MATRIX_TEST_VALID_SQUARE_DIMENSIONS(input_type, \
matrix_ptr) \
(((input_type)(matrix_ptr))->numRows == \
((input_type)(matrix_ptr))->numCols)
#define MATRIX_TEST_VALID_DIMENSIONS_ALWAYS(input_type, \
matrix_ptr) \
(1 == 1) \
/*--------------------------------------------------------------------------------*/
/* Output Configuration Interfaces */
/*--------------------------------------------------------------------------------*/
/* The matrix tests assume the output matrix is always the correct size. These
* interfaces size the properly size the output matrices according to the input
* matrices and the operation at hand.*/
#define MATRIX_TEST_CONFIG_ADDITIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_MULTIPLICATIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_SAMESIZE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_TRANSPOSE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numRows; \
} while(0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_TEMPLATE_ELT1(arr_desc_inputs, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_idx, input_type, input, arr_desc_inputs \
, \
JTEST_DUMP_STRF("Matrix Dimensions: %dx%d\n", \
(int)input->numRows, \
(int)input->numCols); \
\
if(dim_validation_interface(input_type, \
input)) { \
output_config_interface(input_type, \
input); \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input), \
ref, ref_arg_interface(input)); \
compare_interface(output_type, \
output_content_type); \
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, \
fut_arg_interface(input)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
#define MATRIX_TEST_TEMPLATE_ELT2(arr_desc_inputs_a, \
arr_desc_inputs_b, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_a_idx, input_type, input_a, arr_desc_inputs_a \
, \
input_type input_b = ARR_DESC_ELT( \
input_type, input_a_idx, \
&(arr_desc_inputs_b)); \
\
if(dim_validation_interface(input_type, \
input_a, \
input_b)) { \
\
output_config_interface(input_type, \
input_a, \
input_b); \
\
JTEST_DUMP_STRF("Matrix Dimensions: A %dx%d B %dx%d\n",\
(int)input_a->numRows, \
(int)input_a->numCols, \
(int)input_b->numRows, \
(int)input_b->numCols); \
\
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input_a, input_b), \
ref, ref_arg_interface(input_a, input_b)); \
\
compare_interface(output_type, output_content_type); \
\
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, fut_arg_interface(input_a, input_b)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT2() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT2(fn_name, suffix, \
output_config_interface, \
dim_validation_interface, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT2( \
matrix_##suffix##_a_inputs, \
matrix_##suffix##_b_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
comparison_interface); \
} \
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT1() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT1(fn_name, suffix, \
output_config_interface, \
dim_validation_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT1( \
matrix_##suffix##_a_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
MATRIX_COMPARE_INTERFACE); \
} \
#endif /* _MATRIX_TEMPLATES_H_ */

@ -26,7 +26,7 @@
TEST_ASSERT_EQUAL( \
statistics_idx_fut, \
statistics_idx_ref); \
} while(0) \
} while (0) \
/*
* Comparison SNR thresholds for the data types used in statistics_tests.
@ -54,7 +54,7 @@
output_type, \
STATISTICS_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)

@ -22,7 +22,7 @@
support_output_ref.data_ptr, \
support_output_fut.data_ptr, \
block_size * sizeof(output_type)); \
} while(0) \
} while (0) \
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */

@ -15,7 +15,7 @@
loop_def { \
body; \
} \
} while(0)
} while (0)
/**
* Template for looping over an array-like sequence.
@ -31,7 +31,7 @@
for(iter_idx = 0; iter_idx < (arr_length); ++iter_idx), \
iter_elem_setup; \
body); \
} while(0)
} while (0)
/**
* Template for looping over the contents of an array.
@ -43,7 +43,7 @@
iter_idx, type, arr, arr_length, \
type iter_elem = (arr)[iter_idx], \
body); \
} while(0)
} while (0)
/**
* Template for looping over the contents of an #ARR_DESC.
@ -55,7 +55,7 @@
iter_idx, type, arr_desc, (arr_desc).element_count, \
type iter_elem = ARR_DESC_ELT(type, iter_idx, &(arr_desc)), \
body); \
} while(0)
} while (0)
/*--------------------------------------------------------------------------------*/
/* Test Definition */
@ -70,7 +70,7 @@
setup; \
body; \
teardown; \
} while(0)
} while (0)
/**
* Template for calling a function.

@ -45,7 +45,7 @@
do { \
TEST_CALL_FUT(fut, fut_args); \
TEST_CALL_REF(ref, ref_args); \
} while(0)
} while (0)
/**
* This macro eats a variable number of arguments and evaluates to a null
@ -69,7 +69,7 @@
{ \
return JTEST_TEST_FAILED; \
} \
} while(0)
} while (0)
/**
* Assert that the two entities are equal.
@ -81,7 +81,7 @@
{ \
return JTEST_TEST_FAILED; \
} \
} while(0)
} while (0)
/**
* Convert elements to from src_type to float.
@ -93,7 +93,7 @@
src_ptr, \
dst_ptr, \
block_size); \
} while(0) \
} while (0) \
/**
* Convert elements to from float to dst_type .
@ -105,7 +105,7 @@
src_ptr, \
dst_ptr, \
block_size); \
} while(0) \
} while (0) \
/**
* Assert that the SNR between a reference and test sample is above a given
@ -115,12 +115,12 @@
do \
{ \
float32_t snr = arm_snr_f32(ref_ptr, tst_ptr, block_size); \
if( snr <= threshold) \
if ( snr <= threshold) \
{ \
JTEST_DUMP_STRF("SNR: %f\n", snr); \
return JTEST_TEST_FAILED; \
} \
} while(0) \
} while (0) \
/**
* Assert that the SNR between a reference and test sample is above a given
@ -130,12 +130,12 @@
do \
{ \
float64_t snr = arm_snr_f64(ref_ptr, tst_ptr, block_size); \
if( snr <= threshold) \
if ( snr <= threshold) \
{ \
JTEST_DUMP_STRF("SNR: %f\n", snr); \
return JTEST_TEST_FAILED; \
} \
} while(0) \
} while (0) \
/**
* Compare test and reference elements by converting to float and
@ -163,7 +163,7 @@
tst_dst_ptr, \
block_size, \
threshold); \
} while(0)
} while (0)
/**
* Execute statements only if the combination of block size, function type
@ -178,13 +178,13 @@
input_arr_desc, body) \
do \
{ \
if(block_size * sizeof(fn_type_spec) <= \
if (block_size * sizeof(fn_type_spec) <= \
ARR_DESC_BYTES(input_arr_desc)) \
{ \
JTEST_DUMP_STRF("Block Size: %"PRIu32"\n", block_size); \
body; \
} \
} while(0) \
} while (0) \
/**
* Template for tests that rely on one input buffer and a blocksize parameter.
@ -224,7 +224,7 @@
\
return JTEST_TEST_PASSED; \
\
} while(0)
} while (0)
/**
* Template for tests that rely on an input buffer and an element.
@ -253,7 +253,7 @@
\
compare_interface(output_type))); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
/**
* Template for tests that rely on an input buffer, an element, and a blocksize
@ -289,7 +289,7 @@
input_data_ptr, elt, block_size)); \
compare_interface(block_size, output_type))))); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
/**
* Template for tests that rely on an input buffer, two elements, and a blocksize
@ -329,7 +329,7 @@
input_data_ptr, elt1, elt2, block_size)); \
compare_interface(block_size, output_type)))))); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
/**
* Template for tests that rely on two input buffers and a blocksize parameter.
@ -368,7 +368,7 @@
\
compare_interface(block_size, output_type)))); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
/**
* Test template that uses a single element.
@ -392,7 +392,7 @@
/* a block_size. Pass a dummy value 1.*/ \
compare_interface(1, output_type)); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
/**
* Test template that iterates over two sets of elements in parallel.
@ -424,7 +424,7 @@
/* a block_size. Pass a dummy value 1.*/ \
compare_interface(1, output_type)); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
/**
* Test template that uses an element and a block size.
@ -453,6 +453,6 @@
elt, block_size)); \
compare_interface(block_size, output_type))); \
return JTEST_TEST_PASSED; \
} while(0)
} while (0)
#endif /* _TEST_TEMPLATES_H_ */

@ -40,7 +40,7 @@
output_type, \
TRANSFORM_SNR_THRESHOLD_##output_type \
); \
} while(0)
} while (0)
/**
* Compare the outputs from the function under test and the reference
@ -59,7 +59,7 @@
output_type, \
DCT4_TRANSFORM_SNR_THRESHOLD_##output_type \
); \
} while(0) \
} while (0) \
/**
* Specialization on #TRANSFORM_SNR_COMPARE_INTERFACE() to fix the block_size
@ -88,7 +88,7 @@
transform_fft_input_ref, \
input_ptr, \
bytes); \
} while(0)
} while (0)
/**
* This macro copys data from the input_ptr into input arrays. It also creates
@ -128,7 +128,7 @@
transform_fft_input_ref, \
transform_fft_input_fut, \
bytes * 2); \
} while(0)
} while (0)
/**
* This macro copys data from the input_ptr into the in-place input arrays.
@ -154,7 +154,7 @@
for(i=0;i<bytes/sizeof(type);i++) { \
*((type*)transform_fft_inplace_input_fut + i) >>= 1; \
*((type*)transform_fft_inplace_input_ref + i) >>= 1;} \
} while(0)
} while (0)
/**
* This macro copys data from the input_ptr into the in-place input arrays.
@ -175,7 +175,7 @@
transform_fft_inplace_input_ref, \
input_ptr, \
bytes); \
} while(0)
} while (0)
#endif /* _TRANSFORM_TEMPLATES_H_ */

@ -12,8 +12,17 @@
ARR_DESC_DEFINE(float32_t,
arm_sin_cos_degrees_f32,
9,
CURLY(0 , 17, 45, 90,
180, 360, 362, -73, -191.111));
CURLY(
0,
17,
45,
90,
180,
360,
362,
-73,
-191.111
));
/* The Q31 version of the function maps numbers in the range [-1, 0.9999999]
* to degrees in the range [-180, 179]*/
@ -28,7 +37,7 @@ ARR_DESC_DEFINE(q31_t,
0xf7badafa,
0x285954a1,
0xb9d09511
));
));
/*--------------------------------------------------------------------------------*/
/* Output Variables */
@ -49,7 +58,7 @@ float32_t cos_val_ref = 0;
Function to test correctness of sin_cos output by comparing it with reference library
*/
#define COMPARISON_INTERFACE(type, threshold) \
if( (ABS((type) sin_val_ref - (type) sin_val_fut) > \
if ( (ABS((type) sin_val_ref - (type) sin_val_fut) > \
(type) threshold ) || \
(ABS((type) cos_val_ref - (type) cos_val_fut) > \
(type) threshold)) \

@ -128,7 +128,7 @@
TEMPLATE_DO_ARR_DESC( \
M_idx, uint8_t, M, filtering_Ms \
, \
if(blockSize % M == 0) \
if (blockSize % M == 0) \
{ \
/* Display test parameter values */ \
JTEST_DUMP_STRF("Block Size: %d\n" \

@ -23,5 +23,5 @@ int main(void)
JTEST_GROUP_CALL(all_tests); /* Run all tests. */
JTEST_ACT_EXIT_FW(); /* Exit test framework. */
while(1); /* Never return. */
while (1); /* Never return. */
}

@ -62,7 +62,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pRef[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -71,7 +71,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pTest[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -83,7 +83,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&EnergyError);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -111,7 +111,7 @@ double arm_snr_f64(double *pRef, double *pTest, uint32_t buffSize)
test = (int *)(&pRef[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -120,7 +120,7 @@ double arm_snr_f64(double *pRef, double *pTest, uint32_t buffSize)
test = (int *)(&pTest[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -132,7 +132,7 @@ double arm_snr_f64(double *pRef, double *pTest, uint32_t buffSize)
test = (int *)(&EnergyError);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -209,7 +209,7 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -237,7 +237,7 @@ uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -478,11 +478,11 @@ void arm_clip_f32 (float *pIn, uint32_t numSamples)
for (i = 0; i < numSamples; i++)
{
if(pIn[i] > 1.0f)
if (pIn[i] > 1.0f)
{
pIn[i] = 1.0;
}
else if( pIn[i] < -1.0f)
else if ( pIn[i] < -1.0f)
{
pIn[i] = -1.0;
}

@ -16,7 +16,7 @@ JTEST_DEFINE_TEST(arm_mat_inverse_f32_test, arm_mat_inverse_f32)
(int)mat_ptr->numRows,
(int)mat_ptr->numCols);
if(MATRIX_TEST_VALID_SQUARE_DIMENSIONS(arm_matrix_instance_f32 *, mat_ptr))
if (MATRIX_TEST_VALID_SQUARE_DIMENSIONS(arm_matrix_instance_f32 *, mat_ptr))
{
MATRIX_TEST_CONFIG_SAMESIZE_OUTPUT(arm_matrix_instance_f32 *, mat_ptr);
@ -52,7 +52,7 @@ JTEST_DEFINE_TEST(arm_mat_inverse_f64_test, arm_mat_inverse_f64)
(int)mat_ptr->numRows,
(int)mat_ptr->numCols);
if(MATRIX_TEST_VALID_SQUARE_DIMENSIONS(arm_matrix_instance_f64 *, mat_ptr))
if (MATRIX_TEST_VALID_SQUARE_DIMENSIONS(arm_matrix_instance_f64 *, mat_ptr))
{
MATRIX_TEST_CONFIG_SAMESIZE_OUTPUT(arm_matrix_instance_f64 *, mat_ptr);

@ -32,7 +32,7 @@
&rfft_inst_ref, \
(uint32_t) fftlen, ifft_flag, 1u); \
\
if(ifft_flag) \
if (ifft_flag) \
{ \
TRANSFORM_PREPARE_INVERSE_INPUTS( \
transform_fft_##suffix##_inputs, \

@ -75,7 +75,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>0</IsCurrentTarget>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@ -118,7 +118,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O143 -S0 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA01477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA01477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -304,7 +304,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -475,7 +475,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -631,7 +631,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -807,7 +807,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
<Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -817,7 +817,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -978,7 +978,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
<Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -988,7 +988,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -1144,7 +1144,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -1277,7 +1277,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
<IsCurrentTarget>0</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@ -1320,7 +1320,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2V8M</Key>
<Name>-UP0003JBE -O206 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BF11477) -L00(0) -TO0 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O142 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA05477) -L00(4) -TO0 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>

@ -75,7 +75,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>0</IsCurrentTarget>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@ -475,7 +475,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -588,7 +588,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
<IsCurrentTarget>0</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@ -631,7 +631,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -807,7 +807,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
<Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -817,7 +817,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -973,12 +973,12 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
<Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -1144,7 +1144,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
<Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -1154,7 +1154,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=2313,171,2547,708,0)(1012=-1,-1,-1,-1,0)</Name>
<Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>

@ -262,7 +262,7 @@
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs>
<IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -986,7 +986,7 @@
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs>
<IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -1710,7 +1710,7 @@
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs>
<IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -3158,7 +3158,7 @@
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs>
<IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -3882,7 +3882,7 @@
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs>
<IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -4606,7 +4606,7 @@
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs>
<IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections -mfpu=fpv5-d16 -mfloat-abi=hard</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>

@ -29,7 +29,7 @@ void ref_scale_q31(
for(i=0;i<blockSize;i++)
{
temp = ((q63_t) pSrc[i] * scaleFract) >> 32;
if(sign)
if (sign)
pDst[i] = temp >> -kShift;
else
pDst[i] = ref_sat_q31( (q63_t)temp << kShift );

@ -8,7 +8,7 @@ void ref_shift_q31(
{
uint32_t i;
if(shiftBits < 0)
if (shiftBits < 0)
{
for(i=0;i<blockSize;i++)
{
@ -32,7 +32,7 @@ void ref_shift_q15(
{
uint32_t i;
if(shiftBits < 0)
if (shiftBits < 0)
{
for(i=0;i<blockSize;i++)
{
@ -56,7 +56,7 @@ void ref_shift_q7(
{
uint32_t i;
if(shiftBits < 0)
if (shiftBits < 0)
{
for(i=0;i<blockSize;i++)
{

@ -57,7 +57,7 @@ q15_t ref_pid_q15(
q15_t out;
q15_t A1, A2;
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
#ifndef ARM_MATH_BIG_ENDIAN
A2 = S->A1 >> 16;

@ -31,7 +31,7 @@ void ref_biquad_cascade_df2T_f32(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn = *pIn++;
@ -66,7 +66,7 @@ void ref_biquad_cascade_df2T_f32(
/* decrement the loop counter */
stage--;
} while(stage > 0u);
} while (stage > 0u);
}
@ -103,7 +103,7 @@ void ref_biquad_cascade_stereo_df2T_f32(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn1a = *pIn++; //Channel a
@ -145,7 +145,7 @@ void ref_biquad_cascade_stereo_df2T_f32(
/* decrement the loop counter */
stage--;
} while(stage > 0u);
} while (stage > 0u);
}
@ -180,7 +180,7 @@ void ref_biquad_cascade_df2T_f64(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn = *pIn++;
@ -215,7 +215,7 @@ void ref_biquad_cascade_df2T_f64(
/* decrement the loop counter */
stage--;
} while(stage > 0u);
} while (stage > 0u);
}
void ref_biquad_cascade_df1_f32(
@ -255,7 +255,7 @@ void ref_biquad_cascade_df1_f32(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn = *pIn++;
@ -297,7 +297,7 @@ void ref_biquad_cascade_df1_f32(
/* decrement the loop counter */
stage--;
} while(stage > 0u);
} while (stage > 0u);
}
void ref_biquad_cas_df1_32x64_q31(
@ -338,7 +338,7 @@ void ref_biquad_cas_df1_32x64_q31(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn = *pIn++;
@ -386,7 +386,7 @@ void ref_biquad_cas_df1_32x64_q31(
*pState++ = Yn1;
*pState++ = Yn2;
} while(--stage);
} while (--stage);
}
void ref_biquad_cascade_df1_q31(
@ -428,7 +428,7 @@ void ref_biquad_cascade_df1_q31(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn = *pIn++;
@ -480,7 +480,7 @@ void ref_biquad_cascade_df1_q31(
*pState++ = Yn1;
*pState++ = Yn2;
} while(--stage);
} while (--stage);
}
@ -518,7 +518,7 @@ void ref_biquad_cascade_df1_fast_q31(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn = *pIn++;
@ -559,7 +559,7 @@ void ref_biquad_cascade_df1_fast_q31(
*pState++ = Yn1;
*pState++ = Yn2;
} while(--stage);
} while (--stage);
}
void ref_biquad_cascade_df1_fast_q15(
@ -597,7 +597,7 @@ void ref_biquad_cascade_df1_fast_q15(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn = *pIn++;
@ -634,7 +634,7 @@ void ref_biquad_cascade_df1_fast_q15(
*pState++ = Yn1;
*pState++ = Yn2;
} while(--stage);
} while (--stage);
}
void ref_biquad_cascade_df1_q15(
@ -672,7 +672,7 @@ void ref_biquad_cascade_df1_q15(
sample = blockSize;
while(sample > 0u)
while (sample > 0u)
{
/* Read the input */
Xn = *pIn++;
@ -709,5 +709,5 @@ void ref_biquad_cascade_df1_q15(
*pState++ = Yn1;
*pState++ = Yn2;
} while(--stage);
} while (--stage);
}

@ -20,7 +20,7 @@ void ref_conv_f32(
for (j = 0; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += pSrcB[i - j] * pSrcA[j];
@ -65,7 +65,7 @@ void ref_conv_q31(
for (j = 0; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += (q63_t) pSrcA[j] * (pSrcB[i - j]);
@ -97,7 +97,7 @@ void ref_conv_fast_q31(
for (j = 0; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum = (q31_t) ((((q63_t)sum << 32) +
@ -158,7 +158,7 @@ void ref_conv_q15(
for (j = 0; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += (q31_t)pSrcA[j] * pSrcB[i - j];
@ -194,7 +194,7 @@ arm_status ref_conv_partial_fast_opt_q15(
for (j = 0; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += (q31_t)pSrcA[j] * pSrcB[i - j];
@ -228,7 +228,7 @@ void ref_conv_fast_q15(
for (j = 0; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += (q31_t)pSrcA[j] * pSrcB[i - j];
@ -262,7 +262,7 @@ void ref_conv_fast_opt_q15(
for (j = 0; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += (q31_t)pSrcA[j] * pSrcB[i - j];
@ -323,7 +323,7 @@ void ref_conv_q7(
for (j = 0; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += (q15_t)pSrcA[j] * pSrcB[i - j];

@ -34,13 +34,13 @@ void ref_correlate_f32(
/* Calculate the length of the remaining sequence */
tot = srcALen + srcBLen - 2u;
if(srcALen > srcBLen)
if (srcALen > srcBLen)
{
/* Calculating the number of zeros to be padded to the output */
/* Initialise the pointer after zero padding */
pDst += srcALen - srcBLen;
}
else if(srcALen < srcBLen)
else if (srcALen < srcBLen)
{
/* Initialization to inputB pointer */
pIn1 = pSrcB;
@ -70,14 +70,14 @@ void ref_correlate_f32(
for (j = 0u; j <= i; j++)
{
/* Check the array limitations */
if((i - j < srcBLen) && (j < srcALen))
if ((i - j < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += pIn1[j] * pIn2[-((int32_t)i - j)];
}
}
/* Store the output in the destination buffer */
if(inv == 1)
if (inv == 1)
*pDst-- = sum;
else
*pDst++ = sum;
@ -101,7 +101,7 @@ void ref_correlate_q31(
/* Calculate the length of the remaining sequence */
tot = ((srcALen + srcBLen) - 2u);
if(srcALen > srcBLen)
if (srcALen > srcBLen)
{
/* Calculating the number of zeros to be padded to the output */
j = srcALen - srcBLen;
@ -110,7 +110,7 @@ void ref_correlate_q31(
pDst += j;
}
else if(srcALen < srcBLen)
else if (srcALen < srcBLen)
{
/* Initialization to inputB pointer */
pIn1 = pSrcB;
@ -141,14 +141,14 @@ void ref_correlate_q31(
for (j = 0u; j <= i; j++)
{
/* Check the array limitations */
if((((i - j) < srcBLen) && (j < srcALen)))
if ((((i - j) < srcBLen) && (j < srcALen)))
{
/* z[i] += x[i-j] * y[j] */
sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
}
}
/* Store the output in the destination buffer */
if(inv == 1)
if (inv == 1)
*pDst-- = (q31_t)(sum >> 31u);
else
*pDst++ = (q31_t)(sum >> 31u);
@ -172,7 +172,7 @@ void ref_correlate_fast_q31(
/* Calculate the length of the remaining sequence */
tot = ((srcALen + srcBLen) - 2u);
if(srcALen > srcBLen)
if (srcALen > srcBLen)
{
/* Calculating the number of zeros to be padded to the output */
j = srcALen - srcBLen;
@ -181,7 +181,7 @@ void ref_correlate_fast_q31(
pDst += j;
}
else if(srcALen < srcBLen)
else if (srcALen < srcBLen)
{
/* Initialization to inputB pointer */
pIn1 = pSrcB;
@ -212,7 +212,7 @@ void ref_correlate_fast_q31(
for (j = 0u; j <= i; j++)
{
/* Check the array limitations */
if((((i - j) < srcBLen) && (j < srcALen)))
if ((((i - j) < srcBLen) && (j < srcALen)))
{
/* z[i] += x[i-j] * y[j] */
sum = (q31_t) ((((q63_t) sum << 32) +
@ -220,7 +220,7 @@ void ref_correlate_fast_q31(
}
}
/* Store the output in the destination buffer */
if(inv == 1)
if (inv == 1)
*pDst-- = (q31_t)(sum << 1u);
else
*pDst++ = (q31_t)(sum << 1u);
@ -244,7 +244,7 @@ void ref_correlate_q15(
/* Calculate the length of the remaining sequence */
tot = ((srcALen + srcBLen) - 2u);
if(srcALen > srcBLen)
if (srcALen > srcBLen)
{
/* Calculating the number of zeros to be padded to the output */
j = srcALen - srcBLen;
@ -253,7 +253,7 @@ void ref_correlate_q15(
pDst += j;
}
else if(srcALen < srcBLen)
else if (srcALen < srcBLen)
{
/* Initialization to inputB pointer */
pIn1 = pSrcB;
@ -284,14 +284,14 @@ void ref_correlate_q15(
for (j = 0u; j <= i; j++)
{
/* Check the array limitations */
if((((i - j) < srcBLen) && (j < srcALen)))
if ((((i - j) < srcBLen) && (j < srcALen)))
{
/* z[i] += x[i-j] * y[j] */
sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
}
}
/* Store the output in the destination buffer */
if(inv == 1)
if (inv == 1)
*pDst-- = (q15_t) ref_sat_q15(sum >> 15u);
else
*pDst++ = (q15_t) ref_sat_q15(sum >> 15u);
@ -315,7 +315,7 @@ void ref_correlate_fast_q15(
/* Calculate the length of the remaining sequence */
tot = ((srcALen + srcBLen) - 2u);
if(srcALen > srcBLen)
if (srcALen > srcBLen)
{
/* Calculating the number of zeros to be padded to the output */
j = srcALen - srcBLen;
@ -324,7 +324,7 @@ void ref_correlate_fast_q15(
pDst += j;
}
else if(srcALen < srcBLen)
else if (srcALen < srcBLen)
{
/* Initialization to inputB pointer */
pIn1 = pSrcB;
@ -355,14 +355,14 @@ void ref_correlate_fast_q15(
for (j = 0u; j <= i; j++)
{
/* Check the array limitations */
if((((i - j) < srcBLen) && (j < srcALen)))
if ((((i - j) < srcBLen) && (j < srcALen)))
{
/* z[i] += x[i-j] * y[j] */
sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
}
}
/* Store the output in the destination buffer */
if(inv == 1)
if (inv == 1)
*pDst-- = (q15_t)(sum >> 15u);
else
*pDst++ = (q15_t)(sum >> 15u);
@ -387,7 +387,7 @@ void ref_correlate_fast_opt_q15(
/* Calculate the length of the remaining sequence */
tot = ((srcALen + srcBLen) - 2u);
if(srcALen > srcBLen)
if (srcALen > srcBLen)
{
/* Calculating the number of zeros to be padded to the output */
j = srcALen - srcBLen;
@ -396,7 +396,7 @@ void ref_correlate_fast_opt_q15(
pDst += j;
}
else if(srcALen < srcBLen)
else if (srcALen < srcBLen)
{
/* Initialization to inputB pointer */
pIn1 = pSrcB;
@ -427,14 +427,14 @@ void ref_correlate_fast_opt_q15(
for (j = 0u; j <= i; j++)
{
/* Check the array limitations */
if((((i - j) < srcBLen) && (j < srcALen)))
if ((((i - j) < srcBLen) && (j < srcALen)))
{
/* z[i] += x[i-j] * y[j] */
sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
}
}
/* Store the output in the destination buffer */
if(inv == 1)
if (inv == 1)
*pDst-- = (q15_t) ref_sat_q15(sum >> 15u);
else
*pDst++ = (q15_t) ref_sat_q15(sum >> 15u);
@ -458,7 +458,7 @@ void ref_correlate_q7(
/* Calculate the length of the remaining sequence */
tot = ((srcALen + srcBLen) - 2u);
if(srcALen > srcBLen)
if (srcALen > srcBLen)
{
/* Calculating the number of zeros to be padded to the output */
j = srcALen - srcBLen;
@ -467,7 +467,7 @@ void ref_correlate_q7(
pDst += j;
}
else if(srcALen < srcBLen)
else if (srcALen < srcBLen)
{
/* Initialization to inputB pointer */
pIn1 = pSrcB;
@ -498,14 +498,14 @@ void ref_correlate_q7(
for (j = 0u; j <= i; j++)
{
/* Check the array limitations */
if((((i - j) < srcBLen) && (j < srcALen)))
if ((((i - j) < srcBLen) && (j < srcALen)))
{
/* z[i] += x[i-j] * y[j] */
sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
}
}
/* Store the output in the destination buffer */
if(inv == 1)
if (inv == 1)
*pDst-- = (q7_t) __SSAT((sum >> 7u), 8u);
else
*pDst++ = (q7_t) __SSAT((sum >> 7u), 8u);

@ -17,7 +17,7 @@ void ref_fir_f32(
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
while(blockSize > 0u)
while (blockSize > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
@ -71,7 +71,7 @@ void ref_fir_q31(
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
while(blockSize > 0u)
while (blockSize > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
@ -125,7 +125,7 @@ void ref_fir_fast_q31(
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
while(blockSize > 0u)
while (blockSize > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
@ -179,7 +179,7 @@ void ref_fir_q15(
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
while(blockSize > 0u)
while (blockSize > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
@ -233,7 +233,7 @@ void ref_fir_fast_q15(
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
while(blockSize > 0u)
while (blockSize > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
@ -287,7 +287,7 @@ void ref_fir_q7(
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
while(blockSize > 0u)
while (blockSize > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;

@ -21,7 +21,7 @@ void ref_fir_decimate_f32(
/* Total number of output samples to be computed */
blkCnt = blockSize / S->M;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy decimation factor number of new input samples into the state buffer */
i = S->M;
@ -29,7 +29,7 @@ void ref_fir_decimate_f32(
do
{
*pStateCurnt++ = *pSrc++;
} while(--i);
} while (--i);
/* Set accumulator to zero */
sum0 = 0.0f;
@ -67,7 +67,7 @@ void ref_fir_decimate_f32(
i = numTaps - 1u;
/* copy data */
while(i > 0u)
while (i > 0u)
{
*pStateCurnt++ = *pState++;
@ -97,7 +97,7 @@ void ref_fir_decimate_q31(
/* Total number of output samples to be computed */
blkCnt = blockSize / S->M;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy decimation factor number of new input samples into the state buffer */
i = S->M;
@ -106,7 +106,7 @@ void ref_fir_decimate_q31(
{
*pStateCurnt++ = *pSrc++;
} while(--i);
} while (--i);
/* Set accumulator to zero */
sum0 = 0;
@ -144,7 +144,7 @@ void ref_fir_decimate_q31(
i = numTaps - 1u;
/* copy data */
while(i > 0u)
while (i > 0u)
{
*pStateCurnt++ = *pState++;
@ -174,7 +174,7 @@ void ref_fir_decimate_fast_q31(
/* Total number of output samples to be computed */
blkCnt = blockSize / S->M;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy decimation factor number of new input samples into the state buffer */
i = S->M;
@ -183,7 +183,7 @@ void ref_fir_decimate_fast_q31(
{
*pStateCurnt++ = *pSrc++;
} while(--i);
} while (--i);
/* Set accumulator to zero */
sum0 = 0;
@ -221,7 +221,7 @@ void ref_fir_decimate_fast_q31(
i = numTaps - 1u;
/* copy data */
while(i > 0u)
while (i > 0u)
{
*pStateCurnt++ = *pState++;
@ -251,7 +251,7 @@ void ref_fir_decimate_q15(
/* Total number of output samples to be computed */
blkCnt = blockSize / S->M;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy decimation factor number of new input samples into the state buffer */
i = S->M;
@ -260,7 +260,7 @@ void ref_fir_decimate_q15(
{
*pStateCurnt++ = *pSrc++;
} while(--i);
} while (--i);
/* Set accumulator to zero */
sum0 = 0;
@ -298,7 +298,7 @@ void ref_fir_decimate_q15(
i = numTaps - 1u;
/* copy data */
while(i > 0u)
while (i > 0u)
{
*pStateCurnt++ = *pState++;
@ -328,7 +328,7 @@ void ref_fir_decimate_fast_q15(
/* Total number of output samples to be computed */
blkCnt = blockSize / S->M;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy decimation factor number of new input samples into the state buffer */
i = S->M;
@ -337,7 +337,7 @@ void ref_fir_decimate_fast_q15(
{
*pStateCurnt++ = *pSrc++;
} while(--i);
} while (--i);
/* Set accumulator to zero */
sum0 = 0;
@ -375,7 +375,7 @@ void ref_fir_decimate_fast_q15(
i = numTaps - 1u;
/* copy data */
while(i > 0u)
while (i > 0u)
{
*pStateCurnt++ = *pState++;

@ -23,7 +23,7 @@ void ref_fir_interpolate_f32(
blkCnt = blockSize;
/* Loop over the blockSize. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
@ -31,7 +31,7 @@ void ref_fir_interpolate_f32(
/* Loop over the Interpolation factor. */
i = S->L;
while(i > 0u)
while (i > 0u)
{
/* Set accumulator to zero */
sum = 0.0f;
@ -45,7 +45,7 @@ void ref_fir_interpolate_f32(
/* Loop over the polyPhase length */
tapCnt = phaseLen;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum += *ptr1++ * *ptr2;
@ -81,7 +81,7 @@ void ref_fir_interpolate_f32(
tapCnt = phaseLen - 1u;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
@ -118,7 +118,7 @@ void ref_fir_interpolate_q31(
blkCnt = blockSize;
/* Loop over the blockSize. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
@ -126,7 +126,7 @@ void ref_fir_interpolate_q31(
/* Loop over the Interpolation factor. */
i = S->L;
while(i > 0u)
while (i > 0u)
{
/* Set accumulator to zero */
sum = 0;
@ -139,7 +139,7 @@ void ref_fir_interpolate_q31(
tapCnt = phaseLen;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *(ptr2);
@ -182,7 +182,7 @@ void ref_fir_interpolate_q31(
tapCnt = phaseLen - 1u;
/* copy data */
while(tapCnt > 0u)
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
@ -216,7 +216,7 @@ void ref_fir_interpolate_q15(
blkCnt = blockSize;
/* Loop over the blockSize. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
@ -224,7 +224,7 @@ void ref_fir_interpolate_q15(
/* Loop over the Interpolation factor. */
i = S->L;
while(i > 0u)
while (i > 0u)
{
/* Set accumulator to zero */
sum = 0;
@ -238,7 +238,7 @@ void ref_fir_interpolate_q15(
/* Loop over the polyPhase length */
tapCnt = (uint32_t)phaseLen;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *ptr2;
@ -280,7 +280,7 @@ void ref_fir_interpolate_q15(
i = (uint32_t) phaseLen - 1u;
while(i > 0u)
while (i > 0u)
{
*pStateCurnt++ = *pState++;

@ -18,7 +18,7 @@ void ref_fir_lattice_f32(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurr = *pSrc++;
@ -48,7 +48,7 @@ void ref_fir_lattice_f32(
stageCnt = (numStages - 1u);
/* stage loop */
while(stageCnt > 0u)
while (stageCnt > 0u)
{
/* read g2(n) from state buffer */
gcurr = *px;
@ -94,7 +94,7 @@ void ref_fir_lattice_q31(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurr = *pSrc++;
@ -123,7 +123,7 @@ void ref_fir_lattice_q31(
stageCnt = (numStages - 1u);
/* stage loop */
while(stageCnt > 0u)
while (stageCnt > 0u)
{
/* read g2(n) from state buffer */
gcurr = *px;
@ -171,7 +171,7 @@ void ref_fir_lattice_q15(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurnt = *pSrc++;
@ -205,7 +205,7 @@ void ref_fir_lattice_q15(
stageCnt = (numStages - 1u);
/* stage loop */
while(stageCnt > 0u)
while (stageCnt > 0u)
{
/* read g1(n-1) from state buffer */
gcurnt = *px;

@ -31,7 +31,7 @@ void ref_fir_sparse_f32(
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if(readIndex < 0)
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
@ -52,7 +52,7 @@ void ref_fir_sparse_f32(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Perform Multiplications and store in destination buffer */
*pOut++ = *px++ * coeff;
@ -64,7 +64,7 @@ void ref_fir_sparse_f32(
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 1u;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
@ -74,7 +74,7 @@ void ref_fir_sparse_f32(
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if(readIndex < 0)
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
@ -95,7 +95,7 @@ void ref_fir_sparse_f32(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
@ -141,7 +141,7 @@ void ref_fir_sparse_q31(
readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if(readIndex < 0)
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
@ -162,7 +162,7 @@ void ref_fir_sparse_q31(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Perform Multiplications and store in the destination buffer */
*pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
@ -174,7 +174,7 @@ void ref_fir_sparse_q31(
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 1u;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
@ -184,7 +184,7 @@ void ref_fir_sparse_q31(
readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if(readIndex < 0)
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
@ -205,7 +205,7 @@ void ref_fir_sparse_q31(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
out = *pOut;
@ -226,7 +226,7 @@ void ref_fir_sparse_q31(
/* Output is converted into 1.31 format. */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
in = *pOut << 1;
*pOut++ = in;
@ -270,7 +270,7 @@ void ref_fir_sparse_q15(
readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if(readIndex < 0)
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
@ -290,7 +290,7 @@ void ref_fir_sparse_q15(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Perform multiplication and store in the scratch buffer */
*pScratchOut++ = ((q31_t) * px++ * coeff);
@ -302,7 +302,7 @@ void ref_fir_sparse_q15(
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 1u;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
@ -312,7 +312,7 @@ void ref_fir_sparse_q15(
readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if(readIndex < 0)
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
@ -332,7 +332,7 @@ void ref_fir_sparse_q15(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pScratchOut++ += (q31_t) * px++ * coeff;
@ -350,7 +350,7 @@ void ref_fir_sparse_q15(
/* Loop over the blockSize. */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
*pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
blkCnt--;
@ -392,7 +392,7 @@ void ref_fir_sparse_q7(
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if(readIndex < 0)
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
@ -413,7 +413,7 @@ void ref_fir_sparse_q7(
/* Loop over the blockSize */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Perform multiplication and store in the scratch buffer */
*pScratchOut++ = ((q31_t) * px++ * coeff);
@ -425,7 +425,7 @@ void ref_fir_sparse_q7(
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 1u;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
@ -435,7 +435,7 @@ void ref_fir_sparse_q7(
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if(readIndex < 0)
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
@ -456,7 +456,7 @@ void ref_fir_sparse_q7(
/* Loop over the blockSize */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
in = *pScratchOut + ((q31_t) * px++ * coeff);
@ -475,7 +475,7 @@ void ref_fir_sparse_q7(
/* Loop over the blockSize. */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
*pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);

@ -18,7 +18,7 @@ void ref_iir_lattice_f32(
pState = &S->pState[0];
/* Sample processing */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
@ -38,7 +38,7 @@ void ref_iir_lattice_f32(
/* Process sample for numStages */
tapCnt = numStages;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
gcurr = *px1++;
/* Process sample for last taps */
@ -77,7 +77,7 @@ void ref_iir_lattice_f32(
tapCnt = numStages;
/* Copy the data */
while(tapCnt > 0u)
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
@ -104,7 +104,7 @@ void ref_iir_lattice_q31(
pState = &S->pState[0];
/* Sample processing */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
@ -123,7 +123,7 @@ void ref_iir_lattice_q31(
tapCnt = numStages;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
gcurr = *px1++;
/* Process sample */
@ -169,7 +169,7 @@ void ref_iir_lattice_q31(
tapCnt = numStages;
/* Copy the remaining q31_t data */
while(tapCnt > 0u)
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
@ -198,7 +198,7 @@ void ref_iir_lattice_q15(
pState = &S->pState[0];
/* Sample processing */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
@ -217,7 +217,7 @@ void ref_iir_lattice_q15(
tapCnt = numStages;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
gcurr = *px1++;
/* Process sample */
@ -261,7 +261,7 @@ void ref_iir_lattice_q15(
stgCnt = numStages;
/* copy data */
while(stgCnt > 0u)
while (stgCnt > 0u)
{
*pStateCurnt++ = *pState++;

@ -26,7 +26,7 @@ void ref_lms_f32(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
@ -202,7 +202,7 @@ void ref_lms_q31(
/* Loop over numTaps number of values */
tapCnt = numTaps;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += (q63_t)(*px++) * (*pb++);
@ -241,7 +241,7 @@ void ref_lms_q31(
/* Loop over numTaps number of values */
tapCnt = numTaps;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = (q31_t)(((q63_t) alpha * (*px++)) >> 32);
@ -264,7 +264,7 @@ void ref_lms_q31(
tapCnt = numTaps - 1;
/* Copy the data */
while(tapCnt > 0u)
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
@ -331,7 +331,7 @@ void ref_lms_norm_q31(
/* Loop over numTaps number of values */
tapCnt = numTaps;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += ((q63_t) (*px++)) * (*pb++);
@ -372,7 +372,7 @@ void ref_lms_norm_q31(
/* Loop over numTaps number of values */
tapCnt = numTaps;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
/* coef is in 2.30 format */
@ -408,7 +408,7 @@ void ref_lms_norm_q31(
tapCnt = numTaps - 1;
/* Copy the remaining q31_t data */
while(tapCnt > 0u)
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
@ -462,7 +462,7 @@ void ref_lms_q15(
/* Loop over numTaps number of values */
tapCnt = numTaps;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += (q63_t)((q31_t)(*px++) * (*pb++));
@ -504,7 +504,7 @@ void ref_lms_q15(
/* Loop over numTaps number of values */
tapCnt = numTaps;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
@ -526,7 +526,7 @@ void ref_lms_q15(
tapCnt = numTaps - 1;
/* Copy the data */
while(tapCnt > 0u)
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
@ -594,7 +594,7 @@ void ref_lms_norm_q15(
/* Loop over numTaps number of values */
tapCnt = numTaps;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += (q31_t)*px++ * (*pb++);
@ -653,7 +653,7 @@ void ref_lms_norm_q15(
/* Loop over numTaps number of values */
tapCnt = numTaps;
while(tapCnt > 0u)
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = *pb + (((q31_t)w * (*px++)) >> 15);
@ -685,7 +685,7 @@ void ref_lms_norm_q15(
tapCnt = numTaps - 1;
/* copy data */
while(tapCnt > 0u)
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;

@ -54,7 +54,7 @@ void ref_cofact(float32_t *pSrc, float32_t *pDst, float32_t *temp, uint32_t size
{
int p, q, m, n, i, j;
if(size == 1)
if (size == 1)
{
pDst[0] = 1;
return;
@ -151,7 +151,7 @@ void ref_cofact64(float64_t *pSrc, float64_t *pDst, float64_t *temp, uint32_t si
{
int p, q, m, n, i, j;
if(size == 1)
if (size == 1)
{
pDst[0] = 1;
return;

@ -15,11 +15,11 @@ q31_t ref_sat_n(q31_t num, uint32_t bits)
posMax = posMax * 2;
}
if(num > 0)
if (num > 0)
{
posMax = (posMax - 1);
if(num > posMax)
if (num > posMax)
{
num = posMax;
}
@ -28,7 +28,7 @@ q31_t ref_sat_n(q31_t num, uint32_t bits)
{
negMin = -posMax;
if(num < negMin)
if (num < negMin)
{
num = negMin;
}
@ -38,11 +38,11 @@ q31_t ref_sat_n(q31_t num, uint32_t bits)
q31_t ref_sat_q31(q63_t num)
{
if(num > (q63_t)INT_MAX)
if (num > (q63_t)INT_MAX)
{
return INT_MAX;
}
else if(num < (q63_t)0xffffffff80000000ll)
else if (num < (q63_t)0xffffffff80000000ll)
{
return INT_MIN;
}
@ -54,11 +54,11 @@ q31_t ref_sat_q31(q63_t num)
q15_t ref_sat_q15(q31_t num)
{
if(num > (q31_t)SHRT_MAX)
if (num > (q31_t)SHRT_MAX)
{
return SHRT_MAX;
}
else if(num < (q31_t)0xffff8000)
else if (num < (q31_t)0xffff8000)
{
return SHRT_MIN;
}
@ -70,11 +70,11 @@ q15_t ref_sat_q15(q31_t num)
q7_t ref_sat_q7(q15_t num)
{
if(num > (q15_t)SCHAR_MAX)
if (num > (q15_t)SCHAR_MAX)
{
return SCHAR_MAX;
}
else if(num < (q15_t)0xff80)
else if (num < (q15_t)0xff80)
{
return SCHAR_MIN;
}
@ -94,7 +94,7 @@ float32_t ref_pow(float32_t a, uint32_t b)
r *= a;
}
if( b == 0)
if ( b == 0)
{
return 1;
}

@ -11,7 +11,7 @@ void ref_max_f32(
for(i=0;i<blockSize;i++)
{
if(max < pSrc[i])
if (max < pSrc[i])
{
max = pSrc[i];
ind = i;
@ -32,7 +32,7 @@ void ref_max_q31(
for(i=0;i<blockSize;i++)
{
if(max < pSrc[i])
if (max < pSrc[i])
{
max = pSrc[i];
ind = i;
@ -53,7 +53,7 @@ void ref_max_q15(
for(i=0;i<blockSize;i++)
{
if(max < pSrc[i])
if (max < pSrc[i])
{
max = pSrc[i];
ind = i;
@ -74,7 +74,7 @@ void ref_max_q7(
for(i=0;i<blockSize;i++)
{
if(max < pSrc[i])
if (max < pSrc[i])
{
max = pSrc[i];
ind = i;

@ -11,7 +11,7 @@ void ref_min_f32(
for(i=0;i<blockSize;i++)
{
if(min > pSrc[i])
if (min > pSrc[i])
{
min = pSrc[i];
ind = i;
@ -32,7 +32,7 @@ void ref_min_q31(
for(i=0;i<blockSize;i++)
{
if(min > pSrc[i])
if (min > pSrc[i])
{
min = pSrc[i];
ind = i;
@ -53,7 +53,7 @@ void ref_min_q15(
for(i=0;i<blockSize;i++)
{
if(min > pSrc[i])
if (min > pSrc[i])
{
min = pSrc[i];
ind = i;
@ -74,7 +74,7 @@ void ref_min_q7(
for(i=0;i<blockSize;i++)
{
if(min > pSrc[i])
if (min > pSrc[i])
{
min = pSrc[i];
ind = i;

@ -37,7 +37,7 @@ void ref_rms_q31(
/* GCC M0 problem: __aeabi_f2iz(QNAN) returns not 0 */
help_float = (sqrtf((float)tmp2 / 2147483648.0f) * 2147483648.0f);
/* Checking for a NAN value in help_float */
if(((*((int *)(&help_float))) & 0x7FC00000) == 0x7FC00000) {
if (((*((int *)(&help_float))) & 0x7FC00000) == 0x7FC00000) {
help_float = 0;
}
*pResult = (q31_t)(help_float);

@ -8,7 +8,7 @@ void ref_std_f32(
uint32_t i;
float32_t sum=0, sumsq=0;
if(blockSize == 1)
if (blockSize == 1)
{
*pResult = 0;
return;
@ -31,7 +31,7 @@ void ref_std_q31(
q63_t sum=0, sumsq=0;
q31_t in;
if(blockSize == 1)
if (blockSize == 1)
{
*pResult = 0;
return;
@ -57,7 +57,7 @@ void ref_std_q15(
q31_t sum=0;
q63_t sumsq=0;
if(blockSize == 1)
if (blockSize == 1)
{
*pResult = 0;
return;

@ -8,7 +8,7 @@ void ref_var_f32(
uint32_t i;
float32_t sum=0, sumsq=0;
if(blockSize == 1)
if (blockSize == 1)
{
*pResult = 0;
return;
@ -31,7 +31,7 @@ void ref_var_q31(
q63_t sum=0, sumsq=0;
q31_t in;
if(blockSize == 1)
if (blockSize == 1)
{
*pResult = 0;
return;
@ -55,7 +55,7 @@ void ref_var_q15(
q31_t sum=0;
q63_t sumsq=0;
if(blockSize == 1)
if (blockSize == 1)
{
*pResult = 0;
return;

@ -121,7 +121,7 @@ void ref_cfft_q31(
break;
}
if(ifftFlag)
if (ifftFlag)
{
for(i=0;i<S->fftLen*2;i++)
{
@ -199,7 +199,7 @@ void ref_cfft_q15(
break;
}
if(ifftFlag)
if (ifftFlag)
{
for(i=0;i<S->fftLen*2;i++)
{
@ -313,7 +313,7 @@ void ref_cfft_radix2_q31(
break;
}
if(S->ifftFlag)
if (S->ifftFlag)
{
for(i=0;i<S->fftLen*2;i++)
{
@ -389,7 +389,7 @@ void ref_cfft_radix2_q15(
break;
}
if(S->ifftFlag)
if (S->ifftFlag)
{
for(i=0;i<S->fftLen*2;i++)
{
@ -503,7 +503,7 @@ void ref_cfft_radix4_q31(
break;
}
if(S->ifftFlag)
if (S->ifftFlag)
{
for(i=0;i<S->fftLen*2;i++)
{
@ -579,7 +579,7 @@ void ref_cfft_radix4_q15(
break;
}
if(S->ifftFlag)
if (S->ifftFlag)
{
for(i=0;i<S->fftLen*2;i++)
{

@ -8,7 +8,7 @@ void ref_rfft_f32(
{
uint32_t i;
if(S->ifftFlagR)
if (S->ifftFlagR)
{
for(i=0;i<S->fftLenReal*2;i++)
{
@ -43,7 +43,7 @@ void ref_rfft_f32(
break;
}
if(S->ifftFlagR)
if (S->ifftFlagR)
{
//throw away the imaginary part which should be all zeros
for(i=0;i<S->fftLenReal;i++)
@ -60,7 +60,7 @@ void ref_rfft_fast_f32(
{
uint32_t i,j;
if(ifftFlag)
if (ifftFlag)
{
for(i=0;i<S->fftLenRFFT;i++)
{
@ -122,7 +122,7 @@ void ref_rfft_fast_f32(
break;
}
if(ifftFlag)
if (ifftFlag)
{
//throw away the imaginary part which should be all zeros
for(i=0;i<S->fftLenRFFT;i++)
@ -145,7 +145,7 @@ void ref_rfft_q31(
uint32_t i;
float32_t *fDst = (float32_t*)pDst;
if(S->ifftFlagR)
if (S->ifftFlagR)
{
for(i=0;i<S->fftLenReal*2;i++)
{
@ -200,7 +200,7 @@ void ref_rfft_q31(
break;
}
if(S->ifftFlagR)
if (S->ifftFlagR)
{
//throw away the imaginary part which should be all zeros
for(i=0;i<S->fftLenReal;i++)
@ -228,7 +228,7 @@ void ref_rfft_q15(
float32_t *fDst = (float32_t*)pDst;
if(S->ifftFlagR)
if (S->ifftFlagR)
{
for(i=0;i<S->fftLenReal*2;i++)
{
@ -284,7 +284,7 @@ void ref_rfft_q15(
break;
}
if(S->ifftFlagR)
if (S->ifftFlagR)
{
//throw away the imaginary part which should be all zeros
for(i=0;i<S->fftLenReal;i++)

@ -2,7 +2,7 @@ import sys
toolchain_list = ["ARM", "GCC"]
core_list = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp",
"ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfdp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ]
"ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfsp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ]
test_list = ["MPS2", "FVP", "Simulator"]
error = 1

@ -21,9 +21,9 @@ for %%a in ( ^
cortexM7lfdp ^
ARMv8MBLl ^
ARMv8MMLl ^
ARMv8MBLlfsp ^
ARMv8MBLlfdp ^
ARMv8MBLld ^
ARMv8MMLlfsp ^
ARMv8MMLlfdp ^
ARMv8MMLld ^
ARMv8MMLldfsp ^
ARMv8MMLldfdp ^
) do if %2==%%a goto checkParam3

@ -207,5 +207,5 @@ int32_t main()
** ------------------------------------------------------------------- */
arm_var_f32(testOutput, numStudents, &var);
while(1); /* main function does not return */
while (1); /* main function does not return */
}

@ -231,17 +231,17 @@ int32_t main(void)
/* Compare the SNR with threshold to test whether the
computed output is matched with the reference output values. */
if( snr > SNR_THRESHOLD)
if ( snr > SNR_THRESHOLD)
{
status = ARM_MATH_SUCCESS;
}
if( status != ARM_MATH_SUCCESS)
if ( status != ARM_MATH_SUCCESS)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -73,7 +73,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pRef[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -82,7 +82,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pTest[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -94,7 +94,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&EnergyError);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -174,7 +174,7 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -202,7 +202,7 @@ uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -449,11 +449,11 @@ void arm_clip_f32 (float *pIn, uint32_t numSamples)
for (i = 0; i < numSamples; i++)
{
if(pIn[i] > 1.0f)
if (pIn[i] > 1.0f)
{
pIn[i] = 1.0;
}
else if( pIn[i] < -1.0f)
else if ( pIn[i] < -1.0f)
{
pIn[i] = -1.0;
}

@ -162,17 +162,17 @@ int32_t main(void)
diff = fabsf(refDotProdOut - testOutput);
/* Comparison of dot product value with reference */
if(diff > DELTA)
if (diff > DELTA)
{
status = ARM_MATH_TEST_FAILURE;
}
if( status == ARM_MATH_TEST_FAILURE)
if ( status == ARM_MATH_TEST_FAILURE)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -137,7 +137,7 @@ int32_t main(void)
/* Calculates maxValue and returns corresponding BIN value */
arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
if(testIndex != refIndex)
if (testIndex != refIndex)
{
status = ARM_MATH_TEST_FAILURE;
}
@ -147,12 +147,12 @@ int32_t main(void)
** This denotes a test failure
** ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS)
if ( status != ARM_MATH_SUCCESS)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -222,12 +222,12 @@ int32_t main(void)
** Loop here if the signal does not match the reference output.
** ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS)
if ( status != ARM_MATH_SUCCESS)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -73,7 +73,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pRef[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -82,7 +82,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pTest[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -94,7 +94,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&EnergyError);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -174,7 +174,7 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -202,7 +202,7 @@ uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -449,11 +449,11 @@ void arm_clip_f32 (float *pIn, uint32_t numSamples)
for (i = 0; i < numSamples; i++)
{
if(pIn[i] > 1.0f)
if (pIn[i] > 1.0f)
{
pIn[i] = 1.0;
}
else if( pIn[i] < -1.0f)
else if ( pIn[i] < -1.0f)
{
pIn[i] = -1.0;
}

@ -397,12 +397,12 @@ int32_t main(void)
** Loop here if the signal does not match the reference output.
** ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS)
if ( status != ARM_MATH_SUCCESS)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -73,7 +73,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pRef[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -82,7 +82,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pTest[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -94,7 +94,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&EnergyError);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -174,7 +174,7 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -202,7 +202,7 @@ uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -449,11 +449,11 @@ void arm_clip_f32 (float *pIn, uint32_t numSamples)
for (i = 0; i < numSamples; i++)
{
if(pIn[i] > 1.0f)
if (pIn[i] > 1.0f)
{
pIn[i] = 1.0;
}
else if( pIn[i] < -1.0f)
else if ( pIn[i] < -1.0f)
{
pIn[i] = -1.0;
}

@ -180,7 +180,7 @@ int32_t main(void)
/*------------------------------------------------------------------------------
* Initialise status depending on SNR calculations
*------------------------------------------------------------------------------*/
if( snr2 > snr1)
if ( snr2 > snr1)
{
status = ARM_MATH_SUCCESS;
}
@ -193,12 +193,12 @@ int32_t main(void)
** Loop here if the signals fail the PASS check.
** This denotes a test failure
** ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS)
if ( status != ARM_MATH_SUCCESS)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -73,7 +73,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pRef[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -82,7 +82,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pTest[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -94,7 +94,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&EnergyError);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -174,7 +174,7 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -202,7 +202,7 @@ uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -449,11 +449,11 @@ void arm_clip_f32 (float *pIn, uint32_t numSamples)
for (i = 0; i < numSamples; i++)
{
if(pIn[i] > 1.0f)
if (pIn[i] > 1.0f)
{
pIn[i] = 1.0;
}
else if( pIn[i] < -1.0f)
else if ( pIn[i] < -1.0f)
{
pIn[i] = -1.0;
}

@ -208,7 +208,7 @@ int32_t main(void)
/*------------------------------------------------------------------------------
* Initialise status depending on SNR calculations
*------------------------------------------------------------------------------*/
if( snr > SNR_THRESHOLD)
if ( snr > SNR_THRESHOLD)
{
status = ARM_MATH_SUCCESS;
}
@ -222,12 +222,12 @@ int32_t main(void)
** Loop here if the signals fail the PASS check.
** This denotes a test failure
** ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS)
if ( status != ARM_MATH_SUCCESS)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -73,7 +73,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pRef[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -82,7 +82,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pTest[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -94,7 +94,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&EnergyError);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -174,7 +174,7 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -202,7 +202,7 @@ uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -449,11 +449,11 @@ void arm_clip_f32 (float *pIn, uint32_t numSamples)
for (i = 0; i < numSamples; i++)
{
if(pIn[i] > 1.0f)
if (pIn[i] > 1.0f)
{
pIn[i] = 1.0;
}
else if( pIn[i] < -1.0f)
else if ( pIn[i] < -1.0f)
{
pIn[i] = -1.0;
}

@ -248,12 +248,12 @@ int32_t main(void)
* This denotes a test failure
* ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS)
if ( status != ARM_MATH_SUCCESS)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -73,7 +73,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pRef[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -82,7 +82,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&pTest[i]);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -94,7 +94,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
test = (int *)(&EnergyError);
temp = *test;
if(temp == 0x7FC00000)
if (temp == 0x7FC00000)
{
return(0);
}
@ -174,7 +174,7 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -202,7 +202,7 @@ uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
diff = pIn[i] - pOut[i];
diffCrnt = (diff > 0) ? diff : -diff;
if(diffCrnt > maxDiff)
if (diffCrnt > maxDiff)
{
maxDiff = diffCrnt;
}
@ -449,11 +449,11 @@ void arm_clip_f32 (float *pIn, uint32_t numSamples)
for (i = 0; i < numSamples; i++)
{
if(pIn[i] > 1.0f)
if (pIn[i] > 1.0f)
{
pIn[i] = 1.0;
}
else if( pIn[i] < -1.0f)
else if ( pIn[i] < -1.0f)
{
pIn[i] = -1.0;
}

@ -143,19 +143,19 @@ int32_t main(void)
diff = fabsf(testRefOutput_f32 - testOutput);
/* Comparison of sin_cos value with reference */
if(diff > DELTA)
if (diff > DELTA)
{
status = ARM_MATH_TEST_FAILURE;
}
if( status == ARM_MATH_TEST_FAILURE)
if ( status == ARM_MATH_TEST_FAILURE)
{
while(1);
while (1);
}
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -188,17 +188,17 @@ int32_t main(void)
diff = fabsf(refVarianceOut - variance);
/* Comparison of variance value with reference */
if(diff > DELTA)
if (diff > DELTA)
{
status = ARM_MATH_TEST_FAILURE;
}
if( status != ARM_MATH_SUCCESS)
if ( status != ARM_MATH_SUCCESS)
{
while(1);
while (1);
}
while(1); /* main function does not return */
while (1); /* main function does not return */
}
/** \endlink */

@ -1,13 +1,13 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. October 2015
* $Revision: V.1.4.5 a
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_common_tables.h
* Project: CMSIS DSP Library
* Title: arm_common_tables.h
*
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
*
* Target Processor: Cortex-M4/Cortex-M3
*
@ -46,8 +46,6 @@
extern const uint16_t armBitRevTable[1024];
extern const q15_t armRecipTableQ15[64];
extern const q31_t armRecipTableQ31[64];
/* extern const q31_t realCoefAQ31[1024]; */
/* extern const q31_t realCoefBQ31[1024]; */
extern const float32_t twiddleCoef_16[32];
extern const float32_t twiddleCoef_32[64];
extern const float32_t twiddleCoef_64[128];
@ -85,45 +83,44 @@ extern const float32_t twiddleCoef_rfft_1024[1024];
extern const float32_t twiddleCoef_rfft_2048[2048];
extern const float32_t twiddleCoef_rfft_4096[4096];
/* floating-point bit reversal tables */
#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
/* fixed-point bit reversal tables */
#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];

@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_const_structs.h
* Project: CMSIS DSP Library
* Title: arm_const_structs.h
*
* Description: This file has constant structs that are initialized for
* user convenience. For example, some can be given as
* arguments to the arm_cfft_f32() function.
* Description: This file has constant structs that are initialized for
* user convenience. For example, some can be given as
* arguments to the arm_cfft_f32() function.
*
* Target Processor: Cortex-M4/Cortex-M3
*

@ -1,8 +1,8 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2016 ARM Limited. All rights reserved.
*
* $Date: 23. December 2016
* $Revision: V1.4.5 f
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_math.h
@ -567,7 +567,7 @@ extern "C"
uint32_t count = 0;
uint32_t mask = 0x80000000;
while((data & mask) == 0)
while ((data & mask) == 0)
{
count += 1u;
mask = mask >> 1u;
@ -591,7 +591,7 @@ extern "C"
uint32_t index, i;
uint32_t signBits;
if(in > 0)
if (in > 0)
{
signBits = ((uint32_t) (__CLZ( in) - 1));
}
@ -642,7 +642,7 @@ extern "C"
uint32_t index = 0, i = 0;
uint32_t signBits = 0;
if(in > 0)
if (in > 0)
{
signBits = ((uint32_t)(__CLZ( in) - 17));
}
@ -697,11 +697,11 @@ extern "C"
posMax = posMax * 2;
}
if(x > 0)
if (x > 0)
{
posMax = (posMax - 1);
if(x > posMax)
if (x > posMax)
{
x = posMax;
}
@ -710,7 +710,7 @@ extern "C"
{
negMin = -posMax;
if(x < negMin)
if (x < negMin)
{
x = negMin;
}
@ -1797,7 +1797,7 @@ extern "C"
typedef struct
{
q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
#ifdef ARM_MATH_CM0_FAMILY
#if !defined (ARM_MATH_DSP)
q15_t A1;
q15_t A2;
#else
@ -4940,7 +4940,7 @@ void arm_rfft_fast_f32(
q63_t acc;
q15_t out;
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
__SIMD32_TYPE *vstate;
/* Implementation of PID controller */
@ -5504,12 +5504,12 @@ void arm_rfft_fast_f32(
/* Calculation of index */
i = (int32_t) ((x - S->x1) / xSpacing);
if(i < 0)
if (i < 0)
{
/* Iniatilize output for below specified range as least output value of table */
y = pYData[0];
}
else if((uint32_t)i >= S->nValues)
else if ((uint32_t)i >= S->nValues)
{
/* Iniatilize output for above specified range as last output value of table */
y = pYData[S->nValues - 1];
@ -5562,11 +5562,11 @@ void arm_rfft_fast_f32(
/* Index value calculation */
index = ((x & (q31_t)0xFFF00000) >> 20);
if(index >= (int32_t)(nValues - 1))
if (index >= (int32_t)(nValues - 1))
{
return (pYData[nValues - 1]);
}
else if(index < 0)
else if (index < 0)
{
return (pYData[0]);
}
@ -5620,11 +5620,11 @@ void arm_rfft_fast_f32(
/* Index value calculation */
index = ((x & (int32_t)0xFFF00000) >> 20);
if(index >= (int32_t)(nValues - 1))
if (index >= (int32_t)(nValues - 1))
{
return (pYData[nValues - 1]);
}
else if(index < 0)
else if (index < 0)
{
return (pYData[0]);
}
@ -5681,7 +5681,7 @@ void arm_rfft_fast_f32(
}
index = (x >> 20) & 0xfff;
if(index >= (nValues - 1))
if (index >= (nValues - 1))
{
return (pYData[nValues - 1]);
}
@ -5806,7 +5806,7 @@ void arm_rfft_fast_f32(
float32_t in,
float32_t * pOut)
{
if(in >= 0.0f)
if (in >= 0.0f)
{
#if (__FPU_USED == 1) && defined ( __CC_ARM )
@ -5881,7 +5881,7 @@ void arm_rfft_fast_f32(
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
while (i > 0u)
{
/* copy the input sample to the circular buffer */
circBuffer[wOffset] = *src;
@ -5891,7 +5891,7 @@ void arm_rfft_fast_f32(
/* Circularly update wOffset. Watch out for positive and negative value */
wOffset += bufferInc;
if(wOffset >= L)
if (wOffset >= L)
wOffset -= L;
/* Decrement the loop counter */
@ -5929,7 +5929,7 @@ void arm_rfft_fast_f32(
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
while (i > 0u)
{
/* copy the sample from the circular buffer to the destination buffer */
*dst = circBuffer[rOffset];
@ -5937,7 +5937,7 @@ void arm_rfft_fast_f32(
/* Update the input pointer */
dst += dstInc;
if(dst == (int32_t *) dst_end)
if (dst == (int32_t *) dst_end)
{
dst = dst_base;
}
@ -5945,7 +5945,7 @@ void arm_rfft_fast_f32(
/* Circularly update rOffset. Watch out for positive and negative value */
rOffset += bufferInc;
if(rOffset >= L)
if (rOffset >= L)
{
rOffset -= L;
}
@ -5981,7 +5981,7 @@ void arm_rfft_fast_f32(
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
while (i > 0u)
{
/* copy the input sample to the circular buffer */
circBuffer[wOffset] = *src;
@ -5991,7 +5991,7 @@ void arm_rfft_fast_f32(
/* Circularly update wOffset. Watch out for positive and negative value */
wOffset += bufferInc;
if(wOffset >= L)
if (wOffset >= L)
wOffset -= L;
/* Decrement the loop counter */
@ -6029,7 +6029,7 @@ void arm_rfft_fast_f32(
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
while (i > 0u)
{
/* copy the sample from the circular buffer to the destination buffer */
*dst = circBuffer[rOffset];
@ -6037,7 +6037,7 @@ void arm_rfft_fast_f32(
/* Update the input pointer */
dst += dstInc;
if(dst == (q15_t *) dst_end)
if (dst == (q15_t *) dst_end)
{
dst = dst_base;
}
@ -6045,7 +6045,7 @@ void arm_rfft_fast_f32(
/* Circularly update wOffset. Watch out for positive and negative value */
rOffset += bufferInc;
if(rOffset >= L)
if (rOffset >= L)
{
rOffset -= L;
}
@ -6081,7 +6081,7 @@ void arm_rfft_fast_f32(
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
while (i > 0u)
{
/* copy the input sample to the circular buffer */
circBuffer[wOffset] = *src;
@ -6091,7 +6091,7 @@ void arm_rfft_fast_f32(
/* Circularly update wOffset. Watch out for positive and negative value */
wOffset += bufferInc;
if(wOffset >= L)
if (wOffset >= L)
wOffset -= L;
/* Decrement the loop counter */
@ -6129,7 +6129,7 @@ void arm_rfft_fast_f32(
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
while (i > 0u)
{
/* copy the sample from the circular buffer to the destination buffer */
*dst = circBuffer[rOffset];
@ -6137,7 +6137,7 @@ void arm_rfft_fast_f32(
/* Update the input pointer */
dst += dstInc;
if(dst == (q7_t *) dst_end)
if (dst == (q7_t *) dst_end)
{
dst = dst_base;
}
@ -6145,7 +6145,7 @@ void arm_rfft_fast_f32(
/* Circularly update rOffset. Watch out for positive and negative value */
rOffset += bufferInc;
if(rOffset >= L)
if (rOffset >= L)
{
rOffset -= L;
}
@ -6826,7 +6826,7 @@ void arm_rfft_fast_f32(
/* Care taken for table outside boundary */
/* Returns zero output when values are outside table boundary */
if(xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))
if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))
{
return (0);
}
@ -6900,7 +6900,7 @@ void arm_rfft_fast_f32(
/* Care taken for table outside boundary */
/* Returns zero output when values are outside table boundary */
if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
{
return (0);
}
@ -6974,7 +6974,7 @@ void arm_rfft_fast_f32(
/* Care taken for table outside boundary */
/* Returns zero output when values are outside table boundary */
if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
{
return (0);
}
@ -7052,7 +7052,7 @@ void arm_rfft_fast_f32(
/* Care taken for table outside boundary */
/* Returns zero output when values are outside table boundary */
if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
{
return (0);
}

@ -14,16 +14,16 @@ echo Building DSP Library for Cortex-M3 Little Endian
echo Building DSP Library for Cortex-M4 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log"
echo Building DSP Library for Cortex-M4 with FPU Little Endian
echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log"
echo Building DSP Library for Cortex-M7 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Little Endian
echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Little Endian
echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log"
echo Building DSP Library for ARMv8-M Baseline Little Endian
@ -32,19 +32,19 @@ echo Building DSP Library for ARMv8-M Baseline Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log"
echo Building DSP Library for ARMv8-M Mainline with single precision FPU Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with double precision FPU Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, single precision FPU Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, double precision FPU Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries
@ -58,16 +58,16 @@ echo Building DSP Library for Cortex-M3 Big Endian
echo Building DSP Library for Cortex-M4 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
echo Building DSP Library for Cortex-M4 with FPU Big Endian
echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
echo Building DSP Library for Cortex-M7 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Big Endian
echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Big Endian
echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo.

@ -14,16 +14,16 @@ echo Building DSP Library for Cortex-M3 Little Endian
echo Building DSP Library for Cortex-M4 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log"
echo Building DSP Library for Cortex-M4 with FPU Little Endian
echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log"
echo Building DSP Library for Cortex-M7 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Little Endian
echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Little Endian
echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log"
echo Building DSP Library for ARMv8-M Baseline Little Endian
@ -32,19 +32,19 @@ echo Building DSP Library for ARMv8-M Baseline Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log"
echo Building DSP Library for ARMv8-M Mainline with single precision FPU Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with double precision FPU Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, single precision FPU Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, double precision FPU Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries
@ -58,16 +58,16 @@ echo Building DSP Library for Cortex-M3 Big Endian
echo Building DSP Library for Cortex-M4 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
echo Building DSP Library for Cortex-M4 with FPU Big Endian
echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
echo Building DSP Library for Cortex-M7 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Big Endian
echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Big Endian
echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo.

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_abs_f32.c
*
* Description: Vector absolute value.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_abs_f32.c
*
* Description: Vector absolute value.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,41 +35,41 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
#include <math.h>
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @defgroup BasicAbs Vector Absolute Value
*
* Computes the absolute value of a vector on an element-by-element basis.
*
* <pre>
* pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
* </pre>
*
/**
* @defgroup BasicAbs Vector Absolute Value
*
* Computes the absolute value of a vector on an element-by-element basis.
*
* <pre>
* pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
* </pre>
*
* The functions support in-place computation allowing the source and
* destination pointers to reference the same memory buffer.
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup BasicAbs
* @{
/**
* @addtogroup BasicAbs
* @{
*/
/**
* @brief Floating-point vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
/**
* @brief Floating-point vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_abs_f32(
@ -79,7 +79,7 @@ void arm_abs_f32(
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4; /* temporary variables */
@ -87,9 +87,9 @@ void arm_abs_f32(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Calculate absolute and then store the results in the destination buffer. */
@ -136,7 +136,7 @@ void arm_abs_f32(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -147,9 +147,9 @@ void arm_abs_f32(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Calculate absolute and then store the results in the destination buffer. */
@ -160,6 +160,6 @@ void arm_abs_f32(
}
}
/**
* @} end of BasicAbs group
/**
* @} end of BasicAbs group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_abs_q15.c
*
* Description: Q15 vector absolute value.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_abs_q15.c
*
* Description: Q15 vector absolute value.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,31 +35,31 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAbs
* @{
/**
* @addtogroup BasicAbs
* @{
*/
/**
* @brief Q15 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
/**
* @brief Q15 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
*/
void arm_abs_q15(
@ -69,7 +69,7 @@ void arm_abs_q15(
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
__SIMD32_TYPE *simd;
/* Run the below code for Cortex-M4 and Cortex-M3 */
@ -81,10 +81,10 @@ void arm_abs_q15(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
simd = __SIMD32_CONST(pDst);
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Read two inputs */
@ -130,12 +130,12 @@ void arm_abs_q15(
blkCnt--;
}
pDst = (q15_t *)simd;
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Read the input */
@ -157,7 +157,7 @@ void arm_abs_q15(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Read the input */
@ -170,10 +170,10 @@ void arm_abs_q15(
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of BasicAbs group
/**
* @} end of BasicAbs group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_abs_q31.c
*
* Description: Q31 vector absolute value.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_abs_q31.c
*
* Description: Q31 vector absolute value.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,32 +35,32 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAbs
* @{
/**
* @addtogroup BasicAbs
* @{
*/
/**
* @brief Q31 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
/**
* @brief Q31 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
*/
void arm_abs_q31(
@ -71,7 +71,7 @@ void arm_abs_q31(
uint32_t blkCnt; /* loop counter */
q31_t in; /* Input value */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4;
@ -79,9 +79,9 @@ void arm_abs_q31(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
@ -99,7 +99,7 @@ void arm_abs_q31(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -110,9 +110,9 @@ void arm_abs_q31(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
@ -125,6 +125,6 @@ void arm_abs_q31(
}
/**
* @} end of BasicAbs group
/**
* @} end of BasicAbs group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_abs_q7.c
*
* Description: Q7 vector absolute value.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_abs_q7.c
*
* Description: Q7 vector absolute value.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -40,30 +40,30 @@
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAbs
* @{
/**
* @addtogroup BasicAbs
* @{
*/
/**
* @brief Q7 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* \par Conditions for optimum performance
* Input and output buffers should be aligned by 32-bit
*
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
/**
* @brief Q7 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* \par Conditions for optimum performance
* Input and output buffers should be aligned by 32-bit
*
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
*/
void arm_abs_q7(
@ -74,7 +74,7 @@ void arm_abs_q7(
uint32_t blkCnt; /* loop counter */
q7_t in; /* Input value1 */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4; /* temporary input variables */
@ -83,9 +83,9 @@ void arm_abs_q7(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Read inputs */
@ -128,7 +128,7 @@ void arm_abs_q7(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
@ -138,7 +138,7 @@ void arm_abs_q7(
#endif /* #define ARM_MATH_CM0_FAMILY */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = |A| */
/* Read the input */
@ -152,6 +152,6 @@ void arm_abs_q7(
}
}
/**
* @} end of BasicAbs group
/**
* @} end of BasicAbs group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_add_f32.c
*
* Description: Floating-point vector addition.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_add_f32.c
*
* Description: Floating-point vector addition.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,39 +35,39 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @defgroup BasicAdd Vector Addition
*
* Element-by-element addition of two vectors.
*
* <pre>
* pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
/**
* @defgroup BasicAdd Vector Addition
*
* Element-by-element addition of two vectors.
*
* <pre>
* pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup BasicAdd
* @{
/**
* @addtogroup BasicAdd
* @{
*/
/**
* @brief Floating-point vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
/**
* @brief Floating-point vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_add_f32(
@ -78,7 +78,7 @@ void arm_add_f32(
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */
@ -87,9 +87,9 @@ void arm_add_f32(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -121,7 +121,7 @@ void arm_add_f32(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -132,9 +132,9 @@ void arm_add_f32(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -145,6 +145,6 @@ void arm_add_f32(
}
}
/**
* @} end of BasicAdd group
/**
* @} end of BasicAdd group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_add_q15.c
*
* Description: Q15 vector addition
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_add_q15.c
*
* Description: Q15 vector addition
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,32 +35,32 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAdd
* @{
/**
* @addtogroup BasicAdd
* @{
*/
/**
* @brief Q15 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
/**
* @brief Q15 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
void arm_add_q15(
@ -71,7 +71,7 @@ void arm_add_q15(
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inB1, inB2;
@ -79,9 +79,9 @@ void arm_add_q15(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -97,11 +97,11 @@ void arm_add_q15(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -120,7 +120,7 @@ void arm_add_q15(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -130,11 +130,11 @@ void arm_add_q15(
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of BasicAdd group
/**
* @} end of BasicAdd group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_add_q31.c
*
* Description: Q31 vector addition.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_add_q31.c
*
* Description: Q31 vector addition.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,33 +35,33 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAdd
* @{
/**
* @addtogroup BasicAdd
* @{
*/
/**
* @brief Q31 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
/**
* @brief Q31 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
*/
void arm_add_q31(
@ -72,7 +72,7 @@ void arm_add_q31(
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inA3, inA4;
@ -81,9 +81,9 @@ void arm_add_q31(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -106,11 +106,11 @@ void arm_add_q31(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -129,7 +129,7 @@ void arm_add_q31(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -139,10 +139,10 @@ void arm_add_q31(
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of BasicAdd group
/**
* @} end of BasicAdd group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_add_q7.c
*
* Description: Q7 vector addition.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_add_q7.c
*
* Description: Q7 vector addition.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -40,27 +40,27 @@
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAdd
* @{
/**
* @addtogroup BasicAdd
* @{
*/
/**
* @brief Q7 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
/**
* @brief Q7 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
*/
void arm_add_q7(
@ -71,7 +71,7 @@ void arm_add_q7(
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
@ -79,9 +79,9 @@ void arm_add_q7(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -91,11 +91,11 @@ void arm_add_q7(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -114,7 +114,7 @@ void arm_add_q7(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
@ -124,11 +124,11 @@ void arm_add_q7(
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of BasicAdd group
/**
* @} end of BasicAdd group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_f32.c
*
* Description: Floating-point dot product.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_f32.c
*
* Description: Floating-point dot product.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,12 +35,12 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
/**
* @ingroup groupMath
*/
@ -52,23 +52,23 @@
*
* <pre>
* sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
* </pre>
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup dot_prod
* @{
/**
* @addtogroup dot_prod
* @{
*/
/**
* @brief Dot product of floating-point vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
/**
* @brief Dot product of floating-point vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*/
@ -82,15 +82,15 @@ void arm_dot_prod_f32(
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer */
@ -103,7 +103,7 @@ void arm_dot_prod_f32(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -114,10 +114,10 @@ void arm_dot_prod_f32(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer. */
@ -130,6 +130,6 @@ void arm_dot_prod_f32(
*result = sum;
}
/**
* @} end of dot_prod group
/**
* @} end of dot_prod group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q15.c
*
* Description: Q15 dot product.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q15.c
*
* Description: Q15 dot product.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -40,30 +40,30 @@
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup dot_prod
* @{
/**
* @addtogroup dot_prod
* @{
*/
/**
* @brief Dot product of Q15 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
* results are added to a 64-bit accumulator in 34.30 format.
* Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
* there is no risk of overflow.
* The return result is in 34.30 format.
/**
* @brief Dot product of Q15 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
* results are added to a 64-bit accumulator in 34.30 format.
* Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
* there is no risk of overflow.
* The return result is in 34.30 format.
*/
void arm_dot_prod_q15(
@ -75,7 +75,7 @@ void arm_dot_prod_q15(
q63_t sum = 0; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
@ -83,9 +83,9 @@ void arm_dot_prod_q15(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer. */
@ -96,11 +96,11 @@ void arm_dot_prod_q15(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the results in a temporary buffer. */
@ -118,7 +118,7 @@ void arm_dot_prod_q15(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the results in a temporary buffer. */
@ -128,13 +128,13 @@ void arm_dot_prod_q15(
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
/* Store the result in the destination buffer in 34.30 format */
*result = sum;
}
/**
* @} end of dot_prod group
/**
* @} end of dot_prod group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q31.c
*
* Description: Q31 dot product.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q31.c
*
* Description: Q31 dot product.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,36 +35,36 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup dot_prod
* @{
/**
* @addtogroup dot_prod
* @{
*/
/**
* @brief Dot product of Q31 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
* are truncated to 2.48 format by discarding the lower 14 bits.
* The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
* There are 15 guard bits in the accumulator and there is no risk of overflow as long as
* the length of the vectors is less than 2^16 elements.
* The return result is in 16.48 format.
/**
* @brief Dot product of Q31 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
* are truncated to 2.48 format by discarding the lower 14 bits.
* The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
* There are 15 guard bits in the accumulator and there is no risk of overflow as long as
* the length of the vectors is less than 2^16 elements.
* The return result is in 16.48 format.
*/
void arm_dot_prod_q31(
@ -77,7 +77,7 @@ void arm_dot_prod_q31(
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inA3, inA4;
@ -86,9 +86,9 @@ void arm_dot_prod_q31(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer. */
@ -110,7 +110,7 @@ void arm_dot_prod_q31(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -121,10 +121,10 @@ void arm_dot_prod_q31(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer. */
@ -138,6 +138,6 @@ void arm_dot_prod_q31(
*result = sum;
}
/**
* @} end of dot_prod group
/**
* @} end of dot_prod group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q7.c
*
* Description: Q7 dot product.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q7.c
*
* Description: Q7 dot product.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -40,30 +40,30 @@
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup dot_prod
* @{
/**
* @addtogroup dot_prod
* @{
*/
/**
* @brief Dot product of Q7 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
* results are added to an accumulator in 18.14 format.
* Nonsaturating additions are used and there is no danger of wrap around as long as
* the vectors are less than 2^18 elements long.
* The return result is in 18.14 format.
/**
* @brief Dot product of Q7 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
* results are added to an accumulator in 18.14 format.
* Nonsaturating additions are used and there is no danger of wrap around as long as
* the vectors are less than 2^18 elements long.
* The return result is in 18.14 format.
*/
void arm_dot_prod_q7(
@ -76,7 +76,7 @@ void arm_dot_prod_q7(
q31_t sum = 0; /* Temporary variables to store output */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
@ -88,9 +88,9 @@ void arm_dot_prod_q7(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* read 4 samples at a time from sourceA */
input1 = *__SIMD32(pSrcA)++;
@ -114,11 +114,11 @@ void arm_dot_prod_q7(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Dot product and then store the results in a temporary buffer. */
@ -137,7 +137,7 @@ void arm_dot_prod_q7(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Dot product and then store the results in a temporary buffer. */
@ -147,13 +147,13 @@ void arm_dot_prod_q7(
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
/* Store the result in the destination buffer in 18.14 format */
*result = sum;
}
/**
* @} end of dot_prod group
/**
* @} end of dot_prod group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_mult_f32.c
*
* Description: Floating-point vector multiplication.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_mult_f32.c
*
* Description: Floating-point vector multiplication.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,39 +35,39 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @defgroup BasicMult Vector Multiplication
*
* Element-by-element multiplication of two vectors.
*
* <pre>
* pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
/**
* @defgroup BasicMult Vector Multiplication
*
* Element-by-element multiplication of two vectors.
*
* <pre>
* pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup BasicMult
* @{
/**
* @addtogroup BasicMult
* @{
*/
/**
* @brief Floating-point vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
/**
* @brief Floating-point vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_mult_f32(
@ -77,7 +77,7 @@ void arm_mult_f32(
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t inA1, inA2, inA3, inA4; /* temporary input variables */
@ -87,9 +87,9 @@ void arm_mult_f32(
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the results in output buffer */
@ -145,7 +145,7 @@ void arm_mult_f32(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -156,9 +156,9 @@ void arm_mult_f32(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the results in output buffer */
@ -169,6 +169,6 @@ void arm_mult_f32(
}
}
/**
* @} end of BasicMult group
/**
* @} end of BasicMult group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. October 2015
* $Revision: V.1.4.5 a
*
* Project: CMSIS DSP Library
* Title: arm_mult_q15.c
*
* Description: Q15 vector multiplication.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_mult_q15.c
*
* Description: Q15 vector multiplication.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,33 +35,33 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicMult
* @{
/**
* @addtogroup BasicMult
* @{
*/
/**
* @brief Q15 vector multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
/**
* @brief Q15 vector multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
void arm_mult_q15(
@ -72,7 +72,7 @@ void arm_mult_q15(
{
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inB1, inB2; /* temporary input variables */
@ -82,9 +82,9 @@ void arm_mult_q15(
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* read two samples at a time from sourceA */
inA1 = *__SIMD32(pSrcA)++;
@ -124,7 +124,7 @@ void arm_mult_q15(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -135,10 +135,10 @@ void arm_mult_q15(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the result in the destination buffer */
@ -149,6 +149,6 @@ void arm_mult_q15(
}
}
/**
* @} end of BasicMult group
/**
* @} end of BasicMult group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_mult_q31.c
*
* Description: Q31 vector multiplication.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_mult_q31.c
*
* Description: Q31 vector multiplication.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,32 +35,32 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicMult
* @{
/**
* @addtogroup BasicMult
* @{
*/
/**
* @brief Q31 vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
/**
* @brief Q31 vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
*/
void arm_mult_q31(
@ -71,7 +71,7 @@ void arm_mult_q31(
{
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inA3, inA4; /* temporary input variables */
@ -81,9 +81,9 @@ void arm_mult_q31(
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and then store the results in the destination buffer. */
@ -115,11 +115,11 @@ void arm_mult_q31(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and then store the results in the destination buffer. */
@ -141,7 +141,7 @@ void arm_mult_q31(
blkCnt = blockSize;
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and then store the results in the destination buffer. */
@ -151,10 +151,10 @@ void arm_mult_q31(
/* Decrement the blockSize loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of BasicMult group
/**
* @} end of BasicMult group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_mult_q7.c
*
* Description: Q7 vector multiplication.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_mult_q7.c
*
* Description: Q7 vector multiplication.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,32 +35,32 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicMult
* @{
/**
* @addtogroup BasicMult
* @{
*/
/**
* @brief Q7 vector multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
/**
* @brief Q7 vector multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
*/
void arm_mult_q7(
@ -71,7 +71,7 @@ void arm_mult_q7(
{
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
@ -79,9 +79,9 @@ void arm_mult_q7(
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the results in temporary variables */
@ -97,7 +97,7 @@ void arm_mult_q7(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -108,10 +108,10 @@ void arm_mult_q7(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the result in the destination buffer */
@ -122,6 +122,6 @@ void arm_mult_q7(
}
}
/**
* @} end of BasicMult group
/**
* @} end of BasicMult group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_negate_f32.c
*
* Description: Negates floating-point vectors.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_negate_f32.c
*
* Description: Negates floating-point vectors.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,40 +35,40 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @defgroup negate Vector Negate
*
* Negates the elements of a vector.
*
* <pre>
* pDst[n] = -pSrc[n], 0 <= n < blockSize.
* </pre>
/**
* @defgroup negate Vector Negate
*
* Negates the elements of a vector.
*
* <pre>
* pDst[n] = -pSrc[n], 0 <= n < blockSize.
* </pre>
*
* The functions support in-place computation allowing the source and
* destination pointers to reference the same memory buffer.
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup negate
* @{
/**
* @addtogroup negate
* @{
*/
/**
* @brief Negates the elements of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
/**
* @brief Negates the elements of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_negate_f32(
@ -79,7 +79,7 @@ void arm_negate_f32(
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4; /* temporary variables */
@ -87,9 +87,9 @@ void arm_negate_f32(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* read inputs from source */
in1 = *pSrc;
@ -117,7 +117,7 @@ void arm_negate_f32(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -128,9 +128,9 @@ void arm_negate_f32(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the results in the destination buffer. */
@ -141,6 +141,6 @@ void arm_negate_f32(
}
}
/**
* @} end of negate group
/**
* @} end of negate group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_negate_q15.c
*
* Description: Negates Q15 vectors.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_negate_q15.c
*
* Description: Negates Q15 vectors.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,34 +35,34 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup negate
* @{
/**
* @addtogroup negate
* @{
*/
/**
* @brief Negates the elements of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* \par Conditions for optimum performance
* Input and output buffers should be aligned by 32-bit
*
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
/**
* @brief Negates the elements of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* \par Conditions for optimum performance
* Input and output buffers should be aligned by 32-bit
*
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
*/
void arm_negate_q15(
@ -73,7 +73,7 @@ void arm_negate_q15(
uint32_t blkCnt; /* loop counter */
q15_t in;
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
@ -83,9 +83,9 @@ void arm_negate_q15(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = -A */
/* Read two inputs at a time */
@ -112,7 +112,7 @@ void arm_negate_q15(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -123,9 +123,9 @@ void arm_negate_q15(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the result in the destination buffer. */
@ -137,6 +137,6 @@ void arm_negate_q15(
}
}
/**
* @} end of negate group
/**
* @} end of negate group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_negate_q31.c
*
* Description: Negates Q31 vectors.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_negate_q31.c
*
* Description: Negates Q31 vectors.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,31 +35,31 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup negate
* @{
/**
* @addtogroup negate
* @{
*/
/**
* @brief Negates the elements of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
/**
* @brief Negates the elements of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
*/
void arm_negate_q31(
@ -70,7 +70,7 @@ void arm_negate_q31(
q31_t in; /* Temporary variable */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4;
@ -78,9 +78,9 @@ void arm_negate_q31(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the results in the destination buffer. */
@ -98,7 +98,7 @@ void arm_negate_q31(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -109,10 +109,10 @@ void arm_negate_q31(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the result in the destination buffer. */
@ -124,6 +124,6 @@ void arm_negate_q31(
}
}
/**
* @} end of negate group
/**
* @} end of negate group
*/

@ -1,24 +1,24 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. March 2015
* $Revision: V.1.4.5
*
* Project: CMSIS DSP Library
* Title: arm_negate_q7.c
*
* Description: Negates Q7 vectors.
*
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 03. January 2017
* $Revision: V.1.5.0
*
* Project: CMSIS DSP Library
* Title: arm_negate_q7.c
*
* Description: Negates Q7 vectors.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
@ -27,7 +27,7 @@
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
@ -35,31 +35,31 @@
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
/**
* @ingroup groupMath
*/
/**
* @addtogroup negate
* @{
/**
* @addtogroup negate
* @{
*/
/**
* @brief Negates the elements of a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
/**
* @brief Negates the elements of a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
*/
void arm_negate_q7(
@ -70,7 +70,7 @@ void arm_negate_q7(
uint32_t blkCnt; /* loop counter */
q7_t in;
#ifndef ARM_MATH_CM0_FAMILY
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t input; /* Input values1-4 */
@ -80,9 +80,9 @@ void arm_negate_q7(
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = -A */
/* Read four inputs */
@ -95,7 +95,7 @@ void arm_negate_q7(
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
@ -106,9 +106,9 @@ void arm_negate_q7(
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
#endif /* #if defined (ARM_MATH_DSP) */
while(blkCnt > 0u)
while (blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the results in the destination buffer. */ \
@ -120,6 +120,6 @@ void arm_negate_q7(
}
}
/**
* @} end of negate group
/**
* @} end of negate group
*/

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