diff --git a/Include/dsp/support_functions.h b/Include/dsp/support_functions.h
index 9c775932..ba712b9a 100755
--- a/Include/dsp/support_functions.h
+++ b/Include/dsp/support_functions.h
@@ -43,6 +43,63 @@ extern "C"
*/
+/**
+ * @brief Converts the elements of the 64 bit floating-point vector to floating-point vector.
+ * @param[in] pSrc points to the floating-point 64 input vector
+ * @param[out] pDst points to the floating-point output vector
+ * @param[in] blockSize length of the input vector
+ */
+ void arm_f64_to_float(
+ const float64_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+/**
+ * @brief Converts the elements of the 64 bit floating-point vector to floating-point vector.
+ * @param[in] pSrc points to the floating-point 64 input vector
+ * @param[out] pDst points to the Q31 output vector
+ * @param[in] blockSize length of the input vector
+ */
+ void arm_f64_to_q31(
+ const float64_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+/**
+ * @brief Converts the elements of the 64 bit floating-point vector to floating-point vector.
+ * @param[in] pSrc points to the floating-point 64 input vector
+ * @param[out] pDst points to the Q15 output vector
+ * @param[in] blockSize length of the input vector
+ */
+ void arm_f64_to_q15(
+ const float64_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+/**
+ * @brief Converts the elements of the 64 bit floating-point vector to floating-point vector.
+ * @param[in] pSrc points to the floating-point 64 input vector
+ * @param[out] pDst points to the Q7 output vector
+ * @param[in] blockSize length of the input vector
+ */
+ void arm_f64_to_q7(
+ const float64_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+
+/**
+ * @brief Converts the elements of the floating-point vector to 64 bit floating-point vector.
+ * @param[in] pSrc points to the floating-point 64 input vector
+ * @param[out] pDst points to the floating-point output vector
+ * @param[in] blockSize length of the input vector
+ */
+ void arm_float_to_f64(
+ const float32_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize);
+
/**
* @brief Converts the elements of the floating-point vector to Q31 vector.
* @param[in] pSrc points to the floating-point input vector
@@ -78,6 +135,16 @@ extern "C"
q7_t * pDst,
uint32_t blockSize);
+/**
+ * @brief Converts the elements of the Q31 vector to 64 bit floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+void arm_q31_to_f64(
+const q31_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize);
/**
* @brief Converts the elements of the Q31 vector to floating-point vector.
@@ -114,6 +181,16 @@ extern "C"
q7_t * pDst,
uint32_t blockSize);
+/**
+ * @brief Converts the elements of the Q15 vector to 64 bit floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+void arm_q15_to_f64(
+const q15_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize);
/**
* @brief Converts the elements of the Q15 vector to floating-point vector.
@@ -150,6 +227,16 @@ extern "C"
q7_t * pDst,
uint32_t blockSize);
+/**
+ * @brief Converts the elements of the Q7 vector to 64 bit floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+void arm_q7_to_f64(
+const q7_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize);
/**
* @brief Converts the elements of the Q7 vector to floating-point vector.
diff --git a/Include/dsp/support_functions_f16.h b/Include/dsp/support_functions_f16.h
index bc3f2668..cd63a0e0 100755
--- a/Include/dsp/support_functions_f16.h
+++ b/Include/dsp/support_functions_f16.h
@@ -72,6 +72,21 @@ void arm_f16_to_q15(const float16_t * pSrc, q15_t * pDst, uint32_t blockSize);
*/
void arm_q15_to_f16(const q15_t * pSrc, float16_t * pDst, uint32_t blockSize);
+/**
+ * @brief Converts the elements of the floating-point vector to Q31 vector.
+ * @param[in] pSrc points to the f32 input vector
+ * @param[out] pDst points to the f16 output vector
+ * @param[in] blockSize length of the input vector
+ */
+void arm_f64_to_f16(const float64_t * pSrc, float16_t * pDst, uint32_t blockSize);
+
+/**
+ * @brief Converts the elements of the floating-point vector to Q31 vector.
+ * @param[in] pSrc points to the f32 input vector
+ * @param[out] pDst points to the f16 output vector
+ * @param[in] blockSize length of the input vector
+ */
+void arm_f16_to_f64(const float16_t * pSrc, float64_t * pDst, uint32_t blockSize);
/**
* @brief Converts the elements of the floating-point vector to Q31 vector.
diff --git a/Source/SupportFunctions/SupportFunctions.c b/Source/SupportFunctions/SupportFunctions.c
index ca8b1b6c..5b192c7b 100644
--- a/Source/SupportFunctions/SupportFunctions.c
+++ b/Source/SupportFunctions/SupportFunctions.c
@@ -49,15 +49,23 @@
#include "arm_sort_init_f32.c"
#include "arm_weighted_sum_f32.c"
+#include "arm_f64_to_float.c"
+#include "arm_f64_to_q31.c"
+#include "arm_f64_to_q15.C"
+#include "arm_f64_to_q7.c"
+#include "arm_float_to_f64.c"
#include "arm_float_to_q15.c"
#include "arm_float_to_q31.c"
#include "arm_float_to_q7.c"
+#include "arm_q15_to_f64.c"
#include "arm_q15_to_float.c"
#include "arm_q15_to_q31.c"
#include "arm_q15_to_q7.c"
+#include "arm_q31_to_f64.c"
#include "arm_q31_to_float.c"
#include "arm_q31_to_q15.c"
#include "arm_q31_to_q7.c"
+#include "arm_q7_to_f64.c"
#include "arm_q7_to_float.c"
#include "arm_q7_to_q15.c"
#include "arm_q7_to_q31.c"
diff --git a/Source/SupportFunctions/SupportFunctionsF16.c b/Source/SupportFunctions/SupportFunctionsF16.c
index 0e39d8d1..890e6876 100755
--- a/Source/SupportFunctions/SupportFunctionsF16.c
+++ b/Source/SupportFunctions/SupportFunctionsF16.c
@@ -30,6 +30,8 @@
#include "arm_fill_f16.c"
#include "arm_f16_to_q15.c"
#include "arm_f16_to_float.c"
+#include "arm_f16_to_f64.c"
+#include "arm_f64_to_f16.c"
#include "arm_q15_to_f16.c"
#include "arm_float_to_f16.c"
#include "arm_weighted_sum_f16.c"
diff --git a/Source/SupportFunctions/arm_f16_to_f64.c b/Source/SupportFunctions/arm_f16_to_f64.c
new file mode 100644
index 00000000..cb15b72b
--- /dev/null
+++ b/Source/SupportFunctions/arm_f16_to_f64.c
@@ -0,0 +1,82 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_f16_to_f64.c
+ * Description: Converts the elements of the floating-point 16 bit vector to floating-point 64 bit vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ @addtogroup f16_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the f16 vector to f64 vector.
+ @param[in] pSrc points to the f16 input vector
+ @param[out] pDst points to the f64 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ */
+
+void arm_f16_to_f64(
+ const float16_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize)
+
+{
+ const float16_t *pIn = pSrc; /* Src pointer */
+ uint32_t blkCnt; /* loop counter */
+
+ /*
+ * Loop over blockSize number of values
+ */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+
+ *pDst++ = (float64_t) * pIn++;
+ /*
+ * Decrement the loop counter
+ */
+ blkCnt--;
+ }
+}
+
+
+
+/**
+ @} end of f16_to_x group
+ */
+
+
+
diff --git a/Source/SupportFunctions/arm_f64_to_f16.c b/Source/SupportFunctions/arm_f64_to_f16.c
new file mode 100644
index 00000000..db5082c8
--- /dev/null
+++ b/Source/SupportFunctions/arm_f64_to_f16.c
@@ -0,0 +1,80 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_f64_to_f16.c
+ * Description: Converts the elements of the 64 bit floating-point vector to 16 bit floating-point vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ * @defgroup f64_to_x Convert 64-bit floating point value
+ */
+
+/**
+ @addtogroup f64_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the f64 vector to f16 vector.
+ @param[in] pSrc points to the f64 input vector
+ @param[out] pDst points to the f16 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ */
+
+
+void arm_f64_to_f16(
+ const float64_t * pSrc,
+ float16_t * pDst,
+ uint32_t blockSize)
+{
+ const float64_t *pIn = pSrc; /* Src pointer */
+ uint32_t blkCnt; /* loop counter */
+
+ /*
+ * Loop over blockSize number of values
+ */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+
+ *pDst++ = (float16_t) * pIn++;
+ /*
+ * Decrement the loop counter
+ */
+ blkCnt--;
+ }
+}
+/**
+ @} end of f64_to_x group
+ */
+
diff --git a/Source/SupportFunctions/arm_f64_to_float.c b/Source/SupportFunctions/arm_f64_to_float.c
new file mode 100644
index 00000000..1a6621dc
--- /dev/null
+++ b/Source/SupportFunctions/arm_f64_to_float.c
@@ -0,0 +1,79 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_f64_to_float.c
+ * Description: Converts the elements of the floating-point 64 bit vector to floating-point vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ * @defgroup f64_to_x Convert 64-bit floating point value
+ */
+
+/**
+ @addtogroup f64_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the f64 vector to f32 vector.
+ @param[in] pSrc points to the f64 input vector
+ @param[out] pDst points to the f32 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ */
+
+
+void arm_f64_to_float(
+ const float64_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ const float64_t *pIn = pSrc; /* Src pointer */
+ uint32_t blkCnt; /* loop counter */
+
+ /*
+ * Loop over blockSize number of values
+ */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+
+ *pDst++ = (float32_t) * pIn++;
+ /*
+ * Decrement the loop counter
+ */
+ blkCnt--;
+ }
+}
+/**
+ @} end of f64_to_x group
+ */
diff --git a/Source/SupportFunctions/arm_f64_to_q15.c b/Source/SupportFunctions/arm_f64_to_q15.c
new file mode 100644
index 00000000..169e9773
--- /dev/null
+++ b/Source/SupportFunctions/arm_f64_to_q15.c
@@ -0,0 +1,154 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_f64_to_q15.c
+ * Description: Converts the elements of the 64 bit floating-point vector to Q15 vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ @addtogroup f64_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the floating-point vector to Q15 vector.
+ @param[in] pSrc points to the 64 bit floating-point input vector
+ @param[out] pDst points to the Q15 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+
+ pDst[n] = (q15_t)(pSrc[n] * 32768); 0 <= n < blockSize.
+
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+
+ @note
+ In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+ defined in the preprocessor section of project options.
+ */
+
+void arm_f64_to_q15(
+ const float64_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* Loop counter */
+ const float64_t *pIn = pSrc; /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+ float64_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * 32768 */
+
+ /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 32768.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+ in = (*pIn++ * 32768.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+ in = (*pIn++ * 32768.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+ in = (*pIn++ * 32768.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+ *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+ *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+ *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+ *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * 32768 */
+
+ /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 32768.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+ /* C = A * 32768 */
+ /* Convert from float to q15 and then store the results in the destination buffer */
+ *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+}
+
+
+/**
+ @} end of f64_to_x group
+ */
+
diff --git a/Source/SupportFunctions/arm_f64_to_q31.c b/Source/SupportFunctions/arm_f64_to_q31.c
new file mode 100644
index 00000000..beb88a6b
--- /dev/null
+++ b/Source/SupportFunctions/arm_f64_to_q31.c
@@ -0,0 +1,157 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_f64_to_q31.c
+ * Description: Converts the elements of the 64 bit floating-point vector to Q31 vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+ @ingroup groupSupport
+ */
+
+
+/**
+ @addtogroup f64_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the floating-point vector to Q31 vector.
+ @param[in] pSrc points to the 64 bit floating-point input vector
+ @param[out] pDst points to the Q31 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+
+ pDst[n] = (q31_t)(pSrc[n] * 2147483648); 0 <= n < blockSize.
+
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+
+ @note
+ In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+ defined in the preprocessor section of project options.
+ */
+
+
+void arm_f64_to_q31(
+ const float64_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* Loop counter */
+ const float64_t *pIn = pSrc; /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+ float64_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * 2147483648 */
+
+ /* convert from float to Q31 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 2147483648.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+ in = (*pIn++ * 2147483648.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+ in = (*pIn++ * 2147483648.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+ in = (*pIn++ * 2147483648.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+ /* C = A * 2147483648 */
+ /* Convert from float to Q31 and then store the results in the destination buffer */
+ *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+ *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+ *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+ *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * 2147483648 */
+
+ /* convert from float to Q31 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 2147483648.0f);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+ /* C = A * 2147483648 */
+ /* Convert from float to Q31 and then store the results in the destination buffer */
+ *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+}
+
+
+/**
+ @} end of f64_to_x group
+ */
diff --git a/Source/SupportFunctions/arm_f64_to_q7.c b/Source/SupportFunctions/arm_f64_to_q7.c
new file mode 100644
index 00000000..c9f87602
--- /dev/null
+++ b/Source/SupportFunctions/arm_f64_to_q7.c
@@ -0,0 +1,151 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_f64_to_q7.c
+ * Description: Converts the elements of the 64 bit floating-point vector to Q7 vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ @addtogroup f64_to_x
+ @{
+ */
+
+/**
+ * @brief Converts the elements of the floating-point vector to Q7 vector.
+ * @param[in] *pSrc points to the 64 bit floating-point input vector
+ * @param[out] *pDst points to the Q7 output vector
+ * @param[in] blockSize length of the input vector
+ * @return none.
+ *
+ *\par Description:
+ * \par
+ * The equation used for the conversion process is:
+ *
+ * pDst[n] = (q7_t)(pSrc[n] * 128); 0 <= n < blockSize.
+ *
+ * \par Scaling and Overflow Behavior:
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ * \note
+ * In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+ * defined in the preprocessor section of project options.
+ */
+
+void arm_f64_to_q7(
+ const float64_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* Loop counter */
+ const float64_t *pIn = pSrc; /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+ float64_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * 128 */
+
+ /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 128);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+ in = (*pIn++ * 128);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+ in = (*pIn++ * 128);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+ in = (*pIn++ * 128);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+ *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+ *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+ *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+ *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * 128 */
+
+ /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 128);
+ in += in > 0.0f ? 0.5f : -0.5f;
+ *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+ *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+}
+
+
+/**
+ @} end of f64_to_x group
+ */
diff --git a/Source/SupportFunctions/arm_float_to_f64.c b/Source/SupportFunctions/arm_float_to_f64.c
new file mode 100644
index 00000000..b8aaaa71
--- /dev/null
+++ b/Source/SupportFunctions/arm_float_to_f64.c
@@ -0,0 +1,85 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_float_to_f64.c
+ * Description: Converts the elements of the floating-point vector to floating-point 64 bit vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+
+
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ @addtogroup f64_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the floating-point vector to f64 vector.
+ @param[in] pSrc points to the f32 input vector
+ @param[out] pDst points to the f64 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ */
+
+void arm_float_to_f64(
+ const float32_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize)
+
+{
+ const float32_t *pIn = pSrc; /* Src pointer */
+ uint32_t blkCnt; /* loop counter */
+
+ /*
+ * Loop over blockSize number of values
+ */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+
+ *pDst++ = (float64_t) * pIn++;
+ /*
+ * Decrement the loop counter
+ */
+ blkCnt--;
+ }
+}
+
+
+
+/**
+ @} end of f64_to_x group
+ */
+
+
+
+
diff --git a/Source/SupportFunctions/arm_q15_to_f64.c b/Source/SupportFunctions/arm_q15_to_f64.c
new file mode 100644
index 00000000..b52a0813
--- /dev/null
+++ b/Source/SupportFunctions/arm_q15_to_f64.c
@@ -0,0 +1,111 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_q15_to_f64.c
+ * Description: Converts the elements of the Q15 vector to 64 bit floating-point vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q15_to_x Convert 16-bit fixed point value
+ */
+
+/**
+ @addtogroup q15_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the Q15 vector to floating-point vector.
+ @param[in] pSrc points to the Q15 input vector
+ @param[out] pDst points to the 64 bit floating-point output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+
+ pDst[n] = (float32_t) pSrc[n] / 32768; 0 <= n < blockSize.
+
+ */
+
+void arm_q15_to_f64(
+ const q15_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* Loop counter */
+ const q15_t *pIn = pSrc; /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = (float32_t) A / 32768 */
+
+ /* Convert from q15 to float and store result in destination buffer */
+ *pDst++ = ((float64_t) * pIn++ / 32768.0f);
+ *pDst++ = ((float64_t) * pIn++ / 32768.0f);
+ *pDst++ = ((float64_t) * pIn++ / 32768.0f);
+ *pDst++ = ((float64_t) * pIn++ / 32768.0f);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = (float32_t) A / 32768 */
+
+ /* Convert from q15 to float and store result in destination buffer */
+ *pDst++ = ((float64_t) *pIn++ / 32768.0f);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+}
+
+
+/**
+ @} end of q15_to_x group
+ */
diff --git a/Source/SupportFunctions/arm_q31_to_f64.c b/Source/SupportFunctions/arm_q31_to_f64.c
new file mode 100644
index 00000000..85635e33
--- /dev/null
+++ b/Source/SupportFunctions/arm_q31_to_f64.c
@@ -0,0 +1,111 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_q31_to_f64.c
+ * Description: Converts the elements of the Q31 vector to 64 bit floating-point vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q31_to_x Convert 32-bit fixed point value
+ */
+
+/**
+ @addtogroup q31_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the Q31 vector to floating-point vector.
+ @param[in] pSrc points to the Q31 input vector
+ @param[out] pDst points to the floating-point output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+
+ pDst[n] = (float32_t) pSrc[n] / 2147483648; 0 <= n < blockSize.
+
+ */
+
+void arm_q31_to_f64(
+ const q31_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize)
+{
+ const q31_t *pIn = pSrc; /* Src pointer */
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = (float32_t) A / 2147483648 */
+
+ /* Convert from q31 to float and store result in destination buffer */
+ *pDst++ = ((float64_t) *pIn++ / 2147483648.0f);
+ *pDst++ = ((float64_t) *pIn++ / 2147483648.0f);
+ *pDst++ = ((float64_t) *pIn++ / 2147483648.0f);
+ *pDst++ = ((float64_t) *pIn++ / 2147483648.0f);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = (float32_t) A / 2147483648 */
+
+ /* Convert from q31 to float and store result in destination buffer */
+ *pDst++ = ((float64_t) *pIn++ / 2147483648.0f);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+}
+
+
+/**
+ @} end of q31_to_x group
+ */
diff --git a/Source/SupportFunctions/arm_q7_to_f64.c b/Source/SupportFunctions/arm_q7_to_f64.c
new file mode 100644
index 00000000..37d2f911
--- /dev/null
+++ b/Source/SupportFunctions/arm_q7_to_f64.c
@@ -0,0 +1,110 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_q7_to_f64.c
+ * Description: Converts the elements of the Q7 vector to 64 bit floating-point vector
+ *
+ * $Date: 23 April 2021
+ * $Revision: V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+ @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q7_to_x Convert 8-bit fixed point value
+ */
+
+/**
+ @addtogroup q7_to_x
+ @{
+ */
+
+/**
+ @brief Converts the elements of the Q7 vector to floating-point vector.
+ @param[in] pSrc points to the Q7 input vector
+ @param[out] pDst points to the 64 bit floating-point output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+
+ pDst[n] = (float32_t) pSrc[n] / 128; 0 <= n < blockSize.
+
+ */
+void arm_q7_to_f64(
+ const q7_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* Loop counter */
+ const q7_t *pIn = pSrc; /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = (float32_t) A / 128 */
+
+ /* Convert from q7 to float and store result in destination buffer */
+ *pDst++ = ((float64_t) * pIn++ / 128.0f);
+ *pDst++ = ((float64_t) * pIn++ / 128.0f);
+ *pDst++ = ((float64_t) * pIn++ / 128.0f);
+ *pDst++ = ((float64_t) * pIn++ / 128.0f);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = (float32_t) A / 128 */
+
+ /* Convert from q7 to float and store result in destination buffer */
+ *pDst++ = ((float64_t) * pIn++ / 128.0f);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+}
+
+
+/**
+ @} end of q7_to_x group
+ */