/* ---------------------------------------------------------------------- * Project: CMSIS DSP Library * Title: Zip.h * Description: Node to zip a pair of stream * * * Target Processor: Cortex-M and Cortex-A cores * -------------------------------------------------------------------- * * Copyright (C) 2021-2023 ARM Limited or its affiliates. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the License); you may * not use this file except in compliance with the License. * You may obtain a copy of the License at * * www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. */ #ifndef _ZIP_H_ #define _ZIP_H_ template class Zip; template class Zip: public GenericNode21 { public: Zip(FIFOBase &src1,FIFOBase &src2,FIFOBase &dst): GenericNode21(src1,src2,dst){}; int prepareForRunning() final { if (this->willOverflow() || this->willUnderflow1() || this->willUnderflow2() ) { return(CG_SKIP_EXECUTION_ID_CODE); // Skip execution } return(0); }; int run() final { IN *a1=this->getReadBuffer1(); IN *a2=this->getReadBuffer2(); IN *b=this->getWriteBuffer1(); for(int i = 0; i