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103 lines
3.3 KiB
C
103 lines
3.3 KiB
C
/**************************************************************************//**
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* @file system_ARMv81MML.c
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* @brief CMSIS Device System Source File for
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* Armv8.1-M Mainline Device Series
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* @version V1.2.0
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* @date 23. July 2019
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******************************************************************************/
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/*
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* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if defined (ARMv81MML_DSP_DP_MVE_FP)
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#include "ARMv81MML_DSP_DP_MVE_FP.h"
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#else
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#error device not specified!
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#endif
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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#include "partition_ARMv81MML.h"
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#endif
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/*----------------------------------------------------------------------------
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Define clocks
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*----------------------------------------------------------------------------*/
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#define XTAL ( 5000000UL) /* Oscillator frequency */
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#define SYSTEM_CLOCK (5U * XTAL)
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#define DEBUG_DEMCR (*((unsigned int *)0xE000EDFC))
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#define DEBUG_TRCENA (1<<24) //Global debug enable bit
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#define CCR (*((volatile unsigned int *)0xE000ED14))
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#define CCR_DL (1 << 19)
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/*----------------------------------------------------------------------------
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Externals
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*----------------------------------------------------------------------------*/
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#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
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extern uint32_t __VECTOR_TABLE;
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#endif
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/*----------------------------------------------------------------------------
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System Core Clock Variable
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*----------------------------------------------------------------------------*/
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uint32_t SystemCoreClock = SYSTEM_CLOCK;
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/*----------------------------------------------------------------------------
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System Core Clock update function
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*----------------------------------------------------------------------------*/
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void SystemCoreClockUpdate (void)
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{
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SystemCoreClock = SYSTEM_CLOCK;
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}
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/*----------------------------------------------------------------------------
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System initialization function
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*----------------------------------------------------------------------------*/
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void SystemInit (void)
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{
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#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
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SCB->VTOR = (uint32_t)(&__VECTOR_TABLE);
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#endif
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#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \
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(defined (__MVE_USED) && (__MVE_USED == 1U))
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SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
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(3U << 11U*2U) ); /* enable CP11 Full Access */
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#endif
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#ifdef UNALIGNED_SUPPORT_DISABLE
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SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
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#endif
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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TZ_SAU_Setup();
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#endif
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SystemCoreClock = SYSTEM_CLOCK;
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//Disable debug
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DEBUG_DEMCR &=~ DEBUG_TRCENA;
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// enable DL branch cache
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CCR |= CCR_DL;
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}
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