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173 lines
4.7 KiB
C
173 lines
4.7 KiB
C
/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_cmplx_mult_real_f16.c
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* Description: Floating-point complex by real multiplication
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*
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* $Date: 23 April 2021
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* $Revision: V1.9.0
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*
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* Target Processor: Cortex-M and Cortex-A cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "dsp/complex_math_functions_f16.h"
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#if defined(ARM_FLOAT16_SUPPORTED)
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/**
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@ingroup groupCmplxMath
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*/
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/**
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@addtogroup CmplxByRealMult
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@{
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*/
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/**
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@brief Floating-point complex-by-real multiplication.
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@param[in] pSrcCmplx points to complex input vector
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@param[in] pSrcReal points to real input vector
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@param[out] pCmplxDst points to complex output vector
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@param[in] numSamples number of samples in each vector
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@return none
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*/
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#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
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void arm_cmplx_mult_real_f16(
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const float16_t * pSrcCmplx,
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const float16_t * pSrcReal,
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float16_t * pCmplxDst,
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uint32_t numSamples)
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{
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static const uint16_t stride_cmplx_x_real_16[8] = {
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0, 0, 1, 1, 2, 2, 3, 3
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};
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uint32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */
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uint32_t blkCnt;
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f16x8_t rVec;
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f16x8_t cmplxVec;
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f16x8_t dstVec;
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uint16x8_t strideVec;
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/* stride vector for pairs of real generation */
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strideVec = vld1q(stride_cmplx_x_real_16);
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/* Compute 4 complex outputs at a time */
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blkCnt = blockSizeC >> 3;
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while (blkCnt > 0U)
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{
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cmplxVec = vld1q(pSrcCmplx);
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rVec = vldrhq_gather_shifted_offset_f16(pSrcReal, strideVec);
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dstVec = vmulq(cmplxVec, rVec);
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vst1q(pCmplxDst, dstVec);
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pSrcReal += 4;
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pSrcCmplx += 8;
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pCmplxDst += 8;
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blkCnt--;
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}
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blkCnt = blockSizeC & 7;
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if (blkCnt > 0U) {
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mve_pred16_t p0 = vctp16q(blkCnt);
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cmplxVec = vld1q(pSrcCmplx);
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rVec = vldrhq_gather_shifted_offset_f16(pSrcReal, strideVec);
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dstVec = vmulq(cmplxVec, rVec);
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vstrhq_p_f16(pCmplxDst, dstVec, p0);
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}
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}
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#else
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void arm_cmplx_mult_real_f16(
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const float16_t * pSrcCmplx,
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const float16_t * pSrcReal,
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float16_t * pCmplxDst,
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uint32_t numSamples)
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{
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uint32_t blkCnt; /* Loop counter */
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float16_t in; /* Temporary variable */
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#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
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/* Loop unrolling: Compute 4 outputs at a time */
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blkCnt = numSamples >> 2U;
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while (blkCnt > 0U)
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{
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/* C[2 * i ] = A[2 * i ] * B[i]. */
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/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
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in = *pSrcReal++;
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/* store result in destination buffer. */
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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in = *pSrcReal++;
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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in = *pSrcReal++;
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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in = *pSrcReal++;
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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/* Decrement loop counter */
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blkCnt--;
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}
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/* Loop unrolling: Compute remaining outputs */
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blkCnt = numSamples % 0x4U;
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#else
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/* Initialize blkCnt with number of samples */
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blkCnt = numSamples;
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#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
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while (blkCnt > 0U)
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{
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/* C[2 * i ] = A[2 * i ] * B[i]. */
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/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
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in = *pSrcReal++;
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/* store result in destination buffer. */
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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*pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
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/* Decrement loop counter */
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blkCnt--;
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}
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}
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#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
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/**
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@} end of CmplxByRealMult group
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*/
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#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
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