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233 lines
5.9 KiB
C
233 lines
5.9 KiB
C
/*
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* Copyright (c) 2021 Arm Limited. All rights reserved.
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*/
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#include <stddef.h>
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#include "video_drv.h"
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#include "arm_vsi.h"
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#ifdef _RTE_
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#include "RTE_Components.h"
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#endif
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#include CMSIS_device_header
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/* Video Peripheral definitions */
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#define VideoO ARM_VSI1 /* Video Output access struct */
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#define VideoO_IRQn ARM_VSI1_IRQn /* Video Output Interrupt number */
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#define VideoO_Handler ARM_VSI1_Handler /* Video Output Interrupt handler */
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#define VideoI ARM_VSI0 /* Video Input access struct */
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#define VideoI_IRQn ARM_VSI0_IRQn /* Video Input Interrupt number */
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#define VideoI_Handler ARM_VSI0_Handler /* Video Input Interrupt handler */
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/* Video Peripheral registers */
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#define CONTROL Regs[0] /* Control receiver */
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#define SAMPLE_BITS Regs[1] /* Sample number of bits (8..32) */
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#define SAMPLE_RATE Regs[2] /* Sample rate (frame per second) */
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#define STOP_SIMULATION Regs[4] /* Stop audio simulation */
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/* Video Control register definitions */
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#define CONTROL_ENABLE_Pos 0U /* CONTROL: ENABLE Position */
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#define CONTROL_ENABLE_Msk (1UL << CONTROL_ENABLE_Pos) /* CONTROL: ENABLE Mask */
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/* Driver State */
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static uint8_t Initialized = 0U;
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/* Event Callback */
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static VideoDrv_Event_t CB_Event = NULL;
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/* Video Input Interrupt Handler */
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void VideoI_Handler (void) {
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VideoI->IRQ.Clear = 0x00000001U;
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__DSB();
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__ISB();
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if (CB_Event != NULL) {
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CB_Event(VIDEO_DRV_EVENT_RX_DATA);
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}
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}
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void VideoO_Handler (void) {
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VideoO->IRQ.Clear = 0x00000001U;
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__DSB();
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__ISB();
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}
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/* Initialize Video Interface */
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int32_t VideoDrv_Initialize (VideoDrv_Event_t cb_event) {
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CB_Event = cb_event;
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/* Initialize Video Output peripheral */
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VideoO->Timer.Control = 0U;
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VideoO->DMA.Control = 0U;
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VideoO->IRQ.Clear = 0x00000001U;
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VideoO->IRQ.Enable = 0x00000001U;
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VideoO->CONTROL = 0U;
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/* Initialize Video Input peripheral */
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VideoI->Timer.Control = 0U;
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VideoI->DMA.Control = 0U;
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VideoI->IRQ.Clear = 0x00000001U;
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VideoI->IRQ.Enable = 0x00000001U;
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VideoI->CONTROL = 0U;
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/* Enable peripheral interrupts */
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NVIC->ISER[(((uint32_t)VideoI_IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)VideoI_IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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Initialized = 1U;
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return VIDEO_DRV_OK;
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}
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/* De-initialize Video Interface */
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int32_t VideoDrv_Uninitialize (void) {
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/* Disable peripheral interrupts */
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NVIC->ICER[(((uint32_t)VideoI_IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)VideoI_IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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/* De-initialize Video Output peripheral */
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VideoO->Timer.Control = 0U;
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VideoO->DMA.Control = 0U;
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VideoO->IRQ.Clear = 0x00000001U;
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VideoO->IRQ.Enable = 0x00000000U;
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VideoO->CONTROL = 0U;
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/* De-initialize Video Input peripheral */
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VideoI->Timer.Control = 0U;
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VideoI->DMA.Control = 0U;
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VideoI->IRQ.Clear = 0x00000001U;
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VideoI->IRQ.Enable = 0x00000000U;
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VideoI->CONTROL = 0U;
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Initialized = 0U;
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return VIDEO_DRV_OK;
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}
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/* Configure Video Interface */
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int32_t VideoDrv_Configure (uint32_t interface, uint32_t pixel_size, uint32_t samplerate) {
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uint32_t format;
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if (Initialized == 0U) {
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return VIDEO_DRV_ERROR;
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}
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if ((pixel_size < 8*1U) ||
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(pixel_size > 8*2U)) {
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return VIDEO_DRV_ERROR_PARAMETER;
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}
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switch (interface) {
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case VIDEO_DRV_INTERFACE_RX:
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if ((VideoI->CONTROL & CONTROL_ENABLE_Msk) != 0U) {
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return VIDEO_DRV_ERROR;
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}
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VideoI->SAMPLE_BITS = pixel_size;
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VideoI->SAMPLE_RATE = samplerate;
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break;
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default:
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return VIDEO_DRV_ERROR_PARAMETER;
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}
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return VIDEO_DRV_OK;
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}
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/* Set Video Interface buffer */
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int32_t VideoDrv_SetBuf (uint32_t interface, void *buf, uint32_t block_num, uint32_t block_size) {
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if (Initialized == 0U) {
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return VIDEO_DRV_ERROR;
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}
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switch (interface) {
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case VIDEO_DRV_INTERFACE_RX:
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if ((VideoI->DMA.Control & ARM_VSI_DMA_Enable_Msk) != 0U) {
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return VIDEO_DRV_ERROR;
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}
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VideoI->DMA.Address = (uint32_t)buf;
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VideoI->DMA.BlockNum = block_num;
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VideoI->DMA.BlockSize = block_size;
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break;
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default:
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return VIDEO_DRV_ERROR_PARAMETER;
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}
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return VIDEO_DRV_OK;
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}
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/* Control Video Interface */
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int32_t VideoDrv_Control (uint32_t control) {
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uint32_t sample_size;
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uint32_t sample_rate;
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uint32_t block_size;
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if (Initialized == 0U) {
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return VIDEO_DRV_ERROR;
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}
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if ((control & VIDEO_DRV_CONTROL_RX_DISABLE) != 0U) {
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VideoI->Timer.Control = 0U;
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VideoI->DMA.Control = 0U;
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VideoI->CONTROL = 0U;
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} else if ((control & VIDEO_DRV_CONTROL_RX_ENABLE) != 0U) {
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VideoI->CONTROL = CONTROL_ENABLE_Msk;
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VideoI->DMA.Control = ARM_VSI_DMA_Direction_P2M |
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ARM_VSI_DMA_Enable_Msk;
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sample_size = ((VideoI->SAMPLE_BITS + 7U) / 8U);
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sample_rate = VideoI->SAMPLE_RATE;
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if ((sample_size == 0U) || (sample_rate == 0U)) {
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VideoI->Timer.Interval = 0xFFFFFFFFU;
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} else {
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block_size = VideoI->DMA.BlockSize;
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VideoI->Timer.Interval = (1000000U * (block_size / sample_size)) / sample_rate;
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}
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VideoI->Timer.Control = ARM_VSI_Timer_Trig_DMA_Msk |
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ARM_VSI_Timer_Trig_IRQ_Msk |
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ARM_VSI_Timer_Periodic_Msk |
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ARM_VSI_Timer_Run_Msk;
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}
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return VIDEO_DRV_OK;
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}
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/* Get received block count */
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uint32_t VideoDrv_GetRxCount (void) {
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return (VideoI->Timer.Count);
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}
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/* Get Video Interface status */
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VideoDrv_Status_t VideoDrv_GetStatus (void) {
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VideoDrv_Status_t status;
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uint32_t sr;
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if ((VideoI->CONTROL & CONTROL_ENABLE_Msk) != 0U) {
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status.rx_active = 1U;
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} else {
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status.rx_active = 0U;
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}
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return (status);
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}
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void VideoDrv_Stop (void)
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{
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int32_t ret;
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ret = VideoDrv_Control(VIDEO_DRV_CONTROL_RX_DISABLE);
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VideoI->STOP_SIMULATION=1;
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}
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