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/**
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******************************************************************************
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* @file main.c
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* @author MCU Application Team
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* @brief Main program body
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by Puya under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "py32f403xx_ll_Start_Kit.h"
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/* Private define ------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private user code ---------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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static void APP_SystemClockConfig(void);
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static void APP_ConfigTIM1OnePulse(void);
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static void APP_ConfigTIM1Channel(void);
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/**
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* @brief Main program.
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* @param None
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* @retval int
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*/
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int main(void)
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{
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/* Enable SYSCFG and PWR clock */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
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/* 3 bits for pre-emption priority, 0 bits for subpriority */
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NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_3);
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/* Enable TIM1 clock */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1);
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/* Enable GPIOA clock */
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
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/* Configure Systemclock */
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APP_SystemClockConfig();
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/* Configure and enable TIM1 onepulse mode */
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APP_ConfigTIM1OnePulse();
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while (1)
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{
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}
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}
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/**
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* @brief TIM1 one-pulse mode channel configuration function
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* @param None
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* @retval None
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*/
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static void APP_ConfigTIM1Channel(void)
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{
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/* Channel 2 configuration */
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/* Configure active edge as rising edge */
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LL_TIM_IC_SetPolarity(TIM1,LL_TIM_CHANNEL_CH2,LL_TIM_IC_POLARITY_RISING);
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/* Configure channel as input mode */
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LL_TIM_IC_SetActiveInput(TIM1,LL_TIM_CHANNEL_CH2,LL_TIM_ACTIVEINPUT_DIRECTTI);
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/* Channel 2 input mapped to PA9 */
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LL_GPIO_SetPinMode(GPIOA,LL_GPIO_PIN_9,LL_GPIO_MODE_ALTERNATE);
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LL_GPIO_SetAFPin_8_15(GPIOA,LL_GPIO_PIN_9,LL_GPIO_AF_4);
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/* Enable channel 2 */
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LL_TIM_CC_EnableChannel(TIM1,LL_TIM_CHANNEL_CH2);
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/* Channel 1 configuration */
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/* Set output polarity to high */
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LL_TIM_OC_SetPolarity(TIM1,LL_TIM_CHANNEL_CH1,LL_TIM_OCPOLARITY_HIGH);
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/* Set idle state to low */
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LL_TIM_OC_SetIdleState(TIM1,LL_TIM_CHANNEL_CH1,LL_TIM_OCIDLESTATE_LOW);
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/* Set compare value to 200 */
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LL_TIM_OC_SetCompareCH1(TIM1,200);
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/* Configure channel as PWM2 mode */
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LL_TIM_OC_SetMode(TIM1,LL_TIM_CHANNEL_CH1,LL_TIM_OCMODE_PWM2);
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/* Output mapped to PA8 */
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LL_GPIO_SetPinMode(GPIOA,LL_GPIO_PIN_8,LL_GPIO_MODE_ALTERNATE);
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LL_GPIO_SetAFPin_8_15(GPIOA,LL_GPIO_PIN_8,LL_GPIO_AF_4);
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/* Enable channel 1 */
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LL_TIM_CC_EnableChannel(TIM1,LL_TIM_CHANNEL_CH1);
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}
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/**
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* @brief TIM1 one-pulse mode configuration function
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* @param None
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* @retval None
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*/
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static void APP_ConfigTIM1OnePulse(void)
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{
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/* CK_INT not divided */
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LL_TIM_SetClockDivision(TIM1,LL_TIM_CLOCKDIVISION_DIV1);
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/* Count mode:up */
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LL_TIM_SetCounterMode(TIM1,LL_TIM_COUNTERMODE_UP);
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/* Set auto-reload value to 1000 */
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LL_TIM_SetAutoReload(TIM1,1000-1);
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/* CK_CNT prescaler：800 */
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LL_TIM_SetPrescaler(TIM1,800-1);
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/* Set TIM1 as slave mode trigger */
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LL_TIM_SetSlaveMode(TIM1,LL_TIM_SLAVEMODE_TRIGGER);
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/* Set input trigger source as TI2FP2 */
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LL_TIM_SetTriggerInput(TIM1,LL_TIM_TS_TI2FP2);
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/* Trigger/output channel configuration */
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APP_ConfigTIM1Channel();
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/* Set one-pulse mode */
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LL_TIM_SetOnePulseMode(TIM1,LL_TIM_ONEPULSEMODE_SINGLE);
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/* Disable automatic output */
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LL_TIM_DisableAutomaticOutput(TIM1);
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/* Enable output */
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LL_TIM_EnableAllOutputs(TIM1);
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/* Enable TIM1 counter */
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LL_TIM_EnableCounter(TIM1);
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}
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/**
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* @brief Configure system clock
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* @param None
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* @retval None
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*/
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static void APP_SystemClockConfig(void)
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{
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/* Enable HSI */
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LL_RCC_HSI_Enable();
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while(LL_RCC_HSI_IsReady() != 1)
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{
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}
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/* Set AHB prescaler: HCLK = SYSCLK */
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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/* Select HSI as system clock source */
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
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{
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}
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/* Set APB1 & APB2 prescaler: PCLK1 = HCLK, PCLK2 = HCLK/2 */
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_2);
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/* Set systick to 1ms in using frequency set to 8MHz */
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LL_Init1msTick(8000000);
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/* Update the SystemCoreClock global variable(which can be updated also through SystemCoreClockUpdate function) */
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LL_SetSystemCoreClock(8000000);
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}
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/**
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* @brief Error handling function
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* @param None
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* @retval None
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*/
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void APP_ErrorHandler(void)
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{
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/* Infinite loop */
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while (1)
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{
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}
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}
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#ifdef USE_FULL_ASSERT
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/**
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file：Pointer to the source file name
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* @param line：assert_param error line source number
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* @retval None
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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{
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/* User can add His own implementation to report the file name and line number,
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ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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/* Infinite loop */
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while (1)
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{
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}
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}
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#endif /* USE_FULL_ASSERT */
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/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
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