CMSIS-DSP: Add ARMv81MML support for MPS3 platform
GorgonMeducer
6 years ago
committed by
Christophe Favergeon
parent
c345d49da0
commit
22ea1d3a12
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/**************************************************************************//**
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* @file ARMv81MML_DP.h
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* @brief CMSIS Core Peripheral Access Layer Header File for
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* Armv8.1-M Mainline Device Series (configured for Armv8.1-M Mainline with double precision FPU, with DSP extension, with TrustZone)
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* @version V1.0.0
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* @date 25. February 2019
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******************************************************************************/
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/*
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* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ARMv81MML_DSP_DP_H
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#define ARMv81MML_DSP_DP_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ------------------------- Interrupt Number Definition ------------------------ */
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typedef enum IRQn
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{
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/* -------------------- Armv8.1-M Mainline Processor Exceptions Numbers --------- */
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NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */
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HardFault_IRQn = -13, /* 3 HardFault Interrupt */
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MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */
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BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */
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UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */
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SecureFault_IRQn = -9, /* 7 Secure Fault Interrupt */
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SVCall_IRQn = -5, /* 11 SV Call Interrupt */
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DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */
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PendSV_IRQn = -2, /* 14 Pend SV Interrupt */
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SysTick_IRQn = -1, /* 15 System Tick Interrupt */
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/* ------------------- Processor Interrupt Numbers ------------------------------ */
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Interrupt0_IRQn = 0,
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Interrupt1_IRQn = 1,
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Interrupt2_IRQn = 2,
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Interrupt3_IRQn = 3,
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Interrupt4_IRQn = 4,
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Interrupt5_IRQn = 5,
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Interrupt6_IRQn = 6,
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Interrupt7_IRQn = 7,
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Interrupt8_IRQn = 8,
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Interrupt9_IRQn = 9
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/* Interrupts 10 .. 480 are left out */
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} IRQn_Type;
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/* ================================================================================ */
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/* ================ Processor and Core Peripheral Section ================ */
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/* ================================================================================ */
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/* ------- Start of section using anonymous unions and disabling warnings ------- */
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#if defined (__CC_ARM)
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#pragma push
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#pragma anon_unions
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#elif defined (__ICCARM__)
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#pragma language=extended
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wc11-extensions"
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#pragma clang diagnostic ignored "-Wreserved-id-macro"
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#elif defined (__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined (__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined (__TASKING__)
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#pragma warning 586
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#elif defined (__CSMC__)
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/* anonymous unions are enabled by default */
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#else
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#warning Not supported compiler type
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#endif
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/* --- Configuration of the Armv8.1-M Mainline Processor and Core Peripherals --- */
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#define __ARMv81MML_REV 0x0001U /* Core revision r0p1 */
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#define __SAUREGION_PRESENT 1U /* SAU regions present */
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#define __MPU_PRESENT 1U /* MPU present */
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#define __VTOR_PRESENT 1U /* VTOR present */
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#define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */
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#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */
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#define __FPU_PRESENT 1U /* FPU present */
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#define __FPU_DP 1U /* double precision FPU */
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#define __DSP_PRESENT 1U /* DSP extension present */
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#define __MVE_PRESENT 1U /* MVE extensions present */
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#define __MVE_FP 1U /* MVE floating point present */
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#include "core_armv81mml.h" /* Processor and core peripherals */
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#include "system_ARMv81MML.h" /* System Header */
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/* -------- End of section using anonymous unions and disabling warnings -------- */
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#if defined (__CC_ARM)
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#pragma pop
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#elif defined (__ICCARM__)
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/* leave anonymous unions enabled */
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#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
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#pragma clang diagnostic pop
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#elif defined (__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined (__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined (__TASKING__)
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#pragma warning restore
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#elif defined (__CSMC__)
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/* anonymous unions are enabled by default */
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#else
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#warning Not supported compiler type
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* ARMv81MML_DSP_DP_H */
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@ -0,0 +1,55 @@
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/**************************************************************************//**
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* @file system_ARMv81MML.h
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* @brief CMSIS Device System Header File for
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* Armv8.1-M Mainline Device Series
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* @version V1.0.0
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* @date 25. February 2019
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******************************************************************************/
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/*
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* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef SYSTEM_ARMv81MML_H
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#define SYSTEM_ARMv81MML_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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/**
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\brief Setup the microcontroller system.
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Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit (void);
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/**
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\brief Update SystemCoreClock variable.
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Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* SYSTEM_ARMv81MML_H */
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#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
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; command above MUST be in first line (no comment above!)
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/*
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;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
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*/
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#include "mem_ARMv81MML.h"
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/*--------------------- Flash Configuration ----------------------------------
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; <h> Flash Configuration
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; <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
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; <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __ROM_BASE 0x10000000
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#define __ROM_SIZE 0x00300000
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/*--------------------- Embedded RAM Configuration ---------------------------
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; <h> RAM Configuration
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; <o0> RAM1 Base Address <0x0-0xFFFFFFFF:8>
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; <o1> RAM1 Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __RAM1_BASE 0x30000000
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#define __RAM1_SIZE 0x00400000
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/*--------------------- Stack / Heap Configuration ---------------------------
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; <h> Stack / Heap Configuration
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; <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __STACK_SIZE STACK_SIZE
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#define __HEAP_SIZE HEAP_SIZE
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#define __RAM2_RW_SIZE (__RAM1_SIZE - __STACK_SIZE - __HEAP_SIZE)
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LR_ROM __ROM_BASE __ROM_SIZE { ; load region size_region
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ER_ROM +0 { ; load address = execution address
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*.o (RESET, +First)
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* (InRoot$$Sections)
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; *(Veneer$$CMSE) ; uncomment for secure applications
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* (+RO-CODE)
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; * (+XO)
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}
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/* make sure stack-overflow will cause bus-fault (which might be escalated to hardfault) */
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ARM_LIB_STACK __RAM1_BASE ALIGN 8 EMPTY __STACK_SIZE { ; Reserve empty region for stack
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}
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RW_RAM1 +0 __RAM2_RW_SIZE {
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* (+RO-DATA)
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP +0 ALIGN 8 EMPTY __HEAP_SIZE { ; Reserve empty region for heap
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}
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}
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/**************************************************************************//**
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* @file mem_ARMCM7.h
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* @brief Memory base and size definitions (used in scatter file)
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* @version V1.1.0
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* @date 15. May 2019
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*
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* @note
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*
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******************************************************************************/
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/*
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* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __MEM_ARMV81MML_H
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#define __MEM_ARMV81MML_H
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#define STACK_SIZE 0x00003000
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#define HEAP_SIZE 0x00100000
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#endif /* __MEM_ARMV81MML_H */
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/******************************************************************************
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* @file startup_ARMv81MML.c
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* @brief CMSIS Core Device Startup File for ARMv81MML Device
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* @version V2.0.1
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* @date 23. July 2019
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******************************************************************************/
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/*
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* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if defined (ARMv81MML_DSP_DP_MVE_FP)
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#include "ARMv81MML_DSP_DP_MVE_FP.h"
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#else
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#error device not specified!
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#endif
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/*----------------------------------------------------------------------------
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Exception / Interrupt Handler Function Prototype
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*----------------------------------------------------------------------------*/
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typedef void( *pFunc )( void );
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/*----------------------------------------------------------------------------
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External References
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*----------------------------------------------------------------------------*/
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extern uint32_t __INITIAL_SP;
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extern uint32_t __STACK_LIMIT;
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extern void __PROGRAM_START(void) __NO_RETURN;
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/*----------------------------------------------------------------------------
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Internal References
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*----------------------------------------------------------------------------*/
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void Default_Handler(void) __NO_RETURN;
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void Reset_Handler (void) __NO_RETURN;
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/*----------------------------------------------------------------------------
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Exception / Interrupt Handler
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*----------------------------------------------------------------------------*/
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/* Exceptions */
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void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void HardFault_Handler (void) __attribute__ ((weak));
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void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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/*----------------------------------------------------------------------------
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Exception / Interrupt Vector table
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*----------------------------------------------------------------------------*/
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#if defined ( __GNUC__ )
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wpedantic"
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#endif
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extern const pFunc __VECTOR_TABLE[496];
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const pFunc __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
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(pFunc)(&__INITIAL_SP), /* Initial Stack Pointer */
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Reset_Handler, /* Reset Handler */
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NMI_Handler, /* -14 NMI Handler */
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||||||
|
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||||
|
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||||
|
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||||
|
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||||
|
SecureFault_Handler, /* -9 Secure Fault Handler */
|
||||||
|
0, /* Reserved */
|
||||||
|
0, /* Reserved */
|
||||||
|
0, /* Reserved */
|
||||||
|
SVC_Handler, /* -5 SVCall Handler */
|
||||||
|
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||||
|
0, /* Reserved */
|
||||||
|
PendSV_Handler, /* -2 PendSV Handler */
|
||||||
|
SysTick_Handler, /* -1 SysTick Handler */
|
||||||
|
|
||||||
|
/* Interrupts */
|
||||||
|
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||||
|
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||||
|
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||||
|
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||||
|
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||||
|
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||||
|
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||||
|
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||||
|
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||||
|
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||||
|
/* Interrupts 10 .. 480 are left out */
|
||||||
|
};
|
||||||
|
|
||||||
|
#if defined ( __GNUC__ )
|
||||||
|
#pragma GCC diagnostic pop
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
Reset Handler called on controller reset
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
void Reset_Handler(void)
|
||||||
|
{
|
||||||
|
__set_MSPLIM((uint32_t)(&__STACK_LIMIT));
|
||||||
|
|
||||||
|
SystemInit(); /* CMSIS System Initialization */
|
||||||
|
|
||||||
|
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
Hard Fault Handler
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
void HardFault_Handler(void)
|
||||||
|
{
|
||||||
|
while(1);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
Default Handler for Exceptions / Interrupts
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
void Default_Handler(void)
|
||||||
|
{
|
||||||
|
while(1);
|
||||||
|
}
|
||||||
@ -0,0 +1,725 @@
|
|||||||
|
/**************************************************************************//**
|
||||||
|
* @file system_ARMv81MML.c
|
||||||
|
* @brief CMSIS Device System Source File for
|
||||||
|
* Armv8.1-M Mainline Device Series
|
||||||
|
* @version V1.2.0
|
||||||
|
* @date 23. July 2019
|
||||||
|
******************************************************************************/
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||||
|
* not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||||
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <string.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdio.h>
|
||||||
|
#include <stdlib.h>
|
||||||
|
#include <assert.h>
|
||||||
|
#include <rt_sys.h>
|
||||||
|
|
||||||
|
|
||||||
|
#if defined (ARMv81MML_DSP_DP_MVE_FP)
|
||||||
|
#include "ARMv81MML_DSP_DP_MVE_FP.h"
|
||||||
|
#else
|
||||||
|
#error device not specified!
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||||
|
#include "partition_ARMv81MML.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#include "cmsis_compiler.h"
|
||||||
|
|
||||||
|
//! \name The macros to identify the compiler
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
//! \note for IAR
|
||||||
|
#ifdef __IS_COMPILER_IAR__
|
||||||
|
# undef __IS_COMPILER_IAR__
|
||||||
|
#endif
|
||||||
|
#if defined(__IAR_SYSTEMS_ICC__)
|
||||||
|
# define __IS_COMPILER_IAR__ 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//! \note for arm compiler 5
|
||||||
|
#ifdef __IS_COMPILER_ARM_COMPILER_5__
|
||||||
|
# undef __IS_COMPILER_ARM_COMPILER_5__
|
||||||
|
#endif
|
||||||
|
#if ((__ARMCC_VERSION >= 5000000) && (__ARMCC_VERSION < 6000000))
|
||||||
|
# define __IS_COMPILER_ARM_COMPILER_5__ 1
|
||||||
|
#endif
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
//! \note for arm compiler 6
|
||||||
|
#ifdef __IS_COMPILER_ARM_COMPILER_6__
|
||||||
|
# undef __IS_COMPILER_ARM_COMPILER_6__
|
||||||
|
#endif
|
||||||
|
#if ((__ARMCC_VERSION >= 6000000) && (__ARMCC_VERSION < 7000000))
|
||||||
|
# define __IS_COMPILER_ARM_COMPILER_6__ 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __IS_COMPILER_LLVM__
|
||||||
|
# undef __IS_COMPILER_LLVM__
|
||||||
|
#endif
|
||||||
|
#if defined(__clang__) && !__IS_COMPILER_ARM_COMPILER_6__
|
||||||
|
# define __IS_COMPILER_LLVM__ 1
|
||||||
|
#else
|
||||||
|
//! \note for gcc
|
||||||
|
#ifdef __IS_COMPILER_GCC__
|
||||||
|
# undef __IS_COMPILER_GCC__
|
||||||
|
#endif
|
||||||
|
#if defined(__GNUC__) && !(__IS_COMPILER_ARM_COMPILER_6__ || __IS_COMPILER_LLVM__)
|
||||||
|
# define __IS_COMPILER_GCC__ 1
|
||||||
|
#endif
|
||||||
|
//! @}
|
||||||
|
#endif
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#define SAFE_ATOM_CODE(...) \
|
||||||
|
{ \
|
||||||
|
uint32_t wOrig = __disable_irq(); \
|
||||||
|
__VA_ARGS__; \
|
||||||
|
__set_PRIMASK(wOrig); \
|
||||||
|
}
|
||||||
|
|
||||||
|
/* IO definitions (access restrictions to peripheral registers) */
|
||||||
|
/**
|
||||||
|
\defgroup CMSIS_glob_defs CMSIS Global Defines
|
||||||
|
|
||||||
|
<strong>IO Type Qualifiers</strong> are used
|
||||||
|
\li to specify the access to peripheral variables.
|
||||||
|
\li for automatic generation of peripheral register debug information.
|
||||||
|
*/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#define __I volatile /*!< Defines 'read only' permissions */
|
||||||
|
#else
|
||||||
|
#define __I volatile const /*!< Defines 'read only' permissions */
|
||||||
|
#endif
|
||||||
|
#define __O volatile /*!< Defines 'write only' permissions */
|
||||||
|
#define __IO volatile /*!< Defines 'read / write' permissions */
|
||||||
|
|
||||||
|
/* following defines should be used for structure members */
|
||||||
|
#define __IM volatile const /*! Defines 'read only' structure member permissions */
|
||||||
|
#define __OM volatile /*! Defines 'write only' structure member permissions */
|
||||||
|
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
|
||||||
|
|
||||||
|
/*@} end of group Cortex_M */
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
Define clocks
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
#define XTAL ( 5000000UL) /* Oscillator frequency */
|
||||||
|
|
||||||
|
#define SYSTEM_CLOCK (5U * XTAL)
|
||||||
|
|
||||||
|
#define DEBUG_DEMCR (*((unsigned int *)0xE000EDFC))
|
||||||
|
#define DEBUG_TRCENA (1<<24) //Global debug enable bit
|
||||||
|
|
||||||
|
#define CCR (*((volatile unsigned int *)0xE000ED14))
|
||||||
|
#define CCR_DL (1 << 19)
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
Externals
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||||
|
extern uint32_t __VECTOR_TABLE;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
System Core Clock Variable
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
uint32_t SystemCoreClock = SYSTEM_CLOCK;
|
||||||
|
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
System Core Clock update function
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
void SystemCoreClockUpdate (void)
|
||||||
|
{
|
||||||
|
SystemCoreClock = SYSTEM_CLOCK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
UART functions
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
__IOM uint32_t DATA; /* Offset: 0x000 (R/W) Data Register */
|
||||||
|
__IOM uint32_t STATE; /* Offset: 0x004 (R/W) Status Register */
|
||||||
|
__IOM uint32_t CTRL; /* Offset: 0x008 (R/W) Control Register */
|
||||||
|
union {
|
||||||
|
__IM uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register */
|
||||||
|
__OM uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register */
|
||||||
|
};
|
||||||
|
__IOM uint32_t BAUDDIV; /* Offset: 0x010 (R/W) Baudrate Divider Register */
|
||||||
|
|
||||||
|
} CMSDK_UART_TypeDef;
|
||||||
|
|
||||||
|
/* CMSDK_UART DATA Register Definitions */
|
||||||
|
#define CMSDK_UART_DATA_Pos 0 /* CMSDK_UART_DATA_Pos: DATA Position */
|
||||||
|
#define CMSDK_UART_DATA_Msk (0xFFUL /*<< CMSDK_UART_DATA_Pos*/) /* CMSDK_UART DATA: DATA Mask */
|
||||||
|
|
||||||
|
/* CMSDK_UART STATE Register Definitions */
|
||||||
|
#define CMSDK_UART_STATE_RXOR_Pos 3 /* CMSDK_UART STATE: RXOR Position */
|
||||||
|
#define CMSDK_UART_STATE_RXOR_Msk (0x1UL << CMSDK_UART_STATE_RXOR_Pos) /* CMSDK_UART STATE: RXOR Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_STATE_TXOR_Pos 2 /* CMSDK_UART STATE: TXOR Position */
|
||||||
|
#define CMSDK_UART_STATE_TXOR_Msk (0x1UL << CMSDK_UART_STATE_TXOR_Pos) /* CMSDK_UART STATE: TXOR Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_STATE_RXBF_Pos 1 /* CMSDK_UART STATE: RXBF Position */
|
||||||
|
#define CMSDK_UART_STATE_RXBF_Msk (0x1UL << CMSDK_UART_STATE_RXBF_Pos) /* CMSDK_UART STATE: RXBF Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_STATE_TXBF_Pos 0 /* CMSDK_UART STATE: TXBF Position */
|
||||||
|
#define CMSDK_UART_STATE_TXBF_Msk (0x1UL /*<< CMSDK_UART_STATE_TXBF_Pos*/) /* CMSDK_UART STATE: TXBF Mask */
|
||||||
|
|
||||||
|
/* CMSDK_UART CTRL Register Definitions */
|
||||||
|
#define CMSDK_UART_CTRL_HSTM_Pos 6 /* CMSDK_UART CTRL: HSTM Position */
|
||||||
|
#define CMSDK_UART_CTRL_HSTM_Msk (0x01UL << CMSDK_UART_CTRL_HSTM_Pos) /* CMSDK_UART CTRL: HSTM Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_RXORIRQEN_Pos 5 /* CMSDK_UART CTRL: RXORIRQEN Position */
|
||||||
|
#define CMSDK_UART_CTRL_RXORIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_RXORIRQEN_Pos) /* CMSDK_UART CTRL: RXORIRQEN Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_TXORIRQEN_Pos 4 /* CMSDK_UART CTRL: TXORIRQEN Position */
|
||||||
|
#define CMSDK_UART_CTRL_TXORIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_TXORIRQEN_Pos) /* CMSDK_UART CTRL: TXORIRQEN Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_RXIRQEN_Pos 3 /* CMSDK_UART CTRL: RXIRQEN Position */
|
||||||
|
#define CMSDK_UART_CTRL_RXIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_RXIRQEN_Pos) /* CMSDK_UART CTRL: RXIRQEN Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_TXIRQEN_Pos 2 /* CMSDK_UART CTRL: TXIRQEN Position */
|
||||||
|
#define CMSDK_UART_CTRL_TXIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_TXIRQEN_Pos) /* CMSDK_UART CTRL: TXIRQEN Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_RXEN_Pos 1 /* CMSDK_UART CTRL: RXEN Position */
|
||||||
|
#define CMSDK_UART_CTRL_RXEN_Msk (0x01UL << CMSDK_UART_CTRL_RXEN_Pos) /* CMSDK_UART CTRL: RXEN Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_TXEN_Pos 0 /* CMSDK_UART CTRL: TXEN Position */
|
||||||
|
#define CMSDK_UART_CTRL_TXEN_Msk (0x01UL /*<< CMSDK_UART_CTRL_TXEN_Pos*/) /* CMSDK_UART CTRL: TXEN Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_INTSTATUS_RXORIRQ_Pos 3 /* CMSDK_UART CTRL: RXORIRQ Position */
|
||||||
|
#define CMSDK_UART_CTRL_RXORIRQ_Msk (0x01UL << CMSDK_UART_INTSTATUS_RXORIRQ_Pos) /* CMSDK_UART CTRL: RXORIRQ Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_TXORIRQ_Pos 2 /* CMSDK_UART CTRL: TXORIRQ Position */
|
||||||
|
#define CMSDK_UART_CTRL_TXORIRQ_Msk (0x01UL << CMSDK_UART_CTRL_TXORIRQ_Pos) /* CMSDK_UART CTRL: TXORIRQ Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_RXIRQ_Pos 1 /* CMSDK_UART CTRL: RXIRQ Position */
|
||||||
|
#define CMSDK_UART_CTRL_RXIRQ_Msk (0x01UL << CMSDK_UART_CTRL_RXIRQ_Pos) /* CMSDK_UART CTRL: RXIRQ Mask */
|
||||||
|
|
||||||
|
#define CMSDK_UART_CTRL_TXIRQ_Pos 0 /* CMSDK_UART CTRL: TXIRQ Position */
|
||||||
|
#define CMSDK_UART_CTRL_TXIRQ_Msk (0x01UL /*<< CMSDK_UART_CTRL_TXIRQ_Pos*/) /* CMSDK_UART CTRL: TXIRQ Mask */
|
||||||
|
|
||||||
|
/* CMSDK_UART BAUDDIV Register Definitions */
|
||||||
|
#define CMSDK_UART_BAUDDIV_Pos 0 /* CMSDK_UART BAUDDIV: BAUDDIV Position */
|
||||||
|
#define CMSDK_UART_BAUDDIV_Msk (0xFFFFFUL /*<< CMSDK_UART_BAUDDIV_Pos*/) /* CMSDK_UART BAUDDIV: BAUDDIV Mask */
|
||||||
|
|
||||||
|
|
||||||
|
/* ================================================================================ */
|
||||||
|
/* ================ Peripheral declaration ================ */
|
||||||
|
/* ================================================================================ */
|
||||||
|
|
||||||
|
#define CMSDK_UART0_BASE_ADDRESS (0x41303000ul)
|
||||||
|
|
||||||
|
#define CMSDK_UART0 ((CMSDK_UART_TypeDef *) CMSDK_UART0_BASE_ADDRESS)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
void uart_config(uint32_t wUARTFrequency)
|
||||||
|
{
|
||||||
|
CMSDK_UART0->CTRL = 0; /* Disable UART when changing configuration */
|
||||||
|
CMSDK_UART0->BAUDDIV = wUARTFrequency / 115200ul; /* 25MHz / 38400 = 651 */
|
||||||
|
CMSDK_UART0->CTRL = CMSDK_UART_CTRL_TXEN_Msk|CMSDK_UART_CTRL_RXEN_Msk;
|
||||||
|
}
|
||||||
|
|
||||||
|
int stdout_putchar(char txchar)
|
||||||
|
{
|
||||||
|
if (txchar == 10) stdout_putchar((char) 13);
|
||||||
|
|
||||||
|
while(CMSDK_UART0->STATE & CMSDK_UART_STATE_TXBF_Msk);
|
||||||
|
CMSDK_UART0->DATA = (uint32_t)txchar;
|
||||||
|
|
||||||
|
return (int) txchar;
|
||||||
|
}
|
||||||
|
|
||||||
|
int stderr_putchar(char txchar)
|
||||||
|
{
|
||||||
|
return stdout_putchar(txchar);
|
||||||
|
}
|
||||||
|
|
||||||
|
void ttywrch (int ch)
|
||||||
|
{
|
||||||
|
stdout_putchar(ch);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
System initialization function
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
void SystemInit (void)
|
||||||
|
{
|
||||||
|
|
||||||
|
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||||
|
SCB->VTOR = (uint32_t)(&__VECTOR_TABLE);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \
|
||||||
|
(defined (__MVE_USED) && (__MVE_USED == 1U))
|
||||||
|
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||||
|
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||||
|
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||||
|
TZ_SAU_Setup();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
SystemCoreClock = SYSTEM_CLOCK;
|
||||||
|
|
||||||
|
//Disable debug
|
||||||
|
DEBUG_DEMCR &=~ DEBUG_TRCENA;
|
||||||
|
|
||||||
|
// enable DL branch cache
|
||||||
|
CCR |= CCR_DL;
|
||||||
|
|
||||||
|
uart_config(SYSTEM_CLOCK);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__((constructor(255)))
|
||||||
|
void platform_init(void)
|
||||||
|
{
|
||||||
|
printf("\r\nMPS3 ARMv81MML Generic Template...\r\n");
|
||||||
|
printf("\r\n_[TEST START]____________________________________________________\r\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if __IS_COMPILER_ARM_COMPILER_6__
|
||||||
|
__asm(".global __use_no_semihosting\n\t");
|
||||||
|
# ifndef __MICROLIB
|
||||||
|
__asm(".global __ARM_use_no_argv\n\t");
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
Writes the character specified by c (converted to an unsigned char) to
|
||||||
|
the output stream pointed to by stream, at the position indicated by the
|
||||||
|
associated file position indicator (if defined), and advances the
|
||||||
|
indicator appropriately. If the file position indicator is not defined,
|
||||||
|
the character is appended to the output stream.
|
||||||
|
|
||||||
|
\param[in] c Character
|
||||||
|
\param[in] stream Stream handle
|
||||||
|
|
||||||
|
\return The character written. If a write error occurs, the error
|
||||||
|
indicator is set and fputc returns EOF.
|
||||||
|
*/
|
||||||
|
__attribute__((weak))
|
||||||
|
int fputc (int c, FILE * stream)
|
||||||
|
{
|
||||||
|
if (stream == &__stdout) {
|
||||||
|
return (stdout_putchar(c));
|
||||||
|
}
|
||||||
|
|
||||||
|
if (stream == &__stderr) {
|
||||||
|
return (stderr_putchar(c));
|
||||||
|
}
|
||||||
|
|
||||||
|
return (-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* IO device file handles. */
|
||||||
|
#define FH_STDIN 0x8001
|
||||||
|
#define FH_STDOUT 0x8002
|
||||||
|
#define FH_STDERR 0x8003
|
||||||
|
|
||||||
|
const char __stdin_name[] = ":STDIN";
|
||||||
|
const char __stdout_name[] = ":STDOUT";
|
||||||
|
const char __stderr_name[] = ":STDERR";
|
||||||
|
|
||||||
|
#define RETARGET_SYS 1
|
||||||
|
#define RTE_Compiler_IO_STDOUT 1
|
||||||
|
#define RTE_Compiler_IO_STDERR 1
|
||||||
|
/**
|
||||||
|
Defined in rt_sys.h, this function opens a file.
|
||||||
|
|
||||||
|
The _sys_open() function is required by fopen() and freopen(). These
|
||||||
|
functions in turn are required if any file input/output function is to
|
||||||
|
be used.
|
||||||
|
The openmode parameter is a bitmap whose bits mostly correspond directly to
|
||||||
|
the ISO mode specification. Target-dependent extensions are possible, but
|
||||||
|
freopen() must also be extended.
|
||||||
|
|
||||||
|
\param[in] name File name
|
||||||
|
\param[in] openmode Mode specification bitmap
|
||||||
|
|
||||||
|
\return The return value is ?1 if an error occurs.
|
||||||
|
*/
|
||||||
|
#ifdef RETARGET_SYS
|
||||||
|
__attribute__((weak))
|
||||||
|
FILEHANDLE _sys_open (const char *name, int openmode) {
|
||||||
|
#if (!defined(RTE_Compiler_IO_File))
|
||||||
|
(void)openmode;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if (name == NULL) {
|
||||||
|
return (-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (name[0] == ':') {
|
||||||
|
if (strcmp(name, ":STDIN") == 0) {
|
||||||
|
return (FH_STDIN);
|
||||||
|
}
|
||||||
|
if (strcmp(name, ":STDOUT") == 0) {
|
||||||
|
return (FH_STDOUT);
|
||||||
|
}
|
||||||
|
if (strcmp(name, ":STDERR") == 0) {
|
||||||
|
return (FH_STDERR);
|
||||||
|
}
|
||||||
|
return (-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef RTE_Compiler_IO_File
|
||||||
|
#ifdef RTE_Compiler_IO_File_FS
|
||||||
|
return (__sys_open(name, openmode));
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
return (-1);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
Defined in rt_sys.h, this function closes a file previously opened
|
||||||
|
with _sys_open().
|
||||||
|
|
||||||
|
This function must be defined if any input/output function is to be used.
|
||||||
|
|
||||||
|
\param[in] fh File handle
|
||||||
|
|
||||||
|
\return The return value is 0 if successful. A nonzero value indicates
|
||||||
|
an error.
|
||||||
|
*/
|
||||||
|
#ifdef RETARGET_SYS
|
||||||
|
__attribute__((weak))
|
||||||
|
int _sys_close (FILEHANDLE fh) {
|
||||||
|
|
||||||
|
switch (fh) {
|
||||||
|
case FH_STDIN:
|
||||||
|
return (0);
|
||||||
|
case FH_STDOUT:
|
||||||
|
return (0);
|
||||||
|
case FH_STDERR:
|
||||||
|
return (0);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef RTE_Compiler_IO_File
|
||||||
|
#ifdef RTE_Compiler_IO_File_FS
|
||||||
|
return (__sys_close(fh));
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
return (-1);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
Defined in rt_sys.h, this function writes the contents of a buffer to a file
|
||||||
|
previously opened with _sys_open().
|
||||||
|
|
||||||
|
\note The mode parameter is here for historical reasons. It contains
|
||||||
|
nothing useful and must be ignored.
|
||||||
|
|
||||||
|
\param[in] fh File handle
|
||||||
|
\param[in] buf Data buffer
|
||||||
|
\param[in] len Data length
|
||||||
|
\param[in] mode Ignore this parameter
|
||||||
|
|
||||||
|
\return The return value is either:
|
||||||
|
- a positive number representing the number of characters not
|
||||||
|
written (so any nonzero return value denotes a failure of
|
||||||
|
some sort)
|
||||||
|
- a negative number indicating an error.
|
||||||
|
*/
|
||||||
|
#ifdef RETARGET_SYS
|
||||||
|
__attribute__((weak))
|
||||||
|
int _sys_write (FILEHANDLE fh, const uint8_t *buf, uint32_t len, int mode) {
|
||||||
|
#if (defined(RTE_Compiler_IO_STDOUT) || defined(RTE_Compiler_IO_STDERR))
|
||||||
|
int ch;
|
||||||
|
#elif (!defined(RTE_Compiler_IO_File))
|
||||||
|
(void)buf;
|
||||||
|
(void)len;
|
||||||
|
#endif
|
||||||
|
(void)mode;
|
||||||
|
|
||||||
|
switch (fh) {
|
||||||
|
case FH_STDIN:
|
||||||
|
return (-1);
|
||||||
|
case FH_STDOUT:
|
||||||
|
#ifdef RTE_Compiler_IO_STDOUT
|
||||||
|
for (; len; len--) {
|
||||||
|
ch = *buf++;
|
||||||
|
#if (STDOUT_CR_LF != 0)
|
||||||
|
if (ch == '\n') stdout_putchar('\r');
|
||||||
|
#endif
|
||||||
|
stdout_putchar(ch);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
return (0);
|
||||||
|
case FH_STDERR:
|
||||||
|
#ifdef RTE_Compiler_IO_STDERR
|
||||||
|
for (; len; len--) {
|
||||||
|
ch = *buf++;
|
||||||
|
#if (STDERR_CR_LF != 0)
|
||||||
|
if (ch == '\n') stderr_putchar('\r');
|
||||||
|
#endif
|
||||||
|
stderr_putchar(ch);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
return (0);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef RTE_Compiler_IO_File
|
||||||
|
#ifdef RTE_Compiler_IO_File_FS
|
||||||
|
return (__sys_write(fh, buf, len));
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
return (-1);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
Defined in rt_sys.h, this function reads the contents of a file into a buffer.
|
||||||
|
|
||||||
|
Reading up to and including the last byte of data does not turn on the EOF
|
||||||
|
indicator. The EOF indicator is only reached when an attempt is made to read
|
||||||
|
beyond the last byte of data. The target-independent code is capable of
|
||||||
|
handling:
|
||||||
|
- the EOF indicator being returned in the same read as the remaining bytes
|
||||||
|
of data that precede the EOF
|
||||||
|
- the EOF indicator being returned on its own after the remaining bytes of
|
||||||
|
data have been returned in a previous read.
|
||||||
|
|
||||||
|
\note The mode parameter is here for historical reasons. It contains
|
||||||
|
nothing useful and must be ignored.
|
||||||
|
|
||||||
|
\param[in] fh File handle
|
||||||
|
\param[in] buf Data buffer
|
||||||
|
\param[in] len Data length
|
||||||
|
\param[in] mode Ignore this parameter
|
||||||
|
|
||||||
|
\return The return value is one of the following:
|
||||||
|
- The number of bytes not read (that is, len - result number of
|
||||||
|
bytes were read).
|
||||||
|
- An error indication.
|
||||||
|
- An EOF indicator. The EOF indication involves the setting of
|
||||||
|
0x80000000 in the normal result.
|
||||||
|
*/
|
||||||
|
#ifdef RETARGET_SYS
|
||||||
|
__attribute__((weak))
|
||||||
|
int _sys_read (FILEHANDLE fh, uint8_t *buf, uint32_t len, int mode) {
|
||||||
|
#ifdef RTE_Compiler_IO_STDIN
|
||||||
|
int ch;
|
||||||
|
#elif (!defined(RTE_Compiler_IO_File))
|
||||||
|
(void)buf;
|
||||||
|
(void)len;
|
||||||
|
#endif
|
||||||
|
(void)mode;
|
||||||
|
|
||||||
|
switch (fh) {
|
||||||
|
case FH_STDIN:
|
||||||
|
#ifdef RTE_Compiler_IO_STDIN
|
||||||
|
ch = stdin_getchar();
|
||||||
|
if (ch < 0) {
|
||||||
|
return ((int)(len | 0x80000000U));
|
||||||
|
}
|
||||||
|
*buf++ = (uint8_t)ch;
|
||||||
|
#if (STDIN_ECHO != 0)
|
||||||
|
stdout_putchar(ch);
|
||||||
|
#endif
|
||||||
|
len--;
|
||||||
|
return ((int)(len));
|
||||||
|
#else
|
||||||
|
return ((int)(len | 0x80000000U));
|
||||||
|
#endif
|
||||||
|
case FH_STDOUT:
|
||||||
|
return (-1);
|
||||||
|
case FH_STDERR:
|
||||||
|
return (-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef RTE_Compiler_IO_File
|
||||||
|
#ifdef RTE_Compiler_IO_File_FS
|
||||||
|
return (__sys_read(fh, buf, len));
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
return (-1);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
Defined in rt_sys.h, this function determines if a file handle identifies
|
||||||
|
a terminal.
|
||||||
|
|
||||||
|
When a file is connected to a terminal device, this function is used to
|
||||||
|
provide unbuffered behavior by default (in the absence of a call to
|
||||||
|
set(v)buf) and to prohibit seeking.
|
||||||
|
|
||||||
|
\param[in] fh File handle
|
||||||
|
|
||||||
|
\return The return value is one of the following values:
|
||||||
|
- 0: There is no interactive device.
|
||||||
|
- 1: There is an interactive device.
|
||||||
|
- other: An error occurred.
|
||||||
|
*/
|
||||||
|
#ifdef RETARGET_SYS
|
||||||
|
__attribute__((weak))
|
||||||
|
int _sys_istty (FILEHANDLE fh) {
|
||||||
|
|
||||||
|
switch (fh) {
|
||||||
|
case FH_STDIN:
|
||||||
|
return (1);
|
||||||
|
case FH_STDOUT:
|
||||||
|
return (1);
|
||||||
|
case FH_STDERR:
|
||||||
|
return (1);
|
||||||
|
}
|
||||||
|
|
||||||
|
return (0);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
Defined in rt_sys.h, this function puts the file pointer at offset pos from
|
||||||
|
the beginning of the file.
|
||||||
|
|
||||||
|
This function sets the current read or write position to the new location pos
|
||||||
|
relative to the start of the current file fh.
|
||||||
|
|
||||||
|
\param[in] fh File handle
|
||||||
|
\param[in] pos File pointer offset
|
||||||
|
|
||||||
|
\return The result is:
|
||||||
|
- non-negative if no error occurs
|
||||||
|
- negative if an error occurs
|
||||||
|
*/
|
||||||
|
#ifdef RETARGET_SYS
|
||||||
|
__attribute__((weak))
|
||||||
|
int _sys_seek (FILEHANDLE fh, long pos) {
|
||||||
|
#if (!defined(RTE_Compiler_IO_File))
|
||||||
|
(void)pos;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
switch (fh) {
|
||||||
|
case FH_STDIN:
|
||||||
|
return (-1);
|
||||||
|
case FH_STDOUT:
|
||||||
|
return (-1);
|
||||||
|
case FH_STDERR:
|
||||||
|
return (-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef RTE_Compiler_IO_File
|
||||||
|
#ifdef RTE_Compiler_IO_File_FS
|
||||||
|
return (__sys_seek(fh, (uint32_t)pos));
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
return (-1);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
Defined in rt_sys.h, this function returns the current length of a file.
|
||||||
|
|
||||||
|
This function is used by _sys_seek() to convert an offset relative to the
|
||||||
|
end of a file into an offset relative to the beginning of the file.
|
||||||
|
You do not have to define _sys_flen() if you do not intend to use fseek().
|
||||||
|
If you retarget at system _sys_*() level, you must supply _sys_flen(),
|
||||||
|
even if the underlying system directly supports seeking relative to the
|
||||||
|
end of a file.
|
||||||
|
|
||||||
|
\param[in] fh File handle
|
||||||
|
|
||||||
|
\return This function returns the current length of the file fh,
|
||||||
|
or a negative error indicator.
|
||||||
|
*/
|
||||||
|
#ifdef RETARGET_SYS
|
||||||
|
__attribute__((weak))
|
||||||
|
long _sys_flen (FILEHANDLE fh) {
|
||||||
|
|
||||||
|
switch (fh) {
|
||||||
|
case FH_STDIN:
|
||||||
|
return (0);
|
||||||
|
case FH_STDOUT:
|
||||||
|
return (0);
|
||||||
|
case FH_STDERR:
|
||||||
|
return (0);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef RTE_Compiler_IO_File
|
||||||
|
#ifdef RTE_Compiler_IO_File_FS
|
||||||
|
return (__sys_flen(fh));
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
return (0);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define log_str(...) \
|
||||||
|
do { \
|
||||||
|
const char *pchSrc = __VA_ARGS__; \
|
||||||
|
uint_fast16_t hwSize = sizeof(__VA_ARGS__); \
|
||||||
|
do { \
|
||||||
|
stdout_putchar(*pchSrc++); \
|
||||||
|
} while(--hwSize); \
|
||||||
|
} while(0)
|
||||||
|
|
||||||
|
|
||||||
|
void _sys_exit(int n)
|
||||||
|
{
|
||||||
|
(void)n;
|
||||||
|
log_str("\r\n");
|
||||||
|
log_str("_[TEST COMPLETE]_________________________________________________\r\n");
|
||||||
|
log_str("\r\n\r\n");
|
||||||
|
|
||||||
|
while(1);
|
||||||
|
}
|
||||||
|
|
||||||
|
extern void ttywrch (int ch);
|
||||||
|
__attribute__((weak))
|
||||||
|
void _ttywrch (int ch)
|
||||||
|
{
|
||||||
|
ttywrch(ch);
|
||||||
|
}
|
||||||
|
|
||||||
Loading…
Reference in New Issue