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DSP: Cleanup of type mismatches (#1327)

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The IAR compiler appears to provide more warnings about type
mismatches than the other compilers. This cleans a lot of them up.

Signed-off-by: TTornblom <thomas.tornblom@iar.com>
pull/19/head
Thomas Törnblom 4 years ago committed by GitHub
parent b4822217d0
commit 2a7714ced7
8 changed files with 114 additions and 114 deletions
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36
PrivateInclude/arm_vec_fft.h
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@ -150,20 +150,20 @@ __STATIC_INLINE void arm_bitreversal_16_inpl_mve(
bitRevTabOff = vldrhq_u16(pBitRevTab);
pBitRevTab += 8;
bitRevOff0Low = vmullbq_int_u16(bitRevTabOff, one);
bitRevOff0High = vmulltq_int_u16(bitRevTabOff, one);
bitRevOff0Low = vshrq_n_u16(bitRevOff0Low, 3);
bitRevOff0High = vshrq_n_u16(bitRevOff0High, 3);
bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
blkCnt = (bitRevLen / 16);
while (blkCnt > 0) {
bitRevTabOff = vldrhq_u16(pBitRevTab);
pBitRevTab += 8;
bitRevOff1Low = vmullbq_int_u16(bitRevTabOff, one);
bitRevOff1High = vmulltq_int_u16(bitRevTabOff, one);
bitRevOff1Low = vshrq_n_u16(bitRevOff1Low, 3);
bitRevOff1High = vshrq_n_u16(bitRevOff1High, 3);
bitRevOff1Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
bitRevOff1High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
bitRevOff1Low = vshrq_n_u16((uint16x8_t)bitRevOff1Low, 3);
bitRevOff1High = vshrq_n_u16((uint16x8_t)bitRevOff1High, 3);
inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low);
inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High);
@ -175,10 +175,10 @@ __STATIC_INLINE void arm_bitreversal_16_inpl_mve(
bitRevTabOff = vldrhq_u16(pBitRevTab);
pBitRevTab += 8;
bitRevOff0Low = vmullbq_int_u16(bitRevTabOff, one);
bitRevOff0High = vmulltq_int_u16(bitRevTabOff, one);
bitRevOff0Low = vshrq_n_u16(bitRevOff0Low, 3);
bitRevOff0High = vshrq_n_u16(bitRevOff0High, 3);
bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff1Low);
inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff1High);
@ -209,10 +209,10 @@ __STATIC_INLINE void arm_bitreversal_16_inpl_mve(
vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh);
vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow);
bitRevOff0Low = vmullbq_int_u16(bitRevTabOff, one);
bitRevOff0High = vmulltq_int_u16(bitRevTabOff, one);
bitRevOff0Low = vshrq_n_u16(bitRevOff0Low, 3);
bitRevOff0High = vshrq_n_u16(bitRevOff0High, 3);
bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
inLow = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff0Low, p);
inHigh = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff0High, p);
@ -251,13 +251,13 @@ __STATIC_INLINE void arm_bitreversal_32_outpl_mve(void *pDst, void *pSrc, uint32
while (blkCnt > 0) {
uint64x2_t vecIn;
vecIn = vldrdq_gather_offset_u64(pSrc, (int64x2_t) bitRevOffs0);
vecIn = vldrdq_gather_offset_u64(pSrc, (uint64x2_t) bitRevOffs0);
idxOffs0 = idxOffs0 + 16;
vst1q(pDst32, (uint32x4_t) vecIn);
pDst32 += 4;
bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
vecIn = vldrdq_gather_offset_u64(pSrc, (int64x2_t) bitRevOffs1);
vecIn = vldrdq_gather_offset_u64(pSrc, (uint64x2_t) bitRevOffs1);
idxOffs1 = idxOffs1 + 16;
vst1q(pDst32, (uint32x4_t) vecIn);
pDst32 += 4;

6
Source/FastMathFunctions/arm_vlog_f16.c
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@ -85,7 +85,7 @@ float16_t logf16_scalar(float16_t x)
float16_t tmp,v;
tmp = ((_Float16)vecTmpFlt1 - 1.0f16) * (1 << NB_DIV_LOGF16);
n = floor((double)tmp);
n = (int)floor((double)tmp);
v = (_Float16)tmp - (_Float16)n;
lut = lut_logf16 + n * (1+NB_DEG_LOGF16);
@ -132,12 +132,12 @@ float16x8_t vlogq_lut_f16(float16x8_t vecIn)
offset = vmulq_n_s16(n,(1+NB_DEG_LOGF16));
offset = vaddq_n_s16(offset,NB_DEG_LOGF16-1);
res = vldrhq_gather_shifted_offset_f16(lut_logf16,offset);
res = vldrhq_gather_shifted_offset_f16(lut_logf16,(uint16x8_t)offset);
offset = vsubq_n_s16(offset,1);
for(int j=NB_DEG_LOGF16-2; j >=0 ; j--)
{
lutV = vldrhq_gather_shifted_offset_f16(lut_logf16,offset);
lutV = vldrhq_gather_shifted_offset_f16(lut_logf16,(uint16x8_t)offset);
res = vfmaq_f16(lutV,v,res);
offset = vsubq_n_s16(offset,1);

4
Source/FastMathFunctions/arm_vlog_q15.c
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@ -158,7 +158,7 @@ q15x8_t vlogq_q15(q15x8_t src)
vtmp = vsubq_n_s16(c,1);
x = vshlq_u16(src,vtmp);
x = vshlq_u16((uint16x8_t)src,vtmp);
/* Compute the Log2. Result is in q11 instead of q16
@ -190,7 +190,7 @@ q15x8_t vlogq_q15(q15x8_t src)
/* q11 */
// tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART));
vtmp = vshlq_n_s16(normalization,LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART);
vtmp = vsubq_s16(y,vtmp);
vtmp = vsubq_s16((int16x8_t)y,vtmp);

4
Source/FastMathFunctions/arm_vlog_q31.c
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@ -153,7 +153,7 @@ q31x4_t vlogq_q31(q31x4_t src)
vtmp = vsubq_n_s32(c,1);
x = vshlq_u32(src,vtmp);
x = vshlq_u32((uint32x4_t)src,vtmp);
/* Compute the Log2. Result is in Q26
@ -184,7 +184,7 @@ q31x4_t vlogq_q31(q31x4_t src)
/* q11 */
// tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART));
vtmp = vshlq_n_s32(normalization,LOG_Q31_ACCURACY - LOG_Q31_INTEGER_PART);
vtmp = vsubq_s32(y,vtmp);
vtmp = vsubq_s32((int32x4_t)y,vtmp);

4
Source/MatrixFunctions/arm_mat_ldlt_f32.c
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@ -204,7 +204,7 @@ arm_status arm_mat_ldlt_f32(
//pA[w*n+x] = pA[w*n+x] - pA[w*n+k] * (pA[x*n+k] * invA);
vecX = vldrwq_gather_shifted_offset_z_f32(&pA[x*n+k], vecOffs, p0);
vecX = vldrwq_gather_shifted_offset_z_f32(&pA[x*n+k], (uint32x4_t)vecOffs, p0);
vecX = vmulq_m_n_f32(vuninitializedq_f32(),vecX,invA,p0);
@ -247,7 +247,7 @@ arm_status arm_mat_ldlt_f32(
vecA = vldrwq_z_f32(&pA[w*n+x],p0);
vecX = vldrwq_gather_shifted_offset_z_f32(&pA[x*n+k], vecOffs, p0);
vecX = vldrwq_gather_shifted_offset_z_f32(&pA[x*n+k], (uint32x4_t)vecOffs, p0);
vecX = vmulq_m_n_f32(vuninitializedq_f32(),vecX,invA,p0);
vecA = vfmsq_m(vecA, vecW, vecX, p0);

2
Source/SupportFunctions/arm_q15_to_float.c
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@ -74,7 +74,7 @@ void arm_q15_to_float(
/* convert from q15 to float and then store the results in the destination buffer */
vecDst = vldrhq_s32(pSrcVec);
pSrcVec += 4;
vstrwq(pDst, vcvtq_n_f32_s32(vecDst, 15));
vstrwq(pDst, vcvtq_n_f32_s32((int32x4_t)vecDst, 15));
pDst += 4;
/*
* Decrement the blockSize loop counter

2
Source/SupportFunctions/arm_q7_to_float.c
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@ -72,7 +72,7 @@ void arm_q7_to_float(
/* convert from q7 to float and then store the results in the destination buffer */
vecDst = vldrbq_s32(pSrcVec);
pSrcVec += 4;
vstrwq(pDst, vcvtq_n_f32_s32(vecDst, 7));
vstrwq(pDst, vcvtq_n_f32_s32((int32x4_t)vecDst, 7));
pDst += 4;
/*
* Decrement the blockSize loop counter

16
Source/TransformFunctions/arm_cfft_q15.c
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@ -184,16 +184,16 @@ static void _arm_radix4_butterfly_q15_mve(
vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8);
vecTmp0 = vhaddq(vecSum0, vecSum1);
vstrwq_scatter_base_s32(vecScGathAddr, -64, (q15x8_t) vecTmp0);
vstrwq_scatter_base_s32(vecScGathAddr, -64, (int32x4_t) vecTmp0);
vecTmp0 = vhsubq(vecSum0, vecSum1);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (q15x8_t) vecTmp0);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (int32x4_t) vecTmp0);
vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (q15x8_t) vecTmp0);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (int32x4_t) vecTmp0);
vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (q15x8_t) vecTmp0);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (int32x4_t) vecTmp0);
blkCnt--;
}
@ -419,16 +419,16 @@ static void _arm_radix4_butterfly_inverse_q15_mve(const arm_cfft_instance_q15 *S
vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8);
vecTmp0 = vhaddq(vecSum0, vecSum1);
vstrwq_scatter_base_s32(vecScGathAddr, -64, (q15x8_t) vecTmp0);
vstrwq_scatter_base_s32(vecScGathAddr, -64, (int32x4_t) vecTmp0);
vecTmp0 = vhsubq(vecSum0, vecSum1);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (q15x8_t) vecTmp0);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (int32x4_t) vecTmp0);
vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (q15x8_t) vecTmp0);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (int32x4_t) vecTmp0);
vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (q15x8_t) vecTmp0);
vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (int32x4_t) vecTmp0);
blkCnt--;
}

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