DSP_Lib changes:
- new version V1.5.5
- reworked DSP library source files
added macro ARM_MATH_LOOPUNROLL
removed macro UNALIGNED_SUPPORT_DISABLE
relpaced arm_bitreversal2.S with C version
added const-correctness
replaced SIMD pointer construct with memcpy solution
- reworked DSP library documentation
- moved DSP libraries to folder ./DSP/Lib
- ARM DSP Libraries are built with ARMCLANG
- Added DSP Libraries Source variant
pull/19/head
GuentherMartin
7 years ago
parent
f20c424e92
commit
5648cfd4af
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/* This demonstrates how to setup a Debugger '*.ini' file to interface with the
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* C-code using the JTEST test framework.
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*/
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MAP 0x00000000, 0x001FFFFF EXEC READ /* 2048K Flash */
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MAP 0x20000000, 0x201FFFFF READ WRITE /* 2048K RAM */
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LOAD %L INCREMENTAL
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RESET /* Reset the target processor */
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LOG OFF /* Turn off Logging by default. */
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BK * /* Remove existing breakpoints. */
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INCLUDE ../../Common/JTest/jtest_fns.ini /* Load the JTEST helper functions */
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INCLUDE ../../Common/JTest/jtest_log_Simulator.ini /* Include specified log file */
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/* Break on special members of the JTEST framework. The framework's
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name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */
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BS test_start , 1, "coverage_clear(); test_start_msg();"
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BS test_end , 1, "coverage_msg(); test_end_msg();"
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BS group_start , 1, "group_start_msg();"
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BS group_end , 1, "group_end_msg();"
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BS dump_str , 1, "dump_str_fn();"
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BS dump_data , 1, "dump_data_fn();"
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BS exit_fw , 1, "break_fn(); debug_clean_fn(); log_off_fn();"
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debug_setup_finished_msg() /* Output a message to let the output
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parser know that setup has
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finished. */
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G /* Start the Tests */
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# Ignore everything in this directory
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*
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# Except this file
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!.gitignore
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# Ignore everything in this directory
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*
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# Except this file
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!.gitignore
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
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fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
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cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
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cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
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fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
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cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
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cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
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fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
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cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
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fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
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cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
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fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
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#----------------------------------------------------------------------------------------------
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# Ignore everything in this directory
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*
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# Except this file
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!.gitignore
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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armcortexm0ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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armcortexm0ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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armcortexm0ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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armcortexm3ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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armcortexm3ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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armcortexm3ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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armcortexm4ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
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armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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armcortexm7ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
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armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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#----------------------------------------------------------------------------------------------
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File diff suppressed because it is too large
Load Diff
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# Ignore everything in this directory
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*
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# Except this file
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!.gitignore
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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# Ignore everything in this directory
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*
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# Except this file
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!.gitignore
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@ -0,0 +1,11 @@
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
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fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
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cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
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cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
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fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
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#----------------------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#----------------------------------------------------------------------------------------------
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cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
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cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
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cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
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cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
|
||||
fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
|
||||
#----------------------------------------------------------------------------------------------
|
||||
@ -0,0 +1,13 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
|
||||
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
|
||||
fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
|
||||
#----------------------------------------------------------------------------------------------
|
||||
@ -0,0 +1,13 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
|
||||
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
|
||||
fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
|
||||
#----------------------------------------------------------------------------------------------
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,4 @@
|
||||
# Ignore everything in this directory
|
||||
*
|
||||
# Except this file
|
||||
!.gitignore
|
||||
@ -0,0 +1,8 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm0ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
armcortexm0ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
armcortexm0ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
@ -0,0 +1,8 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm3ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
armcortexm3ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
armcortexm3ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
@ -0,0 +1,9 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
armcortexm4ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
@ -0,0 +1,9 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
@ -0,0 +1,9 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
armcortexm7ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
@ -0,0 +1,9 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
@ -0,0 +1,9 @@
|
||||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
|
||||
armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
|
||||
#----------------------------------------------------------------------------------------------
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,4 @@
|
||||
# Ignore everything in this directory
|
||||
*
|
||||
# Except this file
|
||||
!.gitignore
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,4 @@
|
||||
# Ignore everything in this directory
|
||||
*
|
||||
# Except this file
|
||||
!.gitignore
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,4 @@
|
||||
# Ignore everything in this directory
|
||||
*
|
||||
# Except this file
|
||||
!.gitignore
|
||||
@ -0,0 +1,117 @@
|
||||
HowTo DSP_Lib_TestSuite (Source Variant) 18.02.2019
|
||||
======================================================
|
||||
|
||||
This file describes the folder structure, content, prerequisites and instructions to validate the
|
||||
build of the CMSIS-DSP library. This is done by processing input data sets using the DSP Library
|
||||
functions executing on a target simulator or hardware. The output data sets are then compared
|
||||
with the reference data set produced by unoptimized DSP functions and a Signal to Noise Ratio (SNR)
|
||||
is computed. If the SNR is below a defined threshold the test is considered "passed".
|
||||
|
||||
|
||||
Folder structure
|
||||
----------------
|
||||
.\DSP_Lib_TestSuite Batch files for building the reference libraries and running the tests.
|
||||
.\DSP_Lib_TestSuite\Common
|
||||
.\DSP_Lib_TestSuite\Common\inc DSP_Lib test include files
|
||||
.\DSP_Lib_TestSuite\Common\JTest JTEST Test Framework + INI files for uVision
|
||||
.\DSP_Lib_TestSuite\Common\platform ARM/GCC device startup/system files
|
||||
.\DSP_Lib_TestSuite\Common\src DSP_Lib test source files
|
||||
.\DSP_Lib_TestSuite\DspLibTest_FVP ARM/GCC DSP_Lib test projects for Fixed Virtual Platforms
|
||||
.\DSP_Lib_TestSuite\DspLibTest_MPS2 ARM/GCC DSP_Lib test projects for MPS2
|
||||
.\DSP_Lib_TestSuite\DspLibTest_Simulator ARM/GCC DSP_Lib test projects for uVision simulator
|
||||
.\DSP_Lib_TestSuite\RefLibs ARM/GCC DSP_Lib reference libraries (and projects)
|
||||
|
||||
|
||||
|
||||
Prerequisites
|
||||
--------------
|
||||
- Python (running on Windows). Tested with ActivePython 2.7.8.10.
|
||||
- Keil MDK-ARM (tested with MDK-ARM 5.22: http://www2.keil.com/mdk5)
|
||||
- ULINKpro debug adapter (http://www2.keil.com/mdk5/ulink)
|
||||
- MPS2 (Cortex-M Prototyping System:https://www.arm.com/products/tools/development-boards/versatile-express/cortex-m-prototyping-system.php)
|
||||
- CMSIS 5.0.0 (https://github.com/ARM-software/CMSIS_5/releases/tag/5.0.0)
|
||||
|
||||
|
||||
Setup
|
||||
------
|
||||
- open a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite.
|
||||
|
||||
|
||||
|
||||
How to run the tests
|
||||
---------------------
|
||||
|
||||
a) running an individual test using uVision (MDK-ARM):
|
||||
- batch file: runTest_SV.bat
|
||||
- run: runTest_SV.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
|
||||
runTest_SV -> prints usage information
|
||||
e.g. runTest_SV ARM cortexM4lf Simulator -> runs the test for toolchain ARM, Cortex-M4 littel endian with FPU, uVision Simulator.
|
||||
|
||||
Tests running on MPS2 requires additional steps to setup. See section 'MPS2'.
|
||||
|
||||
d) parsing the test output log file
|
||||
- script: parseLog_SV.py
|
||||
- run: parseLog_SV.py python script in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
|
||||
command line options should match the invocation of the runTest executed before.
|
||||
e.g: runTest ARM cortexM4lf Simulator -> python parseLog.py ARM cortexM4lf Simulator
|
||||
|
||||
- check the test log
|
||||
depending on your test parameters change into the required folder
|
||||
.\DSP_Lib_TestSuite\DspLibTest_[FVP|MPS2|Simulator]\[ARM|GCC]\Logs
|
||||
the folder will contain the following files (e.g. for a 'runTest') :
|
||||
DspLibTest_Simulator.log raw result of the last test run.
|
||||
DspLibTest_Simulator_cortexM4lf.log raw result of a cortexM4lf test run
|
||||
DspLibTest_Simulator_cortexM4lf_build.log build result of cortexM4lf test
|
||||
DspLibTest_Simulator_cortexM4lf_parsed.log parsed log of raw result of a cortexM4lf test run
|
||||
DspLibTest_Simulator_cortexM4lf_time.log log how long the test took (some tests e.g. M0 take really a long time!).
|
||||
'runTest' produces files of the format: DspLibTest_<test>_<core>...
|
||||
|
||||
|
||||
Differences between the tests for FVP, MPS2, Simulator
|
||||
------------------------------------------------------
|
||||
- all tests are identical except for:
|
||||
'Simulator' uses uVision with uVision simulator and generates also code coverage information
|
||||
can be used for little/big endian tests
|
||||
! do not use 'Simulator' for M7 with FPU -> no uVision simulation available.
|
||||
! do not use 'Simulator' for ARMv8-M devices -> no uVision simulation available.
|
||||
'MPS2' uses uVision with ULINKpro debugger and MPS2. No code coverage information is generated.
|
||||
can be used for little endian only (because of the lack of MPS2 FPGA images).
|
||||
'FVP' uses uVision with Models debugger. No code coverage information is generated.
|
||||
can be used for little/big endian tests.
|
||||
! config files must be prepared.
|
||||
! uVision target for big endianess are not yet prepared.
|
||||
|
||||
|
||||
Setup 'MPS2'
|
||||
-------------
|
||||
- load the appropriate FPGA image to the MPS2 board matching the CPU of the test builds prior to running the test
|
||||
- check if ULINKpro can connect with the configured debug connection (JTAG or SWD) as this must
|
||||
match the protocol implemented in the FPGA image.
|
||||
|
||||
|
||||
How to select tests for "run all tests"
|
||||
----------------------------------------
|
||||
- edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\all_tests.c
|
||||
comment out all unwanted test groups.
|
||||
e.g. // JTEST_GROUP_CALL(complex_math_tests);
|
||||
|
||||
- edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test group>_group.c
|
||||
comment out all unwanted sub test groups.
|
||||
e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\basic_math_test_group.c -> // JTEST_GROUP_CALL(abs_tests);
|
||||
|
||||
- edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test>_tests.c
|
||||
comment out all unwanted tests.
|
||||
e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\abs_tests.c -> // JTEST_TEST_CALL(arm_abs_f32_test);
|
||||
|
||||
|
||||
Notes
|
||||
-----
|
||||
- How to use ARM Clang (ARM Compiler 6):
|
||||
in uVision 'Options for Target' tab you can select which compiler to use
|
||||
by default uVision uses ARMCC V5 for Cortex-M devices and ARMCLANG V6 only for ARMv8M.
|
||||
Only ARMv8M cores have been tested using ARMCLANG
|
||||
|
||||
- test data used for the tests is used as provided by DSP Concepts.
|
||||
|
||||
- some tests run for a very long time before they finish. This is expected
|
||||
|
||||
@ -0,0 +1,11 @@
|
||||
|
||||
#include "abs.c"
|
||||
#include "add.c"
|
||||
#include "dot_prod.c"
|
||||
#include "mult.c"
|
||||
#include "negate.c"
|
||||
#include "offset.c"
|
||||
#include "scale.c"
|
||||
#include "shift.c"
|
||||
#include "sub.c"
|
||||
|
||||
@ -0,0 +1,8 @@
|
||||
|
||||
#include "cmplx_conj.c"
|
||||
#include "cmplx_dot_prod.c"
|
||||
#include "cmplx_mag.c"
|
||||
#include "cmplx_mag_squared.c"
|
||||
#include "cmplx_mult_cmplx.c"
|
||||
#include "cmplx_mult_real.c"
|
||||
|
||||
@ -0,0 +1,4 @@
|
||||
|
||||
#include "pid.c"
|
||||
#include "sin_cos.c"
|
||||
|
||||
@ -0,0 +1,5 @@
|
||||
|
||||
#include "cos.c"
|
||||
#include "sin.c"
|
||||
#include "sqrt.c"
|
||||
|
||||
@ -0,0 +1,12 @@
|
||||
|
||||
#include "biquad.c"
|
||||
#include "conv.c"
|
||||
#include "correlate.c"
|
||||
#include "fir.c"
|
||||
#include "fir_decimate.c"
|
||||
#include "fir_interpolate.c"
|
||||
#include "fir_lattice.c"
|
||||
#include "fir_sparse.c"
|
||||
#include "iir_lattice.c"
|
||||
#include "lms.c"
|
||||
|
||||
@ -0,0 +1,4 @@
|
||||
|
||||
#include "mat_helper.c"
|
||||
#include "ref_helper.c"
|
||||
|
||||
@ -0,0 +1,3 @@
|
||||
|
||||
#include "intrinsics.c"
|
||||
|
||||
@ -0,0 +1,9 @@
|
||||
|
||||
#include "mat_add.c"
|
||||
#include "mat_cmplx_mult.c"
|
||||
#include "mat_inverse.c"
|
||||
#include "mat_mult.c"
|
||||
#include "mat_scale.c"
|
||||
#include "mat_sub.c"
|
||||
#include "mat_trans.c"
|
||||
|
||||
@ -0,0 +1,8 @@
|
||||
|
||||
#include "max.c"
|
||||
#include "mean.c"
|
||||
#include "min.c"
|
||||
#include "power.c"
|
||||
#include "rms.c"
|
||||
#include "std.c"
|
||||
#include "var.c"
|
||||
@ -0,0 +1,6 @@
|
||||
|
||||
#include "copy.c"
|
||||
#include "fill.c"
|
||||
#include "fixed_to_fixed.c"
|
||||
#include "fixed_to_float.c"
|
||||
#include "float_to_fixed.c"
|
||||
@ -0,0 +1,4 @@
|
||||
|
||||
#include "cfft.c"
|
||||
#include "dct4.c"
|
||||
#include "rfft.c"
|
||||
@ -0,0 +1,110 @@
|
||||
#!/usr/bin/python3
|
||||
|
||||
import sys
|
||||
import os
|
||||
|
||||
error = 1
|
||||
|
||||
|
||||
def parseLog(filename):
|
||||
|
||||
inFileName = filename
|
||||
outFileName = os.path.splitext(inFileName)[0] + '_parsed' + os.path.splitext(inFileName)[1]
|
||||
|
||||
infile = open(inFileName).read()
|
||||
infile = infile.split('\n')
|
||||
|
||||
outfile = open(outFileName, 'w')
|
||||
|
||||
count = 0
|
||||
strName = ""
|
||||
strNr = -1
|
||||
strFUT = ""
|
||||
coverageInfo = 0
|
||||
|
||||
for line in infile:
|
||||
if line.find("==================================================") != -1:
|
||||
continue
|
||||
if line.find("--------------------------------------------------") != -1:
|
||||
continue
|
||||
if line.find("Start: Group") != -1:
|
||||
outfile.write("\n")
|
||||
continue
|
||||
if line.find("End: Group") != -1:
|
||||
outfile.write("\n")
|
||||
continue
|
||||
if line.find("Start: Test") != -1:
|
||||
outfile.write("\n")
|
||||
continue
|
||||
if line.find("End: Test") != -1:
|
||||
outfile.write("\n")
|
||||
continue
|
||||
if line.find("Start Dump: String") != -1:
|
||||
continue
|
||||
if line.find("End Dump: String") != -1:
|
||||
strName = strName.rstrip("\n")
|
||||
outfile.write(strName)
|
||||
if strNr == 3:
|
||||
strFUT = strName
|
||||
# else:
|
||||
# strFUT == ""
|
||||
if strName == "Group Name:":
|
||||
strNr = 1
|
||||
outfile.write(" ")
|
||||
elif strName == "Test Name:":
|
||||
strNr = 2
|
||||
outfile.write(" ")
|
||||
elif strName == "Function Under Test:":
|
||||
strNr = 3
|
||||
outfile.write(" ")
|
||||
else:
|
||||
strNr = 4
|
||||
if len(strName) < 128:
|
||||
outfile.write("\n")
|
||||
strName = ""
|
||||
continue
|
||||
if line.find("Start: Coverage Information") != -1:
|
||||
coverageInfo = 1
|
||||
outfile.write(line)
|
||||
outfile.write("\n")
|
||||
if line.find("End: Coverage Information") != -1:
|
||||
strFUT == ""
|
||||
coverageInfo = 0
|
||||
if coverageInfo == 1:
|
||||
# if line.find(strFUT) == -1: #this line contains no relevant coverage info
|
||||
# continue
|
||||
if line.find("- 0%") == -1 and line.find("src") == -1 and line.find("Functions") != -1:
|
||||
outfile.write(line + "\n")
|
||||
continue
|
||||
if line.find("0x") == 0: #this is a line to translate
|
||||
line = line[12:35] + line[37:61]
|
||||
nums = line.split(' ')
|
||||
for num in nums:
|
||||
intNum = int(num, base=16)
|
||||
# if intNum == 10:
|
||||
# continue
|
||||
if intNum == 0:
|
||||
continue
|
||||
strName += str(chr(intNum))
|
||||
continue
|
||||
outfile.write(line)
|
||||
outfile.write("\n")
|
||||
|
||||
def print_usage(sys_argv):
|
||||
script_name = sys_argv[0]
|
||||
usage_str = "Syntax: {0} filename\n"
|
||||
|
||||
print (usage_str)
|
||||
|
||||
def exit_on_error(sys_argv):
|
||||
print_usage(sys_argv)
|
||||
exit(1)
|
||||
|
||||
if __name__ == '__main__':
|
||||
arg_len = len(sys.argv)
|
||||
|
||||
if arg_len != 2:
|
||||
exit_on_error(sys.argv)
|
||||
|
||||
if error == parseLog(sys.argv[1]):
|
||||
exit_on_error(sys.argv)
|
||||
@ -0,0 +1,128 @@
|
||||
#!/usr/bin/python3
|
||||
|
||||
import sys
|
||||
|
||||
toolchain_list = ["ARM", "GCC", "ARMCLANG"]
|
||||
core_list = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp",
|
||||
"ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfsp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ]
|
||||
test_list = ["MPS2", "FVP", "Simulator"]
|
||||
error = 1
|
||||
|
||||
|
||||
def parseLog(toolchain, core, test):
|
||||
if toolchain not in toolchain_list:
|
||||
print ("Error: Unkown toolchain '{0}'".format(toolchain))
|
||||
return error
|
||||
|
||||
if core not in core_list:
|
||||
print ("Error: Unkown core '{0}'".format(core))
|
||||
return error
|
||||
|
||||
if test not in test_list:
|
||||
print ("Error: Unkown test '{0}'".format(test))
|
||||
return error
|
||||
|
||||
inFileName = ".\DspLibTest_SV_{2}\{0}\Logs\DspLibTest_{2}_{1}.log".format(toolchain, core, test)
|
||||
outFileName = ".\DspLibTest_SV_{2}\{0}\Logs\DspLibTest_{2}_{1}_parsed.log".format(toolchain, core, test)
|
||||
|
||||
infile = open(inFileName).read()
|
||||
infile = infile.split('\n')
|
||||
|
||||
outfile = open(outFileName, 'w')
|
||||
|
||||
count = 0
|
||||
strName = ""
|
||||
strNr = -1
|
||||
strFUT = ""
|
||||
coverageInfo = 0
|
||||
|
||||
for line in infile:
|
||||
if line.find("==================================================") != -1:
|
||||
continue
|
||||
if line.find("--------------------------------------------------") != -1:
|
||||
continue
|
||||
if line.find("Start: Group") != -1:
|
||||
outfile.write("\n")
|
||||
continue
|
||||
if line.find("End: Group") != -1:
|
||||
outfile.write("\n")
|
||||
continue
|
||||
if line.find("Start: Test") != -1:
|
||||
outfile.write("\n")
|
||||
continue
|
||||
if line.find("End: Test") != -1:
|
||||
outfile.write("\n")
|
||||
continue
|
||||
if line.find("Start Dump: String") != -1:
|
||||
continue
|
||||
if line.find("End Dump: String") != -1:
|
||||
strName = strName.rstrip("\n")
|
||||
outfile.write(strName)
|
||||
if strNr == 3:
|
||||
strFUT = strName
|
||||
# else:
|
||||
# strFUT == ""
|
||||
if strName == "Group Name:":
|
||||
strNr = 1
|
||||
outfile.write(" ")
|
||||
elif strName == "Test Name:":
|
||||
strNr = 2
|
||||
outfile.write(" ")
|
||||
elif strName == "Function Under Test:":
|
||||
strNr = 3
|
||||
outfile.write(" ")
|
||||
else:
|
||||
strNr = 4
|
||||
if len(strName) < 128:
|
||||
outfile.write("\n")
|
||||
strName = ""
|
||||
continue
|
||||
if line.find("Start: Coverage Information") != -1:
|
||||
coverageInfo = 1
|
||||
outfile.write(line)
|
||||
outfile.write("\n")
|
||||
if line.find("End: Coverage Information") != -1:
|
||||
strFUT == ""
|
||||
coverageInfo = 0
|
||||
if coverageInfo == 1:
|
||||
# if line.find(strFUT) == -1: #this line contains no relevant coverage info
|
||||
# continue
|
||||
if line.find("- 0%") == -1 and line.find("src") == -1 and line.find("Functions") != -1:
|
||||
outfile.write(line + "\n")
|
||||
continue
|
||||
if line.find("0x") == 0: #this is a line to translate
|
||||
line = line[12:35] + line[37:61]
|
||||
nums = line.split(' ')
|
||||
for num in nums:
|
||||
intNum = int(num, base=16)
|
||||
# if intNum == 10:
|
||||
# continue
|
||||
if intNum == 0:
|
||||
continue
|
||||
strName += str(chr(intNum))
|
||||
continue
|
||||
outfile.write(line)
|
||||
outfile.write("\n")
|
||||
|
||||
def print_usage(sys_argv):
|
||||
script_name = sys_argv[0]
|
||||
usage_str = "Syntax: {0} toolchain core test\n".format(sys.argv[0])
|
||||
argument_desc = "\n toolchain: {0}".format(" ".join(toolchain_list))
|
||||
argument_desc += "\n core: {0}".format(" ".join(core_list))
|
||||
argument_desc += "\n test: {0}".format(" ".join(test_list))
|
||||
argument_desc += "\n\ne.g.: parseLog ARM cortexM3l FVP"
|
||||
|
||||
print (usage_str + argument_desc)
|
||||
|
||||
def exit_on_error(sys_argv):
|
||||
print_usage(sys_argv)
|
||||
exit(1)
|
||||
|
||||
if __name__ == '__main__':
|
||||
arg_len = len(sys.argv)
|
||||
|
||||
if arg_len != 4:
|
||||
exit_on_error(sys.argv)
|
||||
|
||||
if error == parseLog(sys.argv[1], sys.argv[2], sys.argv[3]):
|
||||
exit_on_error(sys.argv)
|
||||
@ -0,0 +1,105 @@
|
||||
@echo off
|
||||
|
||||
set UVEXE=C:\Keil_v5\UV4\UV4.EXE
|
||||
|
||||
if .%1==. goto help
|
||||
for %%a in (ARM GCC ARMCLANG) do if %1==%%a goto checkParam2
|
||||
echo parameter %1 not supported.
|
||||
goto help
|
||||
|
||||
:checkParam2
|
||||
if .%2==. goto help
|
||||
for %%a in ( ^
|
||||
cortexM0l ^
|
||||
cortexM3l ^
|
||||
cortexM4l ^
|
||||
cortexM4lf ^
|
||||
cortexM7l ^
|
||||
cortexM7lfsp ^
|
||||
cortexM7lfdp ^
|
||||
ARMv8MBLl ^
|
||||
ARMv8MMLl ^
|
||||
ARMv8MMLlfsp ^
|
||||
ARMv8MMLlfdp ^
|
||||
ARMv8MMLld ^
|
||||
ARMv8MMLldfsp ^
|
||||
ARMv8MMLldfdp ^
|
||||
) do if %2==%%a goto checkParam3
|
||||
echo parameter %2 not supported.
|
||||
goto help
|
||||
|
||||
:checkParam3
|
||||
if .%3==. goto help
|
||||
for %%a in (MPS2 FVP Simulator) do if %3==%%a goto buildProject
|
||||
echo parameter %3 not supported.
|
||||
goto help
|
||||
|
||||
:buildProject
|
||||
echo Build Test Project ...
|
||||
%UVEXE% -r -j0 .\DspLibTest_SV_%3\%1\DspLibTest_%3.uvprojx -t "%2" -o ".\Logs\DspLibTest_%3_%2_build.log"
|
||||
|
||||
echo Run Test ...
|
||||
del /Q ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3.log" 2>NUL
|
||||
del /Q ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2.log" 2>NUL
|
||||
|
||||
rem get start time (The format of %TIME% is HH:MM:SS,CS for example 23:59:59,99)
|
||||
set STARTTIME=%TIME%
|
||||
|
||||
rem run the test
|
||||
%UVEXE% -d .\DspLibTest_SV_%3\%1\DspLibTest_%3.uvprojx -t "%2"
|
||||
|
||||
rem get end time
|
||||
set ENDTIME=%TIME%
|
||||
|
||||
rem calculate duration
|
||||
rem Change formatting for the start and end times
|
||||
for /F "tokens=1-4 delims=:.," %%a in ("%STARTTIME%") do (
|
||||
set /A "start=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100"
|
||||
)
|
||||
|
||||
for /F "tokens=1-4 delims=:.," %%a in ("%ENDTIME%") do (
|
||||
set /A "end=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100"
|
||||
)
|
||||
|
||||
rem Test midnight rollover. If so, add 1 day=8640000 1/100ths secs
|
||||
if %end% lss %start% set /a end+=8640000
|
||||
|
||||
rem Calculate the elapsed time by subtracting values
|
||||
set /A elapsed=end-start
|
||||
|
||||
rem Format the results for output
|
||||
set /A hh=elapsed/(60*60*100), rest=elapsed%%(60*60*100), mm=rest/(60*100), rest%%=60*100, ss=rest/100, cc=rest%%100
|
||||
if %hh% lss 10 set hh=0%hh%
|
||||
if %mm% lss 10 set mm=0%mm%
|
||||
if %ss% lss 10 set ss=0%ss%
|
||||
if %cc% lss 10 set cc=0%cc%
|
||||
|
||||
set DURATION=%hh%:%mm%:%ss%,%cc%
|
||||
|
||||
rem write time to file
|
||||
echo Test %1 %2 : > ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
|
||||
echo Start time: %STARTTIME% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
|
||||
echo End time: %ENDTIME% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
|
||||
echo Duration: %DURATION% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
|
||||
|
||||
echo Copy Logfile ...
|
||||
copy /B ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3.log" ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2.log"
|
||||
|
||||
goto end
|
||||
|
||||
|
||||
:help
|
||||
echo.
|
||||
echo Syntax: runTest toolchain core test
|
||||
echo.
|
||||
echo toolchain: ARM ^| ARMCLANG ^| GCC
|
||||
echo core: cortexM0l ^| cortexM3l ^| cortexM4l ^| cortexM4lf ^| cortexM7l ^| cortexM7lfsp ^| cortexM7lfdp
|
||||
echo ARMv8MBLl
|
||||
echo ARMv8MMLl ^| ARMv8MMLlfsp ^| ARMv8MMLlfdp
|
||||
echo ARMv8MMLld ^| ARMv8MMLldfsp ^| ARMv8MMLldfdp
|
||||
echo test: MPS2 ^| FVP ^| Simulator
|
||||
echo.
|
||||
echo e.g.: runTest ARM cortexM3l Simulator
|
||||
|
||||
:end
|
||||
@echo on
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,3 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:afa93f014c4252cf0c530b223264c5d0b9b5d06b1fd02cce0e68976ed2877b5e
|
||||
size 2388652
|
||||
@ -0,0 +1,3 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:0ca2b5d6c6673501492e770743652916494e8bae140d960d69fbbe7ac3d51556
|
||||
size 2231476
|
||||
@ -0,0 +1,3 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:fd28d1a35b22067d439348049f30f49bb6638d46c5323376642240dabb09a1f2
|
||||
size 2260032
|
||||
@ -0,0 +1,3 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:b10028301021f8da3212d389f6a89a3f023129fba8d12aa5f0de6432e89d9d9f
|
||||
size 2231904
|
||||
@ -0,0 +1,3 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:7f7b430b689a9e22dfed58ae645538f1e1d92dca5f26b8eca89d178859764bad
|
||||
size 2200144
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue