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updated DSP Lib to V1.5.0.

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pull/19/head
Martin Günther 10 years ago
parent 76d02e9f1a
commit adbc210886
352 changed files with 31924 additions and 37224 deletions
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368
DSP_Lib_TestSuite/Common/inc/matrix_tests/matrix_templates.h.old
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#ifndef _MATRIX_TEMPLATES_H_
#define _MATRIX_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the outputs from the function under test and the reference
* function.
*/
#define MATRIX_COMPARE_INTERFACE(output_type, output_content_type) \
TEST_ASSERT_BUFFERS_EQUAL( \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols * \
sizeof(output_content_type))
/**
* Comparison SNR thresholds for the data types used in matrix_tests.
*/
#define MATRIX_SNR_THRESHOLD 120
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define MATRIX_SNR_COMPARE_INTERFACE(output_type, output_content_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
(float32_t *)matrix_output_f32_ref, \
((output_type *) &matrix_output_ref)->pData, \
(float32_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
output_content_type, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
/**
* Compare the outputs from the function under test and the reference
* function using SNR. This is special for float64_t
*/
#define MATRIX_DBL_SNR_COMPARE_INTERFACE(output_type) \
do \
{ \
TEST_ASSERT_DBL_SNR( \
(float64_t *)matrix_output_f32_ref, \
(float64_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
/*--------------------------------------------------------------------------------*/
/* Dimension Validation Interfaces */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_VALID_ADDITIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
((((input_type) (matrix_a_ptr))->numRows == \
((input_type) (matrix_b_ptr))->numRows) && \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numCols))
#define MATRIX_TEST_VALID_MULTIPLICATIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numRows)
#define MATRIX_TEST_VALID_SQUARE_DIMENSIONS(input_type, \
matrix_ptr) \
(((input_type)(matrix_ptr))->numRows == \
((input_type)(matrix_ptr))->numCols)
#define MATRIX_TEST_VALID_DIMENSIONS_ALWAYS(input_type, \
matrix_ptr) \
(1 == 1) \
/*--------------------------------------------------------------------------------*/
/* Output Configuration Interfaces */
/*--------------------------------------------------------------------------------*/
/* The matrix tests assume the output matrix is always the correct size. These
* interfaces size the properly size the output matrices according to the input
* matrices and the operation at hand.*/
#define MATRIX_TEST_CONFIG_ADDITIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_MULTIPLICATIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_SAMESIZE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_TRANSPOSE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numRows; \
} while(0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_TEMPLATE_ELT1(arr_desc_inputs, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_idx, input_type, input, arr_desc_inputs \
, \
JTEST_DUMP_STRF("Matrix Dimensions: %dx%d\n", \
(int)input->numRows, \
(int)input->numCols); \
\
if(dim_validation_interface(input_type, \
input)) { \
output_config_interface(input_type, \
input); \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input), \
ref, ref_arg_interface(input)); \
compare_interface(output_type, \
output_content_type); \
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, \
fut_arg_interface(input)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
#define MATRIX_TEST_TEMPLATE_ELT2(arr_desc_inputs_a, \
arr_desc_inputs_b, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_a_idx, input_type, input_a, arr_desc_inputs_a \
, \
input_type input_b = ARR_DESC_ELT( \
input_type, input_a_idx, \
&(arr_desc_inputs_b)); \
\
if(dim_validation_interface(input_type, \
input_a, \
input_b)) { \
\
output_config_interface(input_type, \
input_a, \
input_b); \
\
JTEST_DUMP_STRF("Matrix Dimensions: %dx%d\n", \
(int)input_a->numRows, \
(int)input_a->numCols); \
\
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input_a, input_b), \
ref, ref_arg_interface(input_a, input_b)); \
\
compare_interface(output_type, output_content_type); \
\
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, fut_arg_interface(input_a, input_b)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT2() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT2(fn_name, suffix, \
output_config_interface, \
dim_validation_interface, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT2( \
matrix_##suffix##_a_inputs, \
matrix_##suffix##_b_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
comparison_interface); \
} \
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT1() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT1(fn_name, suffix, \
output_config_interface, \
dim_validation_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT1( \
matrix_##suffix##_a_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
MATRIX_COMPARE_INTERFACE); \
} \
#endif /* _MATRIX_TEMPLATES_H_ */

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DSP_Lib_TestSuite/Common/inc/matrix_tests/matrix_templates.h.sav
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#ifndef _MATRIX_TEMPLATES_H_
#define _MATRIX_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the outputs from the function under test and the reference
* function.
*/
#define MATRIX_COMPARE_INTERFACE(output_type, output_content_type) \
TEST_ASSERT_BUFFERS_EQUAL( \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols * \
sizeof(output_content_type))
/**
* Comparison SNR thresholds for the data types used in matrix_tests.
*/
#define MATRIX_SNR_THRESHOLD 120
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define MATRIX_SNR_COMPARE_INTERFACE(output_type, output_content_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
(float32_t *)matrix_output_f32_ref, \
((output_type *) &matrix_output_ref)->pData, \
(float32_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
output_content_type, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
/**
* Compare the outputs from the function under test and the reference
* function using SNR. This is special for float64_t
*/
#define MATRIX_DBL_SNR_COMPARE_INTERFACE(output_type) \
do \
{ \
TEST_ASSERT_DBL_SNR( \
(float64_t *)matrix_output_f32_ref, \
(float64_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
MATRIX_SNR_THRESHOLD \
); \
} while(0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
/*--------------------------------------------------------------------------------*/
/* Dimension Validation Interfaces */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_VALID_ADDITIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
((((input_type) (matrix_a_ptr))->numRows == \
((input_type) (matrix_b_ptr))->numRows) && \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numCols))
#define MATRIX_TEST_VALID_MULTIPLICATIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numRows)
#define MATRIX_TEST_VALID_SQUARE_DIMENSIONS(input_type, \
matrix_ptr) \
(((input_type)(matrix_ptr))->numRows == \
((input_type)(matrix_ptr))->numCols)
#define MATRIX_TEST_VALID_DIMENSIONS_ALWAYS(input_type, \
matrix_ptr) \
(1 == 1) \
/*--------------------------------------------------------------------------------*/
/* Output Configuration Interfaces */
/*--------------------------------------------------------------------------------*/
/* The matrix tests assume the output matrix is always the correct size. These
* interfaces size the properly size the output matrices according to the input
* matrices and the operation at hand.*/
#define MATRIX_TEST_CONFIG_ADDITIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_MULTIPLICATIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_SAMESIZE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numCols; \
} while(0)
#define MATRIX_TEST_CONFIG_TRANSPOSE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numRows; \
} while(0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_TEMPLATE_ELT1(arr_desc_inputs, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_idx, input_type, input, arr_desc_inputs \
, \
JTEST_DUMP_STRF("Matrix Dimensions: %dx%d\n", \
(int)input->numRows, \
(int)input->numCols); \
\
if(dim_validation_interface(input_type, \
input)) { \
output_config_interface(input_type, \
input); \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input), \
ref, ref_arg_interface(input)); \
compare_interface(output_type, \
output_content_type); \
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, \
fut_arg_interface(input)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
#define MATRIX_TEST_TEMPLATE_ELT2(arr_desc_inputs_a, \
arr_desc_inputs_b, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_a_idx, input_type, input_a, arr_desc_inputs_a \
, \
input_type input_b = ARR_DESC_ELT( \
input_type, input_a_idx, \
&(arr_desc_inputs_b)); \
\
if(dim_validation_interface(input_type, \
input_a, \
input_b)) { \
\
output_config_interface(input_type, \
input_a, \
input_b); \
\
JTEST_DUMP_STRF("Matrix Dimensions: A %dx%d B %dx%d\n",\
(int)input_a->numRows, \
(int)input_a->numCols, \
(int)input_b->numRows, \
(int)input_b->numCols); \
\
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input_a, input_b), \
ref, ref_arg_interface(input_a, input_b)); \
\
compare_interface(output_type, output_content_type); \
\
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, fut_arg_interface(input_a, input_b)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while(0)
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT2() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT2(fn_name, suffix, \
output_config_interface, \
dim_validation_interface, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT2( \
matrix_##suffix##_a_inputs, \
matrix_##suffix##_b_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
comparison_interface); \
} \
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT1() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT1(fn_name, suffix, \
output_config_interface, \
dim_validation_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT1( \
matrix_##suffix##_a_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
MATRIX_COMPARE_INTERFACE); \
} \
#endif /* _MATRIX_TEMPLATES_H_ */

13
DSP_Lib_TestSuite/Common/src/controller_tests/sin_cos_tests.c
Unescape Escape View File

@ -12,8 +12,17 @@
ARR_DESC_DEFINE(float32_t, ARR_DESC_DEFINE(float32_t,
arm_sin_cos_degrees_f32, arm_sin_cos_degrees_f32,
9, 9,
CURLY(0 , 17, 45, 90, CURLY(
180, 360, 362, -73, -191.111)); 0,
17,
45,
90,
180,
360,
362,
-73,
-191.111
));
/* The Q31 version of the function maps numbers in the range [-1, 0.9999999] /* The Q31 version of the function maps numbers in the range [-1, 0.9999999]
* to degrees in the range [-180, 179]*/ * to degrees in the range [-180, 179]*/

24
DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvoptx
Unescape Escape View File

@ -75,7 +75,7 @@
<OPTFL> <OPTFL>
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>0</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>7</CpuCode> <CpuCode>7</CpuCode>
<DebugOpt> <DebugOpt>
@ -118,7 +118,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O143 -S0 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA01477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA01477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -304,7 +304,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -475,7 +475,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -631,7 +631,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -807,7 +807,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>DLGTARM</Key> <Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -817,7 +817,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -978,7 +978,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>DLGTARM</Key> <Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -988,7 +988,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -1144,7 +1144,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -1277,7 +1277,7 @@
<OPTFL> <OPTFL>
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>0</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>7</CpuCode> <CpuCode>7</CpuCode>
<DebugOpt> <DebugOpt>
@ -1320,7 +1320,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2V8M</Key> <Key>ULP2V8M</Key>
<Name>-UP0003JBE -O206 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BF11477) -L00(0) -TO0 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O142 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA05477) -L00(4) -TO0 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>

20
DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvoptx
Unescape Escape View File

@ -75,7 +75,7 @@
<OPTFL> <OPTFL>
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>0</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>7</CpuCode> <CpuCode>7</CpuCode>
<DebugOpt> <DebugOpt>
@ -475,7 +475,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -588,7 +588,7 @@
<OPTFL> <OPTFL>
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>0</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>7</CpuCode> <CpuCode>7</CpuCode>
<DebugOpt> <DebugOpt>
@ -631,7 +631,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -807,7 +807,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>DLGTARM</Key> <Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -817,7 +817,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -973,12 +973,12 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>DLGTARM</Key> <Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -1144,7 +1144,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ULP2CM3</Key> <Key>ULP2CM3</Key>
<Name>-UP0003JBE -O207 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name> <Name>-UP0003JBE -O143 -S9 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(0BA02477) -L00(4) -TO18 -TC10000000 -TP11 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -1154,7 +1154,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>DLGTARM</Key> <Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=2313,171,2547,708,0)(1012=-1,-1,-1,-1,0)</Name> <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>

12
DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx
Unescape Escape View File

@ -262,7 +262,7 @@
<TextAddressRange></TextAddressRange> <TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange> <DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs> <IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir> <IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections</Misc> <Misc>-Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -986,7 +986,7 @@
<TextAddressRange></TextAddressRange> <TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange> <DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs> <IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir> <IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections</Misc> <Misc>-Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -1710,7 +1710,7 @@
<TextAddressRange></TextAddressRange> <TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange> <DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs> <IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir> <IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections</Misc> <Misc>-Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -3158,7 +3158,7 @@
<TextAddressRange></TextAddressRange> <TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange> <DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs> <IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir> <IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections</Misc> <Misc>-Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -3882,7 +3882,7 @@
<TextAddressRange></TextAddressRange> <TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange> <DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs> <IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir> <IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard</Misc> <Misc>-Wl,--gc-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
@ -4606,7 +4606,7 @@
<TextAddressRange></TextAddressRange> <TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange> <DataAddressRange></DataAddressRange>
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortex_math -larm_cortex_ref</IncludeLibs> <IncludeLibs>arm_math -larm_ref</IncludeLibs>
<IncludeDir>.\Lib</IncludeDir> <IncludeDir>.\Lib</IncludeDir>
<Misc>-Wl,--gc-sections -mfpu=fpv5-d16 -mfloat-abi=hard</Misc> <Misc>-Wl,--gc-sections -mfpu=fpv5-d16 -mfloat-abi=hard</Misc>
<ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>

2
DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/pid.c
Unescape Escape View File

@ -57,7 +57,7 @@ q15_t ref_pid_q15(
q15_t out; q15_t out;
q15_t A1, A2; q15_t A1, A2;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
#ifndef ARM_MATH_BIG_ENDIAN #ifndef ARM_MATH_BIG_ENDIAN
A2 = S->A1 >> 16; A2 = S->A1 >> 16;

2
DSP_Lib_TestSuite/parseLog.py
Unescape Escape View File

@ -2,7 +2,7 @@ import sys
toolchain_list = ["ARM", "GCC"] toolchain_list = ["ARM", "GCC"]
core_list = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp", core_list = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp",
"ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfdp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ] "ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfsp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ]
test_list = ["MPS2", "FVP", "Simulator"] test_list = ["MPS2", "FVP", "Simulator"]
error = 1 error = 1

6
DSP_Lib_TestSuite/runTest.bat
Unescape Escape View File

@ -21,9 +21,9 @@ for %%a in ( ^
cortexM7lfdp ^ cortexM7lfdp ^
ARMv8MBLl ^ ARMv8MBLl ^
ARMv8MMLl ^ ARMv8MMLl ^
ARMv8MBLlfsp ^ ARMv8MMLlfsp ^
ARMv8MBLlfdp ^ ARMv8MMLlfdp ^
ARMv8MBLld ^ ARMv8MMLld ^
ARMv8MMLldfsp ^ ARMv8MMLldfsp ^
ARMv8MMLldfdp ^ ARMv8MMLldfdp ^
) do if %2==%%a goto checkParam3 ) do if %2==%%a goto checkParam3

55
Include/arm_common_tables.h
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_common_tables.h * Title: arm_common_tables.h
@ -46,8 +46,6 @@
extern const uint16_t armBitRevTable[1024]; extern const uint16_t armBitRevTable[1024];
extern const q15_t armRecipTableQ15[64]; extern const q15_t armRecipTableQ15[64];
extern const q31_t armRecipTableQ31[64]; extern const q31_t armRecipTableQ31[64];
/* extern const q31_t realCoefAQ31[1024]; */
/* extern const q31_t realCoefBQ31[1024]; */
extern const float32_t twiddleCoef_16[32]; extern const float32_t twiddleCoef_16[32];
extern const float32_t twiddleCoef_32[64]; extern const float32_t twiddleCoef_32[64];
extern const float32_t twiddleCoef_64[128]; extern const float32_t twiddleCoef_64[128];
@ -85,45 +83,44 @@ extern const float32_t twiddleCoef_rfft_1024[1024];
extern const float32_t twiddleCoef_rfft_2048[2048]; extern const float32_t twiddleCoef_rfft_2048[2048];
extern const float32_t twiddleCoef_rfft_4096[4096]; extern const float32_t twiddleCoef_rfft_4096[4096];
/* floating-point bit reversal tables */ /* floating-point bit reversal tables */
#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) #define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) #define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) #define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208) #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440) #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448) #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) #define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) #define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) #define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
/* fixed-point bit reversal tables */ /* fixed-point bit reversal tables */
#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) #define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) #define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) #define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) #define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) #define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) #define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992) #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];

4
Include/arm_const_structs.h
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_const_structs.h * Title: arm_const_structs.h

8
Include/arm_math.h
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2016 ARM Limited. All rights reserved. * Copyright (C) 2010-2016 ARM Limited. All rights reserved.
* *
* $Date: 23. December 2016 * $Date: 03. January 2017
* $Revision: V1.4.5 f * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_math.h * Title: arm_math.h
@ -1797,7 +1797,7 @@ extern "C"
typedef struct typedef struct
{ {
q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
#ifdef ARM_MATH_CM0_FAMILY #if !defined (ARM_MATH_DSP)
q15_t A1; q15_t A1;
q15_t A2; q15_t A2;
#else #else
@ -4940,7 +4940,7 @@ void arm_rfft_fast_f32(
q63_t acc; q63_t acc;
q15_t out; q15_t out;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
__SIMD32_TYPE *vstate; __SIMD32_TYPE *vstate;
/* Implementation of PID controller */ /* Implementation of PID controller */

22
Projects/ARM/arm_cortexM_math_Build.bat
Unescape Escape View File

@ -14,16 +14,16 @@ echo Building DSP Library for Cortex-M3 Little Endian
echo Building DSP Library for Cortex-M4 Little Endian echo Building DSP Library for Cortex-M4 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log"
echo Building DSP Library for Cortex-M4 with FPU Little Endian echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log"
echo Building DSP Library for Cortex-M7 Little Endian echo Building DSP Library for Cortex-M7 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Little Endian echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Little Endian echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log"
echo Building DSP Library for ARMv8-M Baseline Little Endian echo Building DSP Library for ARMv8-M Baseline Little Endian
@ -32,19 +32,19 @@ echo Building DSP Library for ARMv8-M Baseline Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log"
echo Building DSP Library for ARMv8-M Mainline with single precision FPU Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with double precision FPU Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, single precision FPU Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, double precision FPU Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries REM big endian libraries
@ -58,16 +58,16 @@ echo Building DSP Library for Cortex-M3 Big Endian
echo Building DSP Library for Cortex-M4 Big Endian echo Building DSP Library for Cortex-M4 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
echo Building DSP Library for Cortex-M4 with FPU Big Endian echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
echo Building DSP Library for Cortex-M7 Big Endian echo Building DSP Library for Cortex-M7 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Big Endian echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Big Endian echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo. echo.

22
Projects/GCC/arm_cortexM_math_Build.bat
Unescape Escape View File

@ -14,16 +14,16 @@ echo Building DSP Library for Cortex-M3 Little Endian
echo Building DSP Library for Cortex-M4 Little Endian echo Building DSP Library for Cortex-M4 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log"
echo Building DSP Library for Cortex-M4 with FPU Little Endian echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log"
echo Building DSP Library for Cortex-M7 Little Endian echo Building DSP Library for Cortex-M7 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Little Endian echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Little Endian echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log"
echo Building DSP Library for ARMv8-M Baseline Little Endian echo Building DSP Library for ARMv8-M Baseline Little Endian
@ -32,19 +32,19 @@ echo Building DSP Library for ARMv8-M Baseline Little Endian
echo Building DSP Library for ARMv8-M Mainline Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log"
echo Building DSP Library for ARMv8-M Mainline with single precision FPU Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with double precision FPU Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, single precision FPU Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, double precision FPU Little Endian echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries REM big endian libraries
@ -58,16 +58,16 @@ echo Building DSP Library for Cortex-M3 Big Endian
echo Building DSP Library for Cortex-M4 Big Endian echo Building DSP Library for Cortex-M4 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
echo Building DSP Library for Cortex-M4 with FPU Big Endian echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
echo Building DSP Library for Cortex-M7 Big Endian echo Building DSP Library for Cortex-M7 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Big Endian echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Big Endian echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log" %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo. echo.

8
Source/BasicMathFunctions/arm_abs_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_abs_f32.c * Title: arm_abs_f32.c
@ -79,7 +79,7 @@ void arm_abs_f32(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4; /* temporary variables */ float32_t in1, in2, in3, in4; /* temporary variables */
@ -147,7 +147,7 @@ void arm_abs_f32(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_abs_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_abs_q15.c * Title: arm_abs_q15.c
@ -69,7 +69,7 @@ void arm_abs_q15(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
__SIMD32_TYPE *simd; __SIMD32_TYPE *simd;
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -170,7 +170,7 @@ void arm_abs_q15(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_abs_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_abs_q31.c * Title: arm_abs_q31.c
@ -71,7 +71,7 @@ void arm_abs_q31(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
q31_t in; /* Input value */ q31_t in; /* Input value */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4; q31_t in1, in2, in3, in4;
@ -110,7 +110,7 @@ void arm_abs_q31(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

6
Source/BasicMathFunctions/arm_abs_q7.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_abs_q7.c * Title: arm_abs_q7.c
@ -74,7 +74,7 @@ void arm_abs_q7(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
q7_t in; /* Input value1 */ q7_t in; /* Input value1 */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4; /* temporary input variables */ q31_t in1, in2, in3, in4; /* temporary input variables */

8
Source/BasicMathFunctions/arm_add_f32.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_add_f32.c * Title: arm_add_f32.c
@ -78,7 +78,7 @@ void arm_add_f32(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */ float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */
@ -132,7 +132,7 @@ void arm_add_f32(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_add_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_add_q15.c * Title: arm_add_q15.c
@ -71,7 +71,7 @@ void arm_add_q15(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inB1, inB2; q31_t inA1, inA2, inB1, inB2;
@ -130,7 +130,7 @@ void arm_add_q15(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_add_q31.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_add_q31.c * Title: arm_add_q31.c
@ -72,7 +72,7 @@ void arm_add_q31(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inA3, inA4; q31_t inA1, inA2, inA3, inA4;
@ -139,7 +139,7 @@ void arm_add_q31(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_add_q7.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_add_q7.c * Title: arm_add_q7.c
@ -71,7 +71,7 @@ void arm_add_q7(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -124,7 +124,7 @@ void arm_add_q7(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_dot_prod_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_dot_prod_f32.c * Title: arm_dot_prod_f32.c
@ -82,7 +82,7 @@ void arm_dot_prod_f32(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */ /*loop Unrolling */
@ -114,7 +114,7 @@ void arm_dot_prod_f32(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)

8
Source/BasicMathFunctions/arm_dot_prod_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_dot_prod_q15.c * Title: arm_dot_prod_q15.c
@ -75,7 +75,7 @@ void arm_dot_prod_q15(
q63_t sum = 0; /* Temporary result storage */ q63_t sum = 0; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -128,7 +128,7 @@ void arm_dot_prod_q15(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
/* Store the result in the destination buffer in 34.30 format */ /* Store the result in the destination buffer in 34.30 format */
*result = sum; *result = sum;

8
Source/BasicMathFunctions/arm_dot_prod_q31.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_dot_prod_q31.c * Title: arm_dot_prod_q31.c
@ -77,7 +77,7 @@ void arm_dot_prod_q31(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inA3, inA4; q31_t inA1, inA2, inA3, inA4;
@ -121,7 +121,7 @@ void arm_dot_prod_q31(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)

8
Source/BasicMathFunctions/arm_dot_prod_q7.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_dot_prod_q7.c * Title: arm_dot_prod_q7.c
@ -76,7 +76,7 @@ void arm_dot_prod_q7(
q31_t sum = 0; /* Temporary variables to store output */ q31_t sum = 0; /* Temporary variables to store output */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -147,7 +147,7 @@ void arm_dot_prod_q7(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
/* Store the result in the destination buffer in 18.14 format */ /* Store the result in the destination buffer in 18.14 format */

8
Source/BasicMathFunctions/arm_mult_f32.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_mult_f32.c * Title: arm_mult_f32.c
@ -77,7 +77,7 @@ void arm_mult_f32(
uint32_t blockSize) uint32_t blockSize)
{ {
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t inA1, inA2, inA3, inA4; /* temporary input variables */ float32_t inA1, inA2, inA3, inA4; /* temporary input variables */
@ -156,7 +156,7 @@ void arm_mult_f32(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_mult_q15.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_mult_q15.c * Title: arm_mult_q15.c
@ -72,7 +72,7 @@ void arm_mult_q15(
{ {
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ q31_t inA1, inA2, inB1, inB2; /* temporary input variables */
@ -135,7 +135,7 @@ void arm_mult_q15(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)

8
Source/BasicMathFunctions/arm_mult_q31.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_mult_q31.c * Title: arm_mult_q31.c
@ -71,7 +71,7 @@ void arm_mult_q31(
{ {
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inA3, inA4; /* temporary input variables */ q31_t inA1, inA2, inA3, inA4; /* temporary input variables */
@ -152,7 +152,7 @@ void arm_mult_q31(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }
/** /**

8
Source/BasicMathFunctions/arm_mult_q7.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_mult_q7.c * Title: arm_mult_q7.c
@ -71,7 +71,7 @@ void arm_mult_q7(
{ {
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t out1, out2, out3, out4; /* Temporary variables to store the product */ q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
@ -108,7 +108,7 @@ void arm_mult_q7(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)

8
Source/BasicMathFunctions/arm_negate_f32.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_negate_f32.c * Title: arm_negate_f32.c
@ -79,7 +79,7 @@ void arm_negate_f32(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4; /* temporary variables */ float32_t in1, in2, in3, in4; /* temporary variables */
@ -128,7 +128,7 @@ void arm_negate_f32(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_negate_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_negate_q15.c * Title: arm_negate_q15.c
@ -73,7 +73,7 @@ void arm_negate_q15(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
q15_t in; q15_t in;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -123,7 +123,7 @@ void arm_negate_q15(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_negate_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_negate_q31.c * Title: arm_negate_q31.c
@ -70,7 +70,7 @@ void arm_negate_q31(
q31_t in; /* Temporary variable */ q31_t in; /* Temporary variable */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4; q31_t in1, in2, in3, in4;
@ -109,7 +109,7 @@ void arm_negate_q31(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)

8
Source/BasicMathFunctions/arm_negate_q7.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_negate_q7.c * Title: arm_negate_q7.c
@ -70,7 +70,7 @@ void arm_negate_q7(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
q7_t in; q7_t in;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t input; /* Input values1-4 */ q31_t input; /* Input values1-4 */
@ -106,7 +106,7 @@ void arm_negate_q7(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_offset_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_offset_f32.c * Title: arm_offset_f32.c
@ -80,7 +80,7 @@ void arm_offset_f32(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4; float32_t in1, in2, in3, in4;
@ -147,7 +147,7 @@ void arm_offset_f32(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_offset_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_offset_q15.c * Title: arm_offset_q15.c
@ -71,7 +71,7 @@ void arm_offset_q15(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t offset_packed; /* Offset packed to 32 bit */ q31_t offset_packed; /* Offset packed to 32 bit */
@ -127,7 +127,7 @@ void arm_offset_q15(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_offset_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_offset_q31.c * Title: arm_offset_q31.c
@ -71,7 +71,7 @@ void arm_offset_q31(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4; q31_t in1, in2, in3, in4;
@ -131,7 +131,7 @@ void arm_offset_q31(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_offset_q7.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_offset_q7.c * Title: arm_offset_q7.c
@ -71,7 +71,7 @@ void arm_offset_q7(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t offset_packed; /* Offset packed to 32 bit */ q31_t offset_packed; /* Offset packed to 32 bit */
@ -126,7 +126,7 @@ void arm_offset_q7(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_scale_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_scale_f32.c * Title: arm_scale_f32.c
@ -93,7 +93,7 @@ void arm_scale_f32(
uint32_t blockSize) uint32_t blockSize)
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4; /* temporary variabels */ float32_t in1, in2, in3, in4; /* temporary variabels */
@ -151,7 +151,7 @@ void arm_scale_f32(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_scale_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_scale_q15.c * Title: arm_scale_q15.c
@ -75,7 +75,7 @@ void arm_scale_q15(
int8_t kShift = 15 - shift; /* shift to apply after scaling */ int8_t kShift = 15 - shift; /* shift to apply after scaling */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q15_t in1, in2, in3, in4; q15_t in1, in2, in3, in4;
@ -153,7 +153,7 @@ void arm_scale_q15(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_scale_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_scale_q31.c * Title: arm_scale_q31.c
@ -76,7 +76,7 @@ void arm_scale_q31(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
q31_t in, out; q31_t in, out;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -192,7 +192,7 @@ void arm_scale_q31(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
if (sign == 0) if (sign == 0)
{ {

8
Source/BasicMathFunctions/arm_scale_q7.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_scale_q7.c * Title: arm_scale_q7.c
@ -74,7 +74,7 @@ void arm_scale_q7(
int8_t kShift = 7 - shift; /* shift to apply after scaling */ int8_t kShift = 7 - shift; /* shift to apply after scaling */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */ q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */
@ -140,7 +140,7 @@ void arm_scale_q7(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_shift_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_shift_q15.c * Title: arm_shift_q15.c
@ -72,7 +72,7 @@ void arm_shift_q15(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
uint8_t sign; /* Sign of shiftBits */ uint8_t sign; /* Sign of shiftBits */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -239,7 +239,7 @@ void arm_shift_q15(
} }
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_shift_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_shift_q31.c * Title: arm_shift_q31.c
@ -90,7 +90,7 @@ void arm_shift_q31(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
q31_t in1, in2, in3, in4; /* Temporary input variables */ q31_t in1, in2, in3, in4; /* Temporary input variables */
q31_t out1, out2, out3, out4; /* Temporary output variables */ q31_t out1, out2, out3, out4; /* Temporary output variables */
@ -181,7 +181,7 @@ void arm_shift_q31(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)

8
Source/BasicMathFunctions/arm_shift_q7.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_shift_q7.c * Title: arm_shift_q7.c
@ -77,7 +77,7 @@ void arm_shift_q7(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
uint8_t sign; /* Sign of shiftBits */ uint8_t sign; /* Sign of shiftBits */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t in1; /* Input value1 */ q7_t in1; /* Input value1 */
@ -212,7 +212,7 @@ void arm_shift_q7(
} }
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }
/** /**

8
Source/BasicMathFunctions/arm_sub_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sub_f32.c * Title: arm_sub_f32.c
@ -79,7 +79,7 @@ void arm_sub_f32(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t inA1, inA2, inA3, inA4; /* temporary variables */ float32_t inA1, inA2, inA3, inA4; /* temporary variables */
@ -132,7 +132,7 @@ void arm_sub_f32(
/* Initialize blkCnt with number of samples */ /* Initialize blkCnt with number of samples */
blkCnt = blockSize; blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/BasicMathFunctions/arm_sub_q15.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sub_q15.c * Title: arm_sub_q15.c
@ -72,7 +72,7 @@ void arm_sub_q15(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2; q31_t inA1, inA2;
@ -130,7 +130,7 @@ void arm_sub_q15(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_sub_q31.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sub_q31.c * Title: arm_sub_q31.c
@ -72,7 +72,7 @@ void arm_sub_q31(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2, inA3, inA4; q31_t inA1, inA2, inA3, inA4;
@ -137,7 +137,7 @@ void arm_sub_q31(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/BasicMathFunctions/arm_sub_q7.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sub_q7.c * Title: arm_sub_q7.c
@ -71,7 +71,7 @@ void arm_sub_q7(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -121,7 +121,7 @@ void arm_sub_q7(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

98
Source/CommonTables/arm_common_tables.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_common_tables.c * Title: arm_common_tables.c
@ -43,7 +43,7 @@
#include "arm_common_tables.h" #include "arm_common_tables.h"
/** /**
* @ingroup groupTransforms * @ingroup ComplexFFT
*/ */
/** /**
@ -16141,23 +16141,23 @@ const q31_t armRecipTableQ31[64] = {
0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102 0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
}; };
const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH] = const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH] =
{ {
//8x2, size 20 /* 8x2, size 20 */
8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112 8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112
}; };
const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH] = const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH] =
{ {
//8x4, size 48 /* 8x4, size 48 */
8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208, 8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208,
80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208, 80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208,
152,224, 176,208, 184,232, 216,240, 200,224, 232,240 152,224, 176,208, 184,232, 216,240, 200,224, 232,240
}; };
const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH] = const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH] =
{ {
//radix 8, size 56 /* radix 8, size 56 */
8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200, 8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200,
96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400, 96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400,
184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480, 184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480,
@ -16166,7 +16166,7 @@ const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH] =
const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] = const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] =
{ {
//8x2, size 208 /* 8x2, size 208 */
8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768, 8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768,
80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520, 80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520,
144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776, 144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776,
@ -16184,7 +16184,7 @@ const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] =
const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] = const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] =
{ {
//8x4, size 440 /* 8x4, size 440 */
8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640, 8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640,
80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768, 80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768,
144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384, 144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384,
@ -16222,7 +16222,7 @@ const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] =
const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] = const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] =
{ {
//radix 8, size 448 /* radix 8, size 448 */
8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576, 8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576,
80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152, 80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152,
152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216, 152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216,
@ -16260,9 +16260,9 @@ const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] =
3448,3952, 3512,4016, 3576,4080 3448,3952, 3512,4016, 3576,4080
}; };
const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH] = const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH] =
{ {
//8x2, size 1800 /* 8x2, size 1800 */
8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048, 8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048,
72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048, 72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048,
136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696, 136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696,
@ -16412,9 +16412,9 @@ const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH] =
8112,8136, 8120,8168, 8136,8160, 8152,8176 8112,8136, 8120,8168, 8136,8160, 8152,8176
}; };
const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH] = const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH] =
{ {
//8x2, size 3808 /* 8x2, size 3808 */
8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024, 8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024,
72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824, 72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824,
128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752, 128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752,
@ -16754,9 +16754,9 @@ const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH] =
16328,16352, 16360,16368 16328,16352, 16360,16368
}; };
const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH] = const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH] =
{ {
//radix 8, size 4032 /* radix 8, size 4032 */
8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512, 8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512,
72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184, 72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184,
128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600, 128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600,
@ -17126,30 +17126,30 @@ const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH] =
}; };
const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH] =
{ {
//radix 4, size 12 /* radix 4, size 12 */
8,64, 16,32, 24,96, 40,80, 56,112, 88,104 8,64, 16,32, 24,96, 40,80, 56,112, 88,104
}; };
const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH] =
{ {
//4x2, size 24 /* 4x2, size 24 */
8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144, 8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144,
88,208, 104,176, 120,240, 152,200, 184,232 88,208, 104,176, 120,240, 152,200, 184,232
}; };
const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH] =
{ {
//radix 4, size 56 /* radix 4, size 56 */
8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352, 8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352,
112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432, 112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432,
232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472 232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472
}; };
const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH] =
{ {
//4x2, size 112 /* 4x2, size 112 */
8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192, 8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192,
104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608, 104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608,
208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912, 208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912,
@ -17158,9 +17158,9 @@ const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABL
664,808, 696,936, 728,872, 760,1000, 824,920, 888,984 664,808, 696,936, 728,872, 760,1000, 824,920, 888,984
}; };
const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH] =
{ {
//radix 4, size 240 /* radix 4, size 240 */
8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640, 8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640,
88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320, 88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320,
168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960, 168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960,
@ -17177,9 +17177,9 @@ const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABL
1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976 1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976
}; };
const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH] =
{ {
//4x2, size 480 /* 4x2, size 480 */
8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280, 8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280,
88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640, 88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640,
168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944, 168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944,
@ -17213,7 +17213,7 @@ const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABL
const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] =
{ {
//radix 4, size 992 /* radix 4, size 992 */
8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608, 8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608,
80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352, 80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352,
144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864, 144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864,
@ -17287,7 +17287,7 @@ const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TAB
const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] =
{ {
//4x2, size 1984 /* 4x2, size 1984 */
8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024, 8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024,
72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512, 72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512,
136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848, 136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848,
@ -17443,7 +17443,7 @@ const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TAB
const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] = const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] =
{ {
//radix 4, size 4032 /* radix 4, size 4032 */
8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048, 8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048,
72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720, 72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720,
128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312, 128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312,
@ -17788,30 +17788,30 @@ const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TAB
* Real and Imag values are in interleaved fashion * Real and Imag values are in interleaved fashion
*/ */
const float32_t twiddleCoef_rfft_32[32] = { const float32_t twiddleCoef_rfft_32[32] = {
0.0f , 1.0f , 0.000000000f, 1.000000000f,
0.195090322f , 0.98078528f , 0.195090322f, 0.980785280f,
0.382683432f, 0.923879533f, 0.382683432f, 0.923879533f,
0.555570233f, 0.831469612f, 0.555570233f, 0.831469612f,
0.707106781f, 0.707106781f, 0.707106781f, 0.707106781f,
0.831469612f, 0.555570233f, 0.831469612f, 0.555570233f,
0.923879533f, 0.382683432f, 0.923879533f, 0.382683432f,
0.98078528f , 0.195090322f , 0.980785280f, 0.195090322f,
1.0f , 0.0f , 1.000000000f, 0.000000000f,
0.98078528f , -0.195090322f , 0.980785280f, -0.195090322f,
0.923879533f, -0.382683432f, 0.923879533f, -0.382683432f,
0.831469612f, -0.555570233f, 0.831469612f, -0.555570233f,
0.707106781f, -0.707106781f, 0.707106781f, -0.707106781f,
0.555570233f, -0.831469612f, 0.555570233f, -0.831469612f,
0.382683432f, -0.923879533f, 0.382683432f, -0.923879533f,
0.195090322f , -0.98078528f 0.195090322f, -0.980785280f
}; };
const float32_t twiddleCoef_rfft_64[64] = { const float32_t twiddleCoef_rfft_64[64] = {
0.0f, 1.0f, 0.000000000000000f, 1.000000000000000f,
0.098017140329561f, 0.995184726672197f, 0.098017140329561f, 0.995184726672197f,
0.195090322016128f, 0.98078528040323f, 0.195090322016128f, 0.980785280403230f,
0.290284677254462f, 0.956940335732209f, 0.290284677254462f, 0.956940335732209f,
0.38268343236509f, 0.923879532511287f, 0.382683432365090f, 0.923879532511287f,
0.471396736825998f, 0.881921264348355f, 0.471396736825998f, 0.881921264348355f,
0.555570233019602f, 0.831469612302545f, 0.555570233019602f, 0.831469612302545f,
0.634393284163645f, 0.773010453362737f, 0.634393284163645f, 0.773010453362737f,
@ -17819,15 +17819,15 @@ const float32_t twiddleCoef_rfft_64[64] = {
0.773010453362737f, 0.634393284163645f, 0.773010453362737f, 0.634393284163645f,
0.831469612302545f, 0.555570233019602f, 0.831469612302545f, 0.555570233019602f,
0.881921264348355f, 0.471396736825998f, 0.881921264348355f, 0.471396736825998f,
0.923879532511287f, 0.38268343236509f, 0.923879532511287f, 0.382683432365090f,
0.956940335732209f, 0.290284677254462f, 0.956940335732209f, 0.290284677254462f,
0.98078528040323f, 0.195090322016128f, 0.980785280403230f, 0.195090322016128f,
0.995184726672197f, 0.098017140329561f, 0.995184726672197f, 0.098017140329561f,
1.0f, 0.0f, 1.000000000000000f, 0.000000000000000f,
0.995184726672197f, -0.098017140329561f, 0.995184726672197f, -0.098017140329561f,
0.98078528040323f, -0.195090322016128f, 0.980785280403230f, -0.195090322016128f,
0.956940335732209f, -0.290284677254462f, 0.956940335732209f, -0.290284677254462f,
0.923879532511287f, -0.38268343236509f, 0.923879532511287f, -0.382683432365090f,
0.881921264348355f, -0.471396736825998f, 0.881921264348355f, -0.471396736825998f,
0.831469612302545f, -0.555570233019602f, 0.831469612302545f, -0.555570233019602f,
0.773010453362737f, -0.634393284163645f, 0.773010453362737f, -0.634393284163645f,
@ -17835,9 +17835,9 @@ const float32_t twiddleCoef_rfft_64[64] = {
0.634393284163645f, -0.773010453362737f, 0.634393284163645f, -0.773010453362737f,
0.555570233019602f, -0.831469612302545f, 0.555570233019602f, -0.831469612302545f,
0.471396736825998f, -0.881921264348355f, 0.471396736825998f, -0.881921264348355f,
0.38268343236509f, -0.923879532511287f, 0.382683432365090f, -0.923879532511287f,
0.290284677254462f, -0.956940335732209f, 0.290284677254462f, -0.956940335732209f,
0.195090322016129f, -0.98078528040323f, 0.195090322016129f, -0.980785280403230f,
0.098017140329561f, -0.995184726672197f 0.098017140329561f, -0.995184726672197f
}; };

290
Source/CommonTables/arm_const_structs.c
Unescape Escape View File

@ -1,15 +1,16 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_const_structs.c * Title: arm_const_structs.c
* *
* Description: This file has constant structs that are initialized for * Description: This file has constant structs that are initialized for
* user convenience. For example, some can be given as * user convenience. For example, some can be given as
* arguments to the arm_cfft_f32() function. * arguments to the arm_cfft_f32() or arm_rfft_f32()
* functions.
* *
* Target Processor: Cortex-M4/Cortex-M3 * Target Processor: Cortex-M4/Cortex-M3
* *
@ -39,21 +40,19 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
#include "arm_const_structs.h" #include "arm_const_structs.h"
//Floating-point structs /* Floating-point structs */
const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = { const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
}; };
const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = { const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
}; };
const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = { const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
}; };
const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = { const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
@ -69,41 +68,40 @@ const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
}; };
const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = { const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
}; };
const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = { const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
}; };
const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = { const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
}; };
//Fixed-point structs /* Fixed-point structs */
const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = { const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH 16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
}; };
const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = { const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH 32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
}; };
const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = { const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH 64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
}; };
const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = { const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH 128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
}; };
const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = { const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH 256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
}; };
const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = { const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH 512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
}; };
const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = { const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
@ -118,29 +116,28 @@ const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH 4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
}; };
const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = { const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH 16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
}; };
const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = { const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH 32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
}; };
const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = { const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH 64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
}; };
const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = { const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH 128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
}; };
const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = { const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH 256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
}; };
const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = { const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH 512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
}; };
const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = { const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
@ -154,3 +151,242 @@ const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = { const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH 4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
}; };
/* Structure for real-value inputs */
/* Floating-point structs */
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {
{ 16, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
32u,
(float32_t *)twiddleCoef_rfft_32
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {
{ 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
64u,
(float32_t *)twiddleCoef_rfft_64
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {
{ 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
128u,
(float32_t *)twiddleCoef_rfft_128
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {
{ 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
256u,
(float32_t *)twiddleCoef_rfft_256
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {
{ 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
512u,
(float32_t *)twiddleCoef_rfft_512
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {
{ 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
1024u,
(float32_t *)twiddleCoef_rfft_1024
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {
{ 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
2048u,
(float32_t *)twiddleCoef_rfft_2048
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {
{ 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
4096u,
(float32_t *)twiddleCoef_rfft_4096
};
/* Fixed-point structs */
/* q31_t */
extern const q31_t realCoefAQ31[8192];
extern const q31_t realCoefBQ31[8192];
const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {
32u,
0,
1,
256u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len16
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {
64u,
0,
1,
128u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len32
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {
128u,
0,
1,
64u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len64
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {
256u,
0,
1,
32u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len128
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {
512u,
0,
1,
16u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len256
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {
1024u,
0,
1,
8u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len512
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {
2048u,
0,
1,
4u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len1024
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {
4096u,
0,
1,
2u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len2048
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {
8192u,
0,
1,
1u,
(q31_t*)realCoefAQ31,
(q31_t*)realCoefBQ31,
&arm_cfft_sR_q31_len4096
};
/* q15_t */
extern const q15_t realCoefAQ15[8192];
extern const q15_t realCoefBQ15[8192];
const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {
32u,
0,
1,
256u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len16
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {
64u,
0,
1,
128u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len32
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {
128u,
0,
1,
64u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len64
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {
256u,
0,
1,
32u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len128
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {
512u,
0,
1,
16u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len256
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {
1024u,
0,
1,
8u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len512
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {
2048u,
0,
1,
4u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len1024
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {
4096u,
0,
1,
2u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len2048
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {
8192u,
0,
1,
1u,
(q15_t*)realCoefAQ15,
(q15_t*)realCoefBQ15,
&arm_cfft_sR_q15_len4096
};

8
Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_conj_f32.c * Title: arm_cmplx_conj_f32.c
@ -86,7 +86,7 @@ void arm_cmplx_conj_f32(
{ {
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t inR1, inR2, inR3, inR4; float32_t inR1, inR2, inR3, inR4;
@ -163,7 +163,7 @@ void arm_cmplx_conj_f32(
/* Run the below code for Cortex-M0 */ /* Run the below code for Cortex-M0 */
blkCnt = numSamples; blkCnt = numSamples;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_conj_q15.c * Title: arm_cmplx_conj_q15.c
@ -68,7 +68,7 @@ void arm_cmplx_conj_q15(
uint32_t numSamples) uint32_t numSamples)
{ {
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
@ -152,7 +152,7 @@ void arm_cmplx_conj_q15(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_conj_q31.c * Title: arm_cmplx_conj_q31.c
@ -69,7 +69,7 @@ void arm_cmplx_conj_q31(
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
q31_t in; /* Input value */ q31_t in; /* Input value */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inR1, inR2, inR3, inR4; /* Temporary real variables */ q31_t inR1, inR2, inR3, inR4; /* Temporary real variables */
@ -159,7 +159,7 @@ void arm_cmplx_conj_q31(
blkCnt = numSamples; blkCnt = numSamples;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_dot_prod_f32.c * Title: arm_cmplx_dot_prod_f32.c
@ -95,7 +95,7 @@ void arm_cmplx_dot_prod_f32(
float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result storage */ float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result storage */
float32_t a0,b0,c0,d0; float32_t a0,b0,c0,d0;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
@ -191,7 +191,7 @@ void arm_cmplx_dot_prod_f32(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
/* Store the real and imaginary results in the destination buffers */ /* Store the real and imaginary results in the destination buffers */
*realResult = real_sum; *realResult = real_sum;

8
Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_dot_prod_q15.c * Title: arm_cmplx_dot_prod_q15.c
@ -77,7 +77,7 @@ void arm_cmplx_dot_prod_q15(
q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */ q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
q15_t a0,b0,c0,d0; q15_t a0,b0,c0,d0;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
@ -175,7 +175,7 @@ void arm_cmplx_dot_prod_q15(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
/* Store the real and imaginary results in 8.24 format */ /* Store the real and imaginary results in 8.24 format */
/* Convert real data in 34.30 to 8.24 by 6 right shifts */ /* Convert real data in 34.30 to 8.24 by 6 right shifts */

8
Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_dot_prod_q31.c * Title: arm_cmplx_dot_prod_q31.c
@ -78,7 +78,7 @@ void arm_cmplx_dot_prod_q31(
q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */ q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
q31_t a0,b0,c0,d0; q31_t a0,b0,c0,d0;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
@ -175,7 +175,7 @@ void arm_cmplx_dot_prod_q31(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
/* Store the real and imaginary results in 16.48 format */ /* Store the real and imaginary results in 16.48 format */
*realResult = real_sum; *realResult = real_sum;

8
Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mag_f32.c * Title: arm_cmplx_mag_f32.c
@ -88,7 +88,7 @@ void arm_cmplx_mag_f32(
{ {
float32_t realIn, imagIn; /* Temporary variables to hold input values */ float32_t realIn, imagIn; /* Temporary variables to hold input values */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
@ -156,7 +156,7 @@ void arm_cmplx_mag_f32(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mag_q15.c * Title: arm_cmplx_mag_q15.c
@ -69,7 +69,7 @@ void arm_cmplx_mag_q15(
{ {
q31_t acc0, acc1; /* Accumulators */ q31_t acc0, acc1; /* Accumulators */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
@ -144,7 +144,7 @@ void arm_cmplx_mag_q15(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mag_q31.c * Title: arm_cmplx_mag_q31.c
@ -71,7 +71,7 @@ void arm_cmplx_mag_q31(
q31_t acc0, acc1; /* Accumulators */ q31_t acc0, acc1; /* Accumulators */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t real1, real2, imag1, imag2; /* Temporary variables to hold input values */ q31_t real1, real2, imag1, imag2; /* Temporary variables to hold input values */
@ -163,7 +163,7 @@ void arm_cmplx_mag_q31(
/* Run the below code for Cortex-M0 */ /* Run the below code for Cortex-M0 */
blkCnt = numSamples; blkCnt = numSamples;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mag_squared_f32.c * Title: arm_cmplx_mag_squared_f32.c
@ -89,7 +89,7 @@ void arm_cmplx_mag_squared_f32(
float32_t real, imag; /* Temporary variables to store real and imaginary values */ float32_t real, imag; /* Temporary variables to store real and imaginary values */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
float32_t real1, real2, real3, real4; /* Temporary variables to hold real values */ float32_t real1, real2, real3, real4; /* Temporary variables to hold real values */
float32_t imag1, imag2, imag3, imag4; /* Temporary variables to hold imaginary values */ float32_t imag1, imag2, imag3, imag4; /* Temporary variables to hold imaginary values */
float32_t mul1, mul2, mul3, mul4; /* Temporary variables */ float32_t mul1, mul2, mul3, mul4; /* Temporary variables */
@ -193,7 +193,7 @@ void arm_cmplx_mag_squared_f32(
blkCnt = numSamples; blkCnt = numSamples;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mag_squared_q15.c * Title: arm_cmplx_mag_squared_q15.c
@ -68,7 +68,7 @@ void arm_cmplx_mag_squared_q15(
{ {
q31_t acc0, acc1; /* Accumulators */ q31_t acc0, acc1; /* Accumulators */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
@ -139,7 +139,7 @@ void arm_cmplx_mag_squared_q15(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mag_squared_q31.c * Title: arm_cmplx_mag_squared_q31.c
@ -71,7 +71,7 @@ void arm_cmplx_mag_squared_q31(
q31_t real, imag; /* Temporary variables to store real and imaginary values */ q31_t real, imag; /* Temporary variables to store real and imaginary values */
q31_t acc0, acc1; /* Accumulators */ q31_t acc0, acc1; /* Accumulators */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */ uint32_t blkCnt; /* loop counter */
@ -152,7 +152,7 @@ void arm_cmplx_mag_squared_q31(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mult_cmplx_f32.c * Title: arm_cmplx_mult_cmplx_f32.c
@ -89,7 +89,7 @@ void arm_cmplx_mult_cmplx_f32(
float32_t a1, b1, c1, d1; /* Temporary variables to store real and imaginary values */ float32_t a1, b1, c1, d1; /* Temporary variables to store real and imaginary values */
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t a2, b2, c2, d2; /* Temporary variables to store real and imaginary values */ float32_t a2, b2, c2, d2; /* Temporary variables to store real and imaginary values */
@ -182,7 +182,7 @@ void arm_cmplx_mult_cmplx_f32(
/* Run the below code for Cortex-M0 */ /* Run the below code for Cortex-M0 */
blkCnt = numSamples; blkCnt = numSamples;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mult_cmplx_q15.c * Title: arm_cmplx_mult_cmplx_q15.c
@ -70,7 +70,7 @@ void arm_cmplx_mult_cmplx_q15(
{ {
q15_t a, b, c, d; /* Temporary variables to store real and imaginary values */ q15_t a, b, c, d; /* Temporary variables to store real and imaginary values */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
@ -184,7 +184,7 @@ void arm_cmplx_mult_cmplx_q15(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mult_cmplx_q31.c * Title: arm_cmplx_mult_cmplx_q31.c
@ -75,7 +75,7 @@ void arm_cmplx_mult_cmplx_q31(
q31_t mul1, mul2, mul3, mul4; q31_t mul1, mul2, mul3, mul4;
q31_t out1, out2; q31_t out1, out2;
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -317,7 +317,7 @@ void arm_cmplx_mult_cmplx_q31(
blkCnt--; blkCnt--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mult_real_f32.c * Title: arm_cmplx_mult_real_f32.c
@ -91,7 +91,7 @@ void arm_cmplx_mult_real_f32(
float32_t in; /* Temporary variable to store input value */ float32_t in; /* Temporary variable to store input value */
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t inA1, inA2, inA3, inA4; /* Temporary variables to hold input data */ float32_t inA1, inA2, inA3, inA4; /* Temporary variables to hold input data */
@ -204,7 +204,7 @@ void arm_cmplx_mult_real_f32(
/* Run the below code for Cortex-M0 */ /* Run the below code for Cortex-M0 */
blkCnt = numSamples; blkCnt = numSamples;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u) while (blkCnt > 0u)
{ {

8
Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
Unescape Escape View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mult_real_q15.c * Title: arm_cmplx_mult_real_q15.c
@ -72,7 +72,7 @@ void arm_cmplx_mult_real_q15(
{ {
q15_t in; /* Temporary variable to store input value */ q15_t in; /* Temporary variable to store input value */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
@ -194,7 +194,7 @@ void arm_cmplx_mult_real_q15(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cmplx_mult_real_q31.c * Title: arm_cmplx_mult_real_q31.c
@ -72,7 +72,7 @@ void arm_cmplx_mult_real_q31(
{ {
q31_t inA1; /* Temporary variable to store input value */ q31_t inA1; /* Temporary variable to store input value */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counters */ uint32_t blkCnt; /* loop counters */
@ -214,7 +214,7 @@ void arm_cmplx_mult_real_q31(
numSamples--; numSamples--;
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

5
Source/ControllerFunctions/arm_pid_init_f32.c
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@ -1,15 +1,14 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_pid_init_f32.c * Title: arm_pid_init_f32.c
* *
* Description: Floating-point PID Control initialization function * Description: Floating-point PID Control initialization function
* *
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without

8
Source/ControllerFunctions/arm_pid_init_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_pid_init_q15.c * Title: arm_pid_init_q15.c
@ -63,7 +63,7 @@ void arm_pid_init_q15(
int32_t resetStateFlag) int32_t resetStateFlag)
{ {
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -113,7 +113,7 @@ void arm_pid_init_q15(
memset(S->state, 0, 3u * sizeof(q15_t)); memset(S->state, 0, 3u * sizeof(q15_t));
} }
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/ControllerFunctions/arm_pid_init_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_pid_init_q31.c * Title: arm_pid_init_q31.c
@ -63,7 +63,7 @@ void arm_pid_init_q31(
int32_t resetStateFlag) int32_t resetStateFlag)
{ {
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -88,7 +88,7 @@ void arm_pid_init_q31(
temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd); temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp); S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
/* Derived coefficient A2 */ /* Derived coefficient A2 */
S->A2 = S->Kd; S->A2 = S->Kd;

4
Source/ControllerFunctions/arm_pid_reset_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_pid_reset_f32.c * Title: arm_pid_reset_f32.c

4
Source/ControllerFunctions/arm_pid_reset_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_pid_reset_q15.c * Title: arm_pid_reset_q15.c

4
Source/ControllerFunctions/arm_pid_reset_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_pid_reset_q31.c * Title: arm_pid_reset_q31.c

6
Source/ControllerFunctions/arm_sin_cos_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 22. December 2016 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sin_cos_f32.c * Title: arm_sin_cos_f32.c
@ -58,6 +58,8 @@
* The floating point function also allows values that are out of the usual range. When this happens, the function will * The floating point function also allows values that are out of the usual range. When this happens, the function will
* take extra time to adjust the input value to the range of [-180 180]. * take extra time to adjust the input value to the range of [-180 180].
* *
* The result is accurate to 5 digits after the decimal point.
*
* The implementation is based on table lookup using 360 values together with linear interpolation. * The implementation is based on table lookup using 360 values together with linear interpolation.
* The steps used are: * The steps used are:
* -# Calculation of the nearest integer table index. * -# Calculation of the nearest integer table index.

4
Source/ControllerFunctions/arm_sin_cos_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sin_cos_q31.c * Title: arm_sin_cos_q31.c

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Source/FastMathFunctions/arm_cos_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 21. September 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cos_f32.c * Title: arm_cos_f32.c

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Source/FastMathFunctions/arm_cos_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 07. September 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cos_q15.c * Title: arm_cos_q15.c

4
Source/FastMathFunctions/arm_cos_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 07. September 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_cos_q31.c * Title: arm_cos_q31.c

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Source/FastMathFunctions/arm_sin_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 21. September 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sin_f32.c * Title: arm_sin_f32.c

4
Source/FastMathFunctions/arm_sin_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sin_q15.c * Title: arm_sin_q15.c

4
Source/FastMathFunctions/arm_sin_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sin_q31.c * Title: arm_sin_q31.c

4
Source/FastMathFunctions/arm_sqrt_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sqrt_q15.c * Title: arm_sqrt_q15.c

4
Source/FastMathFunctions/arm_sqrt_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_sqrt_q31.c * Title: arm_sqrt_q31.c

4
Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_32x64_init_q31.c * Title: arm_biquad_cascade_df1_32x64_init_q31.c

8
Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_32x64_q31.c * Title: arm_biquad_cascade_df1_32x64_q31.c
@ -206,7 +206,7 @@ void arm_biquad_cas_df1_32x64_q31(
uint32_t lShift = 32u - uShift; /* Shift to be applied to the output */ uint32_t lShift = 32u - uShift; /* Shift to be applied to the output */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -553,7 +553,7 @@ void arm_biquad_cas_df1_32x64_q31(
} while (--stage); } while (--stage);
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }
/** /**

8
Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_f32.c * Title: arm_biquad_cascade_df1_f32.c
@ -192,7 +192,7 @@ void arm_biquad_cascade_df1_f32(
uint32_t sample, stage = S->numStages; /* loop counters */ uint32_t sample, stage = S->numStages; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -415,7 +415,7 @@ void arm_biquad_cascade_df1_f32(
} while (stage > 0u); } while (stage > 0u);
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

4
Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_fast_q15.c * Title: arm_biquad_cascade_df1_fast_q15.c

4
Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_fast_q31.c * Title: arm_biquad_cascade_df1_fast_q31.c

4
Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
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@ -1,8 +1,8 @@
/*----------------------------------------------------------------------------- /*-----------------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_init_f32.c * Title: arm_biquad_cascade_df1_init_f32.c

4
Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
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@ -1,8 +1,8 @@
/*----------------------------------------------------------------------------- /*-----------------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_init_q15.c * Title: arm_biquad_cascade_df1_init_q15.c

5
Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
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@ -1,15 +1,14 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_init_q31.c * Title: arm_biquad_cascade_df1_init_q31.c
* *
* Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function. * Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function.
* *
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without

8
Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_q15.c * Title: arm_biquad_cascade_df1_q15.c
@ -80,7 +80,7 @@ void arm_biquad_cascade_df1_q15(
{ {
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */ /* Run the below code for Cortex-M4 and Cortex-M3 */
@ -401,7 +401,7 @@ void arm_biquad_cascade_df1_q15(
} while (--stage); } while (--stage);
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

8
Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 a * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_q31.c * Title: arm_biquad_cascade_df1_q31.c
@ -90,7 +90,7 @@ void arm_biquad_cascade_df1_q31(
uint32_t sample, stage = S->numStages; /* loop counters */ uint32_t sample, stage = S->numStages; /* loop counters */
#ifndef ARM_MATH_CM0_FAMILY #if defined (ARM_MATH_DSP)
q31_t acc_l, acc_h; /* temporary output variables */ q31_t acc_l, acc_h; /* temporary output variables */
@ -394,7 +394,7 @@ void arm_biquad_cascade_df1_q31(
} while (--stage); } while (--stage);
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ #endif /* #if defined (ARM_MATH_DSP) */
} }

4
Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df2T_f32.c * Title: arm_biquad_cascade_df2T_f32.c

4
Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df2T_f64.c * Title: arm_biquad_cascade_df2T_f64.c

4
Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
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@ -1,8 +1,8 @@
/*----------------------------------------------------------------------------- /*-----------------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df2T_init_f32.c * Title: arm_biquad_cascade_df2T_init_f32.c

4
Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
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@ -1,8 +1,8 @@
/*----------------------------------------------------------------------------- /*-----------------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df2T_init_f64.c * Title: arm_biquad_cascade_df2T_init_f64.c

4
Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
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@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 03. January 2017
* $Revision: V.1.4.5 * $Revision: V.1.5.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_biquad_cascade_stereo_df2T_f32.c * Title: arm_biquad_cascade_stereo_df2T_f32.c

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