dengzhihao
/
CMSIS-DSP
0
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Improved gcc csolution file to build on Cortex A5,A7 and A9.

Browse Source 
It is requiring some changes in the cmake of CMSIS build tools (because
Cortex-A targets are not yet available).

It is requiring a fix to the packs (CMSIS >= 5.9.0)
pull/32/head
Christophe Favergeon 3 years ago
parent ae24b870e7
commit 7cd6cf1e66
22 changed files with 118 additions and 96 deletions
Show Stats Download Patch File Download Diff File

28
Testing/cmsis_build/RTE/Device/ARMCA5/ARMCA5.ld
Unescape Escape View File

@ -1,10 +1,10 @@
#include "mem_ARMCA5.h"
MEMORY MEMORY
{ {
ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE ROM (rx) : ORIGIN = 0x80000000, LENGTH = 0x00200000
L_TTB (rw) : ORIGIN = __TTB_BASE, LENGTH = __TTB_SIZE L_TTB (rw) : ORIGIN = 0x80500000, LENGTH = 0x00005000
RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE RAM (rwx) : ORIGIN = 0x80200000, LENGTH = 0x00300000
} }
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
@ -83,7 +83,7 @@ SECTIONS
.ttb : .ttb :
{ {
Image$$TTB$$ZI$$Base = .; Image$$TTB$$ZI$$Base = .;
. += __TTB_SIZE; . += 0x00005000;
Image$$TTB$$ZI$$Limit = .; Image$$TTB$$ZI$$Limit = .;
} > L_TTB } > L_TTB
@ -135,46 +135,44 @@ SECTIONS
end = __end__; end = __end__;
} > RAM } > RAM
#if defined(__HEAP_SIZE) && (__HEAP_SIZE > 0)
.heap (NOLOAD): .heap (NOLOAD):
{ {
. = ALIGN(8); . = ALIGN(8);
Image$$HEAP$$ZI$$Base = .; Image$$HEAP$$ZI$$Base = .;
. += __HEAP_SIZE; . += 0x00100000;
Image$$HEAP$$ZI$$Limit = .; Image$$HEAP$$ZI$$Limit = .;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
#endif
.stack (NOLOAD): .stack (NOLOAD):
{ {
. = ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __FIQ_STACK_SIZE - __IRQ_STACK_SIZE - __SVC_STACK_SIZE - __ABT_STACK_SIZE - __UND_STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - 0x00002000 - 0x00000100 - 0x00000100 - 0x00000100 - 0x00000100 - 0x00000100;
. = ALIGN(8); . = ALIGN(8);
__StackTop = .; __StackTop = .;
Image$$SYS_STACK$$ZI$$Base = .; Image$$SYS_STACK$$ZI$$Base = .;
. += __STACK_SIZE; . += 0x00002000;
Image$$SYS_STACK$$ZI$$Limit = .; Image$$SYS_STACK$$ZI$$Limit = .;
__stack = .; __stack = .;
Image$$FIQ_STACK$$ZI$$Base = .; Image$$FIQ_STACK$$ZI$$Base = .;
. += __FIQ_STACK_SIZE; . += 0x00000100;
Image$$FIQ_STACK$$ZI$$Limit = .; Image$$FIQ_STACK$$ZI$$Limit = .;
Image$$IRQ_STACK$$ZI$$Base = .; Image$$IRQ_STACK$$ZI$$Base = .;
. += __IRQ_STACK_SIZE; . += 0x00000100;
Image$$IRQ_STACK$$ZI$$Limit = .; Image$$IRQ_STACK$$ZI$$Limit = .;
Image$$SVC_STACK$$ZI$$Base = .; Image$$SVC_STACK$$ZI$$Base = .;
. += __SVC_STACK_SIZE; . += 0x00000100;
Image$$SVC_STACK$$ZI$$Limit = .; Image$$SVC_STACK$$ZI$$Limit = .;
Image$$ABT_STACK$$ZI$$Base = .; Image$$ABT_STACK$$ZI$$Base = .;
. += __ABT_STACK_SIZE; . += 0x00000100;
Image$$ABT_STACK$$ZI$$Limit = .; Image$$ABT_STACK$$ZI$$Limit = .;
Image$$UND_STACK$$ZI$$Base = .; Image$$UND_STACK$$ZI$$Base = .;
. += __UND_STACK_SIZE; . += 0x00000100;
Image$$UND_STACK$$ZI$$Limit = .; Image$$UND_STACK$$ZI$$Limit = .;
} > RAM } > RAM

8
Testing/cmsis_build/RTE/Device/ARMCA5/startup_ARMCA5.c
Unescape Escape View File

@ -115,7 +115,11 @@ void Reset_Handler(void) {
"CPS #0x1B \n" "CPS #0x1B \n"
"LDR SP, =Image$$UND_STACK$$ZI$$Limit \n" "LDR SP, =Image$$UND_STACK$$ZI$$Limit \n"
"CPS #0x1F \n" "CPS #0x1F \n"
#if defined ( __GNUC__ )
"LDR SP, =Image$$SYS_STACK$$ZI$$Limit \n"
#else
"LDR SP, =Image$$ARM_LIB_STACK$$ZI$$Limit \n" "LDR SP, =Image$$ARM_LIB_STACK$$ZI$$Limit \n"
#endif
// Call SystemInit // Call SystemInit
"BL SystemInit \n" "BL SystemInit \n"
@ -124,7 +128,11 @@ void Reset_Handler(void) {
"CPSIE if \n" "CPSIE if \n"
// Call __main // Call __main
#if defined ( __GNUC__ )
"BL _start \n"
#else
"BL __main \n" "BL __main \n"
#endif
); );
} }

28
Testing/cmsis_build/RTE/Device/ARMCA7/ARMCA7.ld
Unescape Escape View File

@ -1,10 +1,10 @@
#include "mem_ARMCA7.h"
MEMORY MEMORY
{ {
ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE ROM (rx) : ORIGIN = 0x80000000, LENGTH = 0x00200000
L_TTB (rw) : ORIGIN = __TTB_BASE, LENGTH = __TTB_SIZE L_TTB (rw) : ORIGIN = 0x80500000, LENGTH = 0x00005000
RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE RAM (rwx) : ORIGIN = 0x80200000, LENGTH = 0x00300000
} }
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
@ -83,7 +83,7 @@ SECTIONS
.ttb : .ttb :
{ {
Image$$TTB$$ZI$$Base = .; Image$$TTB$$ZI$$Base = .;
. += __TTB_SIZE; . += 0x00005000;
Image$$TTB$$ZI$$Limit = .; Image$$TTB$$ZI$$Limit = .;
} > L_TTB } > L_TTB
@ -135,46 +135,44 @@ SECTIONS
end = __end__; end = __end__;
} > RAM } > RAM
#if defined(__HEAP_SIZE) && (__HEAP_SIZE > 0)
.heap (NOLOAD): .heap (NOLOAD):
{ {
. = ALIGN(8); . = ALIGN(8);
Image$$HEAP$$ZI$$Base = .; Image$$HEAP$$ZI$$Base = .;
. += __HEAP_SIZE; . += 0x00100000;
Image$$HEAP$$ZI$$Limit = .; Image$$HEAP$$ZI$$Limit = .;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
#endif
.stack (NOLOAD): .stack (NOLOAD):
{ {
. = ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __FIQ_STACK_SIZE - __IRQ_STACK_SIZE - __SVC_STACK_SIZE - __ABT_STACK_SIZE - __UND_STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - 0x00002000 - 0x00000100 - 0x00000100 - 0x00000100 - 0x00000100 - 0x00000100;
. = ALIGN(8); . = ALIGN(8);
__StackTop = .; __StackTop = .;
Image$$SYS_STACK$$ZI$$Base = .; Image$$SYS_STACK$$ZI$$Base = .;
. += __STACK_SIZE; . += 0x00002000;
Image$$SYS_STACK$$ZI$$Limit = .; Image$$SYS_STACK$$ZI$$Limit = .;
__stack = .; __stack = .;
Image$$FIQ_STACK$$ZI$$Base = .; Image$$FIQ_STACK$$ZI$$Base = .;
. += __FIQ_STACK_SIZE; . += 0x00000100;
Image$$FIQ_STACK$$ZI$$Limit = .; Image$$FIQ_STACK$$ZI$$Limit = .;
Image$$IRQ_STACK$$ZI$$Base = .; Image$$IRQ_STACK$$ZI$$Base = .;
. += __IRQ_STACK_SIZE; . += 0x00000100;
Image$$IRQ_STACK$$ZI$$Limit = .; Image$$IRQ_STACK$$ZI$$Limit = .;
Image$$SVC_STACK$$ZI$$Base = .; Image$$SVC_STACK$$ZI$$Base = .;
. += __SVC_STACK_SIZE; . += 0x00000100;
Image$$SVC_STACK$$ZI$$Limit = .; Image$$SVC_STACK$$ZI$$Limit = .;
Image$$ABT_STACK$$ZI$$Base = .; Image$$ABT_STACK$$ZI$$Base = .;
. += __ABT_STACK_SIZE; . += 0x00000100;
Image$$ABT_STACK$$ZI$$Limit = .; Image$$ABT_STACK$$ZI$$Limit = .;
Image$$UND_STACK$$ZI$$Base = .; Image$$UND_STACK$$ZI$$Base = .;
. += __UND_STACK_SIZE; . += 0x00000100;
Image$$UND_STACK$$ZI$$Limit = .; Image$$UND_STACK$$ZI$$Limit = .;
} > RAM } > RAM

10
Testing/cmsis_build/RTE/Device/ARMCA7/startup_ARMCA7.c
Unescape Escape View File

@ -115,7 +115,11 @@ void Reset_Handler(void) {
"CPS #0x1B \n" "CPS #0x1B \n"
"LDR SP, =Image$$UND_STACK$$ZI$$Limit \n" "LDR SP, =Image$$UND_STACK$$ZI$$Limit \n"
"CPS #0x1F \n" "CPS #0x1F \n"
#if defined ( __GNUC__ )
"LDR SP, =Image$$SYS_STACK$$ZI$$Limit \n"
#else
"LDR SP, =Image$$ARM_LIB_STACK$$ZI$$Limit \n" "LDR SP, =Image$$ARM_LIB_STACK$$ZI$$Limit \n"
#endif
// Call SystemInit // Call SystemInit
"BL SystemInit \n" "BL SystemInit \n"
@ -124,7 +128,11 @@ void Reset_Handler(void) {
"CPSIE if \n" "CPSIE if \n"
// Call __main // Call __main
"BL __main \n" #if defined ( __GNUC__ )
"BL _start \n"
#else
"BL __main \n"
#endif
); );
} }

28
Testing/cmsis_build/RTE/Device/ARMCA9/ARMCA9.ld
Unescape Escape View File

@ -1,10 +1,10 @@
#include "mem_ARMCA9.h"
MEMORY MEMORY
{ {
ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE ROM (rx) : ORIGIN = 0x80000000, LENGTH = 0x00200000
L_TTB (rw) : ORIGIN = __TTB_BASE, LENGTH = __TTB_SIZE L_TTB (rw) : ORIGIN = 0x80500000, LENGTH = 0x00005000
RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE RAM (rwx) : ORIGIN = 0x80200000, LENGTH = 0x00300000
} }
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
@ -83,7 +83,7 @@ SECTIONS
.ttb : .ttb :
{ {
Image$$TTB$$ZI$$Base = .; Image$$TTB$$ZI$$Base = .;
. += __TTB_SIZE; . += 0x00005000;
Image$$TTB$$ZI$$Limit = .; Image$$TTB$$ZI$$Limit = .;
} > L_TTB } > L_TTB
@ -135,46 +135,44 @@ SECTIONS
end = __end__; end = __end__;
} > RAM } > RAM
#if defined(__HEAP_SIZE) && (__HEAP_SIZE > 0)
.heap (NOLOAD): .heap (NOLOAD):
{ {
. = ALIGN(8); . = ALIGN(8);
Image$$HEAP$$ZI$$Base = .; Image$$HEAP$$ZI$$Base = .;
. += __HEAP_SIZE; . += 0x00100000;
Image$$HEAP$$ZI$$Limit = .; Image$$HEAP$$ZI$$Limit = .;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
#endif
.stack (NOLOAD): .stack (NOLOAD):
{ {
. = ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __FIQ_STACK_SIZE - __IRQ_STACK_SIZE - __SVC_STACK_SIZE - __ABT_STACK_SIZE - __UND_STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - 0x00002000 - 0x00000100 - 0x00000100 - 0x00000100 - 0x00000100 - 0x00000100;
. = ALIGN(8); . = ALIGN(8);
__StackTop = .; __StackTop = .;
Image$$SYS_STACK$$ZI$$Base = .; Image$$SYS_STACK$$ZI$$Base = .;
. += __STACK_SIZE; . += 0x00002000;
Image$$SYS_STACK$$ZI$$Limit = .; Image$$SYS_STACK$$ZI$$Limit = .;
__stack = .; __stack = .;
Image$$FIQ_STACK$$ZI$$Base = .; Image$$FIQ_STACK$$ZI$$Base = .;
. += __FIQ_STACK_SIZE; . += 0x00000100;
Image$$FIQ_STACK$$ZI$$Limit = .; Image$$FIQ_STACK$$ZI$$Limit = .;
Image$$IRQ_STACK$$ZI$$Base = .; Image$$IRQ_STACK$$ZI$$Base = .;
. += __IRQ_STACK_SIZE; . += 0x00000100;
Image$$IRQ_STACK$$ZI$$Limit = .; Image$$IRQ_STACK$$ZI$$Limit = .;
Image$$SVC_STACK$$ZI$$Base = .; Image$$SVC_STACK$$ZI$$Base = .;
. += __SVC_STACK_SIZE; . += 0x00000100;
Image$$SVC_STACK$$ZI$$Limit = .; Image$$SVC_STACK$$ZI$$Limit = .;
Image$$ABT_STACK$$ZI$$Base = .; Image$$ABT_STACK$$ZI$$Base = .;
. += __ABT_STACK_SIZE; . += 0x00000100;
Image$$ABT_STACK$$ZI$$Limit = .; Image$$ABT_STACK$$ZI$$Limit = .;
Image$$UND_STACK$$ZI$$Base = .; Image$$UND_STACK$$ZI$$Base = .;
. += __UND_STACK_SIZE; . += 0x00000100;
Image$$UND_STACK$$ZI$$Limit = .; Image$$UND_STACK$$ZI$$Limit = .;
} > RAM } > RAM

10
Testing/cmsis_build/RTE/Device/ARMCA9/startup_ARMCA9.c
Unescape Escape View File

@ -115,7 +115,11 @@ void Reset_Handler(void) {
"CPS #0x1B \n" "CPS #0x1B \n"
"LDR SP, =Image$$UND_STACK$$ZI$$Limit \n" "LDR SP, =Image$$UND_STACK$$ZI$$Limit \n"
"CPS #0x1F \n" "CPS #0x1F \n"
#if defined ( __GNUC__ )
"LDR SP, =Image$$SYS_STACK$$ZI$$Limit \n"
#else
"LDR SP, =Image$$ARM_LIB_STACK$$ZI$$Limit \n" "LDR SP, =Image$$ARM_LIB_STACK$$ZI$$Limit \n"
#endif
// Call SystemInit // Call SystemInit
"BL SystemInit \n" "BL SystemInit \n"
@ -124,7 +128,11 @@ void Reset_Handler(void) {
"CPSIE if \n" "CPSIE if \n"
// Call __main // Call __main
"BL __main \n" #if defined ( __GNUC__ )
"BL _start \n"
#else
"BL __main \n"
#endif
); );
} }

4
Testing/cmsis_build/build.sh
Unescape Escape View File

@ -4,10 +4,10 @@
# cbuild "test.Release+VHT_M4.cprj" --outdir=Objects --intdir=Tmp # cbuild "test.Release+VHT_M4.cprj" --outdir=Objects --intdir=Tmp
# cbuild "test.Release+VHT_M7.cprj" --outdir=Objects --intdir=Tmp # cbuild "test.Release+VHT_M7.cprj" --outdir=Objects --intdir=Tmp
# cbuild "test.Release+VHT_M33.cprj" --outdir=Objects --intdir=Tmp # cbuild "test.Release+VHT_M33.cprj" --outdir=Objects --intdir=Tmp
#cbuild "test.Release+VHT-Corstone-300.cprj" --outdir=Objects --intdir=Tmp cbuild "test.Release+VHT-Corstone-300.cprj" --outdir=Objects --intdir=Tmp
# cbuild "test.Release+VHT-Corstone-310.cprj" --outdir=Objects --intdir=Tmp # cbuild "test.Release+VHT-Corstone-310.cprj" --outdir=Objects --intdir=Tmp
# cbuild "test.Release+FVP_M55.cprj" --outdir=Objects --intdir=Tmp # cbuild "test.Release+FVP_M55.cprj" --outdir=Objects --intdir=Tmp
cbuild "test.Release+FVP_A5Neon.cprj" --outdir=Objects --intdir=Tmp #cbuild "test.Release+FVP_A5Neon.cprj" --outdir=Objects --intdir=Tmp
#cbuild "test.Release+FVP_A7Neon.cprj" --outdir=Objects --intdir=Tmp #cbuild "test.Release+FVP_A7Neon.cprj" --outdir=Objects --intdir=Tmp
#cbuild "test.Release+FVP_A9Neon.cprj" --outdir=Objects --intdir=Tmp #cbuild "test.Release+FVP_A9Neon.cprj" --outdir=Objects --intdir=Tmp

12
Testing/cmsis_build/runarmds.bat
Unescape Escape View File

@ -1,11 +1,11 @@
"C:\Program Files\ARM\Development Studio 2022.0\bin\FVP_VE_Cortex-A5x1.exe" ^ REM "C:\Program Files\ARM\Development Studio 2022.0\bin\FVP_VE_Cortex-A5x1.exe" ^
-f configs/ARMCA5neon_config.txt ^ REM -f configs/ARMCA5neon_config.txt ^
Objects\test.Release+FVP_A5Neon.axf REM Objects\test.Release+FVP_A5Neon.axf
REM "C:\Program Files\ARM\Development Studio 2022.0\bin\FVP_VE_Cortex-A7x1.exe" ^ REM "C:\Program Files\ARM\Development Studio 2022.0\bin\FVP_VE_Cortex-A7x1.exe" ^
REM -f configs/ARMCA7neon_config.txt ^ REM -f configs/ARMCA7neon_config.txt ^
REM Objects\test.Release+FVP_A7Neon.axf REM Objects\test.Release+FVP_A7Neon.axf
REM "C:\Program Files\ARM\Development Studio 2022.0\bin\FVP_VE_Cortex-A9x1.exe" ^ "C:\Program Files\ARM\Development Studio 2022.0\bin\FVP_VE_Cortex-A9x1.exe" ^
REM -f configs/ARMCA9neon_config.txt ^ -f configs/ARMCA9neon_config.txt ^
REM Objects\test.Release+FVP_A9Neon.axf Objects\test.Release+FVP_A9Neon.axf

4
Testing/cmsis_build/test.Release+FVP_A5Neon.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>
@ -28,7 +28,7 @@
<components> <components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="1.2.1"/> <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="1.2.1"/>
<component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source" Cvendor="ARM" Cversion="1.10.1"> <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source" Cvendor="ARM" Cversion="1.10.1">
<defines>ARM_MATH_NEON</defines> <defines>ARM_MATH_NEON;DISABLEFLOAT16</defines>
</component> </component>
<component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Cvendor="ARM" Cversion="1.0.1"/> <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Cvendor="ARM" Cversion="1.0.1"/>
<component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Cvendor="ARM" Cversion="1.0.2"/> <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Cvendor="ARM" Cversion="1.0.2"/>

4
Testing/cmsis_build/test.Release+FVP_A7Neon.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>
@ -28,7 +28,7 @@
<components> <components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="1.2.1"/> <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="1.2.1"/>
<component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source" Cvendor="ARM" Cversion="1.10.1"> <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source" Cvendor="ARM" Cversion="1.10.1">
<defines>ARM_MATH_NEON</defines> <defines>ARM_MATH_NEON;DISABLEFLOAT16</defines>
</component> </component>
<component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Cvendor="ARM" Cversion="1.0.1"/> <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Cvendor="ARM" Cversion="1.0.1"/>
<component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Cvendor="ARM" Cversion="1.0.1"/> <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Cvendor="ARM" Cversion="1.0.1"/>

4
Testing/cmsis_build/test.Release+FVP_A9Neon.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>
@ -28,7 +28,7 @@
<components> <components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="1.2.1"/> <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="1.2.1"/>
<component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source" Cvendor="ARM" Cversion="1.10.1"> <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source" Cvendor="ARM" Cversion="1.10.1">
<defines>ARM_MATH_AUTOVECTORIZE</defines> <defines>ARM_MATH_AUTOVECTORIZE;DISABLEFLOAT16</defines>
</component> </component>
<component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Cvendor="ARM" Cversion="1.0.1"/> <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Cvendor="ARM" Cversion="1.0.1"/>
<component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Cvendor="ARM" Cversion="1.0.2"/> <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Cvendor="ARM" Cversion="1.0.2"/>

2
Testing/cmsis_build/test.Release+FVP_M55.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.Release+VHT-Corstone-300.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.Release+VHT-Corstone-310.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.Release+VHT_M0P.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.Release+VHT_M23.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.Release+VHT_M3.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.Release+VHT_M33.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.Release+VHT_M4.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.Release+VHT_M7.cprj
Unescape Escape View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd"> <cprj schemaVersion="1.0.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2022-07-11T12:56:52" tool="csolution 0.9.6"/> <created timestamp="2022-07-12T07:48:29" tool="csolution 0.9.6"/>
<info isLayer="false"> <info isLayer="false">
<description>Automatically generated project</description> <description>Automatically generated project</description>

2
Testing/cmsis_build/test.cproject.yml
Unescape Escape View File

@ -132,6 +132,7 @@ project:
- component: ARM::CMSIS:DSP&Source@1.10.1 - component: ARM::CMSIS:DSP&Source@1.10.1
defines: defines:
- ARM_MATH_NEON - ARM_MATH_NEON
- DISABLEFLOAT16
for-type: for-type:
- +FVP_A5Neon - +FVP_A5Neon
- +FVP_A7Neon - +FVP_A7Neon
@ -140,6 +141,7 @@ project:
- component: ARM::CMSIS:DSP&Source@1.10.1 - component: ARM::CMSIS:DSP&Source@1.10.1
defines: defines:
- ARM_MATH_AUTOVECTORIZE - ARM_MATH_AUTOVECTORIZE
- DISABLEFLOAT16
for-type: for-type:
- +FVP_A9Neon - +FVP_A9Neon
- component: Device:Startup&C Startup - component: Device:Startup&C Startup

54
Testing/cmsis_build/test.csolution_gcc.yml
Unescape Escape View File

@ -2,9 +2,9 @@ solution:
compiler: GCC compiler: GCC
misc: misc:
- C: - C:
- -ffunction-sections -fdata-sections -std=c11 -Ofast -ffast-math -mfp16-format=ieee -flax-vector-conversions - -ffunction-sections -mfp16-format=ieee -fdata-sections -std=c11 -Ofast -ffast-math -flax-vector-conversions
- CPP: - CPP:
- -ffunction-sections -fdata-sections -std=c++11 -Ofast -ffast-math -mfp16-format=ieee -flax-vector-conversions -Wno-unused-parameter - -ffunction-sections -mfp16-format=ieee -fdata-sections -std=c++11 -Ofast -ffast-math -flax-vector-conversions -Wno-unused-parameter
- ASM: - ASM:
- -masm=auto - -masm=auto
- Link: - Link:
@ -12,6 +12,7 @@ solution:
- --specs=rdimon.specs - --specs=rdimon.specs
- --entry=Reset_Handler - --entry=Reset_Handler
- -Wl,--gc-sections - -Wl,--gc-sections
add-paths: add-paths:
- ../FrameworkInclude - ../FrameworkInclude
- ../GeneratedInclude - ../GeneratedInclude
@ -22,7 +23,7 @@ solution:
packs: packs:
- pack: ARM::CMSIS-DSP@1.10.1 - pack: ARM::CMSIS-DSP@1.10.1
- pack: ARM::CMSIS@5.9.0 - pack: ARM::CMSIS@5.9.1
- pack: ARM::V2M_MPS3_SSE_300_BSP@1.3.0 - pack: ARM::V2M_MPS3_SSE_300_BSP@1.3.0
- pack: ARM::V2M_MPS3_SSE_310_BSP@1.0.0 - pack: ARM::V2M_MPS3_SSE_310_BSP@1.0.0
- pack: Keil::ARM_Compiler@1.7.2 - pack: Keil::ARM_Compiler@1.7.2
@ -47,32 +48,32 @@ solution:
device: ARMCM33_DSP_FP device: ARMCM33_DSP_FP
defines: defines:
- CORTEXM - CORTEXM
- type: VHT_M7 - type: VHT_M7
device: ARMCM7_DP device: ARMCM7_DP
defines: defines:
- CORTEXM - CORTEXM
- type: VHT_M4 - type: VHT_M4
device: ARMCM4_FP device: ARMCM4_FP
defines: defines:
- CORTEXM - CORTEXM
- type: VHT_M3 - type: VHT_M3
device: ARMCM3 device: ARMCM3
defines: defines:
- CORTEXM - CORTEXM
- type: VHT_M23 - type: VHT_M23
device: ARMCM23 device: ARMCM23
defines: defines:
- CORTEXM - CORTEXM
- type: VHT_M0P - type: VHT_M0P
device: ARMCM0P device: ARMCM0P
defines: defines:
- CORTEXM - CORTEXM
# ARMCA5, ARMCA7 and ARMCA9 are not configured # ARMCA5, ARMCA7 and ARMCA9 are not configured
# with Neon in the pack. # with Neon in the pack.
# And the standard .cmake in CMSIS Build tools # And the standard .cmake in CMSIS Build tools
@ -86,23 +87,24 @@ solution:
# in the same way (forcing Neon) # in the same way (forcing Neon)
# #
# Also, the packs have an issue with the scatter file for gcc # Also, the packs have an issue with the scatter file for gcc
# with is categorized as "Other" instead of "linkerScript". # with is categorized as "Other" instead of "linkerScript"
# So those configurations are disabled for now. # in CMSIS 5.9.0
# ARM::CMSIS@5.9.0 # You'll need a more recent version where the problem
#- type: FVP_A5Neon # is solved
# device: ARMCA5 - type: FVP_A5Neon
# defines: device: ARMCA5
# - CORTEXA defines:
# - CORTEXA
#- type: FVP_A7Neon
# device: ARMCA7 - type: FVP_A7Neon
# defines: device: ARMCA7
# - CORTEXA defines:
# - CORTEXA
#- type: FVP_A9Neon
# device: ARMCA9 - type: FVP_A9Neon
# defines: device: ARMCA9
# - CORTEXA defines:
- CORTEXA
build-types: build-types:
- type: Release - type: Release

Write Preview
Loading…
Cancel
Save