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DSP ARMv8M preparation.

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pull/19/head
Martin Günther 9 years ago
parent 147cb4e37a
commit bc3b6d0e2f
8 changed files with 26698 additions and 237 deletions
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57
Include/arm_math.h
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@ -1,8 +1,8 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2016 ARM Limited. All rights reserved.
*
* $Date: 22. October 2016
* $Revision: V1.4.5 e
* $Date: 28. October 2016
* $Revision: V1.4.5 f
*
* Project: CMSIS DSP Library
* Title: arm_math.h
@ -300,8 +300,10 @@
#if defined(ARM_MATH_CM7)
#include "core_cm7.h"
#define ARM_MATH_DSP
#elif defined (ARM_MATH_CM4)
#include "core_cm4.h"
#define ARM_MATH_DSP
#elif defined (ARM_MATH_CM3)
#include "core_cm3.h"
#elif defined (ARM_MATH_CM0)
@ -310,8 +312,16 @@
#elif defined (ARM_MATH_CM0PLUS)
#include "core_cm0plus.h"
#define ARM_MATH_CM0_FAMILY
#elif defined (ARM_MATH_ARMV8MBL)
#include "core_armv8mbl.h"
#define ARM_MATH_CM0_FAMILY
#elif defined (ARM_MATH_ARMV8MML)
#include "core_armv8mml.h"
#if (defined (__DSP_PRESENT) && (__DSP_PRESENT == 1))
#define ARM_MATH_DSP
#endif
#else
#error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS or ARM_MATH_CM0"
#error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS, ARM_MATH_CM0, ARM_MATH_ARMV8MBL, ARM_MATH_ARMV8MML"
#endif
#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */
@ -331,7 +341,7 @@ extern "C"
#define DELTA_Q15 0x5
#define INDEX_MASK 0x0000003F
#ifndef PI
#define PI 3.14159265358979f
#define PI 3.14159265358979f
#endif
/**
@ -458,7 +468,8 @@ extern "C"
#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *) (addr))
#define __SIMD64(addr) (*(int64_t **) & (addr))
#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
/* #if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
#if !defined (ARM_MATH_DSP)
/**
* @brief definition to pack two 16 bit values.
*/
@ -467,8 +478,8 @@ extern "C"
#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
(((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
#endif
/* #endif // defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
#endif /* !defined (ARM_MATH_DSP) */
/**
* @brief definition to pack four 8 bit values.
@ -713,7 +724,8 @@ extern "C"
/*
* @brief C custom defined intrinsic function for M3 and M0 processors
*/
#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
/* #if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
#if !defined (ARM_MATH_DSP)
/*
* @brief C custom defined QADD8 for M3 and M0 processors
@ -1042,7 +1054,34 @@ extern "C"
return (sum + (int32_t) (((int64_t) x * y) >> 32));
}
#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
#if 0
/*
* @brief C custom defined PKHBT for unavailable DSP extension
*/
CMSIS_INLINE __STATIC_INLINE uint32_t __PKHBT(
uint32_t x,
uint32_t y,
uint32_t leftshift)
{
return ( ((x ) & 0x0000FFFFUL) |
((y << leftshift) & 0xFFFF0000UL) );
}
/*
* @brief C custom defined PKHTB for unavailable DSP extension
*/
CMSIS_INLINE __STATIC_INLINE uint32_t __PKHTB(
uint32_t x,
uint32_t y,
uint32_t rightshift)
{
return ( ((x ) & 0xFFFF0000UL) |
((y >> rightshift) & 0x0000FFFFUL) );
}
#endif
/* #endif // defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
#endif /* !defined (ARM_MATH_DSP) */
/**

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Projects/ARM/arm_cortexM_math.uvoptx
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Projects/ARM/arm_cortexM_math.uvprojx
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76
Projects/ARM/arm_cortexM_math_Build.bat
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@ -6,33 +6,69 @@ echo.
echo Building DSP Libraries ARM
echo.
echo Building DSP Library for Cortex-M0 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M0l" -o "DspLib_M0l_build.log"
echo Building DSP Library for Cortex-M0 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M0b" -o "DspLib_M0b_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l" -o "DspLib_cortexM0l_build.log"
echo Building DSP Library for Cortex-M3 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M3l" -o "DspLib_M3l_build.log"
echo Building DSP Library for Cortex-M3 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M3b" -o "DspLib_M3b_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l" -o "DspLib_cortexM3l_build.log"
echo Building DSP Library for Cortex-M4 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M4l" -o "DspLib_M4l_build.log"
echo Building DSP Library for Cortex-M4 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M4b" -o "DspLib_M4b_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log"
echo Building DSP Library for Cortex-M4 with FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M4lf" -o "DspLib_M4lf_build.log"
echo Building DSP Library for Cortex-M4 with FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M4bf" -o "DspLib_M4bf_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log"
echo Building DSP Library for Cortex-M7 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7l" -o "DspLib_M7l_build.log"
echo Building DSP Library for Cortex-M7 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7b" -o "DspLib_M7b_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7lfsp" -o "DspLib_M7lfsp_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7bfsp" -o "DspLib_M7bfsp_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7lfdp" -o "DspLib_M7lfdp_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log"
echo Building DSP Library for ARMv8-M Baseline Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl" -o "DspLib_ARMv8MBLl_build.log"
echo Building DSP Library for ARMv8-M Mainline Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log"
echo Building DSP Library for ARMv8-M Mainline with single precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with double precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, single precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, double precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries
echo Building DSP Library for Cortex-M0 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log"
echo Building DSP Library for Cortex-M3 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log"
echo Building DSP Library for Cortex-M4 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
echo Building DSP Library for Cortex-M4 with FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
echo Building DSP Library for Cortex-M7 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7bfdp" -o "DspLib_M7bfdp_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo.
ECHO Deleting intermediate files

1131
Projects/GCC/arm_cortexM_math.uvoptx
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Projects/GCC/arm_cortexM_math.uvprojx
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76
Projects/GCC/arm_cortexM_math_Build.bat
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@ -6,33 +6,69 @@ echo.
echo Building DSP Libraries GCC
echo.
echo Building DSP Library for Cortex-M0 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M0l" -o "DspLib_M0l_build.log"
echo Building DSP Library for Cortex-M0 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M0b" -o "DspLib_M0b_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l" -o "DspLib_cortexM0l_build.log"
echo Building DSP Library for Cortex-M3 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M3l" -o "DspLib_M3l_build.log"
echo Building DSP Library for Cortex-M3 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M3b" -o "DspLib_M3b_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l" -o "DspLib_cortexM3l_build.log"
echo Building DSP Library for Cortex-M4 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M4l" -o "DspLib_M4l_build.log"
echo Building DSP Library for Cortex-M4 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M4b" -o "DspLib_M4b_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log"
echo Building DSP Library for Cortex-M4 with FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M4lf" -o "DspLib_M4lf_build.log"
echo Building DSP Library for Cortex-M4 with FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M4bf" -o "DspLib_M4bf_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log"
echo Building DSP Library for Cortex-M7 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7l" -o "DspLib_M7l_build.log"
echo Building DSP Library for Cortex-M7 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7b" -o "DspLib_M7b_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7lfsp" -o "DspLib_M7lfsp_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7bfsp" -o "DspLib_M7bfsp_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7lfdp" -o "DspLib_M7lfdp_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log"
echo Building DSP Library for ARMv8-M Baseline Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl" -o "DspLib_ARMv8MBLl_build.log"
echo Building DSP Library for ARMv8-M Mainline Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log"
echo Building DSP Library for ARMv8-M Mainline with single precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with double precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, single precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
echo Building DSP Library for ARMv8-M Mainline with DSP, double precision FPU Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries
echo Building DSP Library for Cortex-M0 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log"
echo Building DSP Library for Cortex-M3 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log"
echo Building DSP Library for Cortex-M4 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
echo Building DSP Library for Cortex-M4 with FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
echo Building DSP Library for Cortex-M7 Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
echo Building DSP Library for Cortex-M7 with single precision FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
echo Building DSP Library for Cortex-M7 with double precision FPU Big Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "M7bfdp" -o "DspLib_M7bfdp_build.log"
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo.
ECHO Deleting intermediate files

6
Source/TransformFunctions/arm_bitreversal2.S
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@ -1,8 +1,8 @@
;/* ----------------------------------------------------------------------
;* Copyright (C) 2010-2015 ARM Limited. All rights reserved.
;*
;* $Date: 21. December 2015
;* $Revision: V.1.4.5 a
;* $Date: 02. November 2015
;* $Revision: V.1.4.5 b
;*
;* Project: CMSIS DSP Library
;* Title: arm_bitreversal2.S
@ -99,7 +99,7 @@
.type arm_bitreversal_32, %function
#endif
#if defined(ARM_MATH_CM0) || defined(ARM_MATH_CM0PLUS)
#if defined(ARM_MATH_CM0) || defined(ARM_MATH_CM0PLUS) || defined(ARM_MATH_ARMV8MBL)
arm_bitreversal_32 PROC
ADDS r3,r1,#1

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